Lines Matching refs:RREG32
139 RREG32(GB_TILING_CONFIG); in rv770_gfx_clock_gating_enable()
171 if (RREG32(GENERAL_PWRMGT) & GLOBAL_PWRMGT_EN) in rv770_restore_cgcg()
173 if (RREG32(SCLK_PWRMGT_CNTL) & DYN_GFX_CLK_OFF_EN) in rv770_restore_cgcg()
207 if (RREG32(GENERAL_PWRMGT) & GLOBAL_PWRMGT_EN) in rv770_dpm_enabled()
730 tmp = (RREG32(MC_ARB_RAMCFG) & NOOFROWS_MASK) >> NOOFROWS_SHIFT; in rv770_calculate_memory_refresh_rate()
732 tmp = RREG32(MC_SEQ_MISC0) & 3; in rv770_calculate_memory_refresh_rate()
880 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv770_enable_display_gap()
1306 return (u8) ((RREG32(BIOS_SCRATCH_4) >> 16) & 0xff); in rv770_get_memory_module_index()
1344 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv770_program_display_gap()
1522 RREG32(CG_SPLL_FUNC_CNTL); in rv770_read_clock_registers()
1524 RREG32(CG_SPLL_FUNC_CNTL_2); in rv770_read_clock_registers()
1526 RREG32(CG_SPLL_FUNC_CNTL_3); in rv770_read_clock_registers()
1528 RREG32(CG_SPLL_SPREAD_SPECTRUM); in rv770_read_clock_registers()
1530 RREG32(CG_SPLL_SPREAD_SPECTRUM_2); in rv770_read_clock_registers()
1532 RREG32(MPLL_AD_FUNC_CNTL); in rv770_read_clock_registers()
1534 RREG32(MPLL_AD_FUNC_CNTL_2); in rv770_read_clock_registers()
1536 RREG32(MPLL_DQ_FUNC_CNTL); in rv770_read_clock_registers()
1538 RREG32(MPLL_DQ_FUNC_CNTL_2); in rv770_read_clock_registers()
1540 RREG32(MCLK_PWRMGT_CNTL); in rv770_read_clock_registers()
1541 pi->clk_regs.rv770.dll_cntl = RREG32(DLL_CNTL); in rv770_read_clock_registers()
1559 RREG32(S0_VID_LOWER_SMIO_CNTL); in rv770_read_voltage_smio_registers()
1568 (RREG32(GENERAL_PWRMGT) & SW_SMIO_INDEX_MASK) >> SW_SMIO_INDEX_SHIFT; in rv770_reset_smio_status()
1571 vid_smio_cntl = RREG32(S3_VID_LOWER_SMIO_CNTL); in rv770_reset_smio_status()
1574 vid_smio_cntl = RREG32(S2_VID_LOWER_SMIO_CNTL); in rv770_reset_smio_status()
1577 vid_smio_cntl = RREG32(S1_VID_LOWER_SMIO_CNTL); in rv770_reset_smio_status()
1595 tmp = RREG32(MC_SEQ_MISC0); in rv770_get_memory_type()
1636 RREG32(GB_TILING_CONFIG);
1658 if (((RREG32(SMC_MSG) & HOST_SMC_RESP_MASK) >> HOST_SMC_RESP_SHIFT) == 1)
2472 (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> in rv770_dpm_debugfs_print_current_performance_level()
2501 (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> in rv770_dpm_get_current_sclk()
2523 (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> in rv770_dpm_get_current_mclk()