1036 		if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit)  in sumo_get_valid_engine_clock()
1037 			return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency;  in sumo_get_valid_engine_clock()
1040 …return pi->sys_info.sclk_voltage_mapping_table.entries[pi->sys_info.sclk_voltage_mapping_table.num…  in sumo_get_valid_engine_clock()
1535 		if (vid_mapping_table->entries[i].vid_2bit == vid_2bit)  in sumo_convert_vid2_to_vid7()
1536 			return vid_mapping_table->entries[i].vid_7bit;  in sumo_convert_vid2_to_vid7()
1539 	return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_7bit;  in sumo_convert_vid2_to_vid7()
1550 		if (vid_mapping_table->entries[i].vid_7bit == vid_7bit)
1551 			return vid_mapping_table->entries[i].vid_2bit;
1554 	return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_2bit;
1602 			sclk_voltage_mapping_table->entries[n].sclk_frequency =  in sumo_construct_sclk_voltage_mapping_table()
1604 			sclk_voltage_mapping_table->entries[n].vid_2bit =  in sumo_construct_sclk_voltage_mapping_table()
1622 			vid_mapping_table->entries[table[i].usVoltageIndex].vid_7bit =  in sumo_construct_vid_mapping_table()
1624 			vid_mapping_table->entries[table[i].usVoltageIndex].vid_2bit =  in sumo_construct_vid_mapping_table()
1630 		if (vid_mapping_table->entries[i].vid_7bit == 0) {  in sumo_construct_vid_mapping_table()
1632 				if (vid_mapping_table->entries[j].vid_7bit != 0) {  in sumo_construct_vid_mapping_table()
1633 					vid_mapping_table->entries[i] =  in sumo_construct_vid_mapping_table()
1634 						vid_mapping_table->entries[j];  in sumo_construct_vid_mapping_table()
1635 					vid_mapping_table->entries[j].vid_7bit = 0;  in sumo_construct_vid_mapping_table()