587 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_divider_value()  local
594 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_divider_value()
597 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_divider_value()
604 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix);  in trinity_set_divider_value()
607 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value);  in trinity_set_divider_value()
614 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_ds_dividers()  local
616 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_ds_dividers()
619 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_ds_dividers()
626 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_ss_dividers()  local
628 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_ss_dividers()
631 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_ss_dividers()
639 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_vid()  local
641 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_vid()
644 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_vid()
646 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_vid()
649 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_vid()
656 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_allos_gnb_slow()  local
658 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);  in trinity_set_allos_gnb_slow()
661 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);  in trinity_set_allos_gnb_slow()
668 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_force_nbp_state()  local
670 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);  in trinity_set_force_nbp_state()
673 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);  in trinity_set_force_nbp_state()
680 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_display_wm()  local
682 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_display_wm()
685 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_display_wm()
692 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_vce_wm()  local
694 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_vce_wm()
697 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_vce_wm()
704 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_at()  local
706 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix);  in trinity_set_at()
709 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value);  in trinity_set_at()
735 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_power_level_enable_disable()  local
737 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_power_level_enable_disable()
741 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_power_level_enable_disable()