36 	u32 tmp;  in vce_v2_0_set_sw_cg()  local
39 		tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_set_sw_cg()
40 		tmp |= 0xe70000;  in vce_v2_0_set_sw_cg()
41 		WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_set_sw_cg()
43 		tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
44 		tmp |= 0xff000000;  in vce_v2_0_set_sw_cg()
45 		WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
47 		tmp = RREG32(VCE_UENC_REG_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
48 		tmp &= ~0x3fc;  in vce_v2_0_set_sw_cg()
49 		WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
53 		tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_set_sw_cg()
54 		tmp |= 0xe7;  in vce_v2_0_set_sw_cg()
55 		tmp &= ~0xe70000;  in vce_v2_0_set_sw_cg()
56 		WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_set_sw_cg()
58 		tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
59 		tmp |= 0x1fe000;  in vce_v2_0_set_sw_cg()
60 		tmp &= ~0xff000000;  in vce_v2_0_set_sw_cg()
61 		WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
63 		tmp = RREG32(VCE_UENC_REG_CLOCK_GATING);  in vce_v2_0_set_sw_cg()
64 		tmp |= 0x3fc;  in vce_v2_0_set_sw_cg()
65 		WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);  in vce_v2_0_set_sw_cg()
71 	u32 orig, tmp;  in vce_v2_0_set_dyn_cg()  local
73 	tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_set_dyn_cg()
74 	tmp &= ~0x00060006;  in vce_v2_0_set_dyn_cg()
76 		tmp |= 0xe10000;  in vce_v2_0_set_dyn_cg()
78 		tmp |= 0xe1;  in vce_v2_0_set_dyn_cg()
79 		tmp &= ~0xe10000;  in vce_v2_0_set_dyn_cg()
81 	WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_set_dyn_cg()
83 	orig = tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_set_dyn_cg()
84 	tmp &= ~0x1fe000;  in vce_v2_0_set_dyn_cg()
85 	tmp &= ~0xff000000;  in vce_v2_0_set_dyn_cg()
86 	if (tmp != orig)  in vce_v2_0_set_dyn_cg()
87 		WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_set_dyn_cg()
89 	orig = tmp = RREG32(VCE_UENC_REG_CLOCK_GATING);  in vce_v2_0_set_dyn_cg()
90 	tmp &= ~0x3fc;  in vce_v2_0_set_dyn_cg()
91 	if (tmp != orig)  in vce_v2_0_set_dyn_cg()
92 		WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);  in vce_v2_0_set_dyn_cg()
124 	u32 tmp;  in vce_v2_0_init_cg()  local
126 	tmp = RREG32(VCE_CLOCK_GATING_A);  in vce_v2_0_init_cg()
127 	tmp &= ~(CGC_CLK_GATE_DLY_TIMER_MASK | CGC_CLK_GATER_OFF_DLY_TIMER_MASK);  in vce_v2_0_init_cg()
128 	tmp |= (CGC_CLK_GATE_DLY_TIMER(0) | CGC_CLK_GATER_OFF_DLY_TIMER(4));  in vce_v2_0_init_cg()
129 	tmp |= CGC_UENC_WAIT_AWAKE;  in vce_v2_0_init_cg()
130 	WREG32(VCE_CLOCK_GATING_A, tmp);  in vce_v2_0_init_cg()
132 	tmp = RREG32(VCE_UENC_CLOCK_GATING);  in vce_v2_0_init_cg()
133 	tmp &= ~(CLOCK_ON_DELAY_MASK | CLOCK_OFF_DELAY_MASK);  in vce_v2_0_init_cg()
134 	tmp |= (CLOCK_ON_DELAY(0) | CLOCK_OFF_DELAY(4));  in vce_v2_0_init_cg()
135 	WREG32(VCE_UENC_CLOCK_GATING, tmp);  in vce_v2_0_init_cg()
137 	tmp = RREG32(VCE_CLOCK_GATING_B);  in vce_v2_0_init_cg()
138 	tmp |= 0x10;  in vce_v2_0_init_cg()
139 	tmp &= ~0x100000;  in vce_v2_0_init_cg()
140 	WREG32(VCE_CLOCK_GATING_B, tmp);  in vce_v2_0_init_cg()