Lines Matching refs:DUMP_REG
683 #define DUMP_REG(name) \ in tegra_sor_show_regs() macro
687 DUMP_REG(SOR_CTXSW); in tegra_sor_show_regs()
688 DUMP_REG(SOR_SUPER_STATE_0); in tegra_sor_show_regs()
689 DUMP_REG(SOR_SUPER_STATE_1); in tegra_sor_show_regs()
690 DUMP_REG(SOR_STATE_0); in tegra_sor_show_regs()
691 DUMP_REG(SOR_STATE_1); in tegra_sor_show_regs()
692 DUMP_REG(SOR_HEAD_STATE_0(0)); in tegra_sor_show_regs()
693 DUMP_REG(SOR_HEAD_STATE_0(1)); in tegra_sor_show_regs()
694 DUMP_REG(SOR_HEAD_STATE_1(0)); in tegra_sor_show_regs()
695 DUMP_REG(SOR_HEAD_STATE_1(1)); in tegra_sor_show_regs()
696 DUMP_REG(SOR_HEAD_STATE_2(0)); in tegra_sor_show_regs()
697 DUMP_REG(SOR_HEAD_STATE_2(1)); in tegra_sor_show_regs()
698 DUMP_REG(SOR_HEAD_STATE_3(0)); in tegra_sor_show_regs()
699 DUMP_REG(SOR_HEAD_STATE_3(1)); in tegra_sor_show_regs()
700 DUMP_REG(SOR_HEAD_STATE_4(0)); in tegra_sor_show_regs()
701 DUMP_REG(SOR_HEAD_STATE_4(1)); in tegra_sor_show_regs()
702 DUMP_REG(SOR_HEAD_STATE_5(0)); in tegra_sor_show_regs()
703 DUMP_REG(SOR_HEAD_STATE_5(1)); in tegra_sor_show_regs()
704 DUMP_REG(SOR_CRC_CNTRL); in tegra_sor_show_regs()
705 DUMP_REG(SOR_DP_DEBUG_MVID); in tegra_sor_show_regs()
706 DUMP_REG(SOR_CLK_CNTRL); in tegra_sor_show_regs()
707 DUMP_REG(SOR_CAP); in tegra_sor_show_regs()
708 DUMP_REG(SOR_PWR); in tegra_sor_show_regs()
709 DUMP_REG(SOR_TEST); in tegra_sor_show_regs()
710 DUMP_REG(SOR_PLL_0); in tegra_sor_show_regs()
711 DUMP_REG(SOR_PLL_1); in tegra_sor_show_regs()
712 DUMP_REG(SOR_PLL_2); in tegra_sor_show_regs()
713 DUMP_REG(SOR_PLL_3); in tegra_sor_show_regs()
714 DUMP_REG(SOR_CSTM); in tegra_sor_show_regs()
715 DUMP_REG(SOR_LVDS); in tegra_sor_show_regs()
716 DUMP_REG(SOR_CRC_A); in tegra_sor_show_regs()
717 DUMP_REG(SOR_CRC_B); in tegra_sor_show_regs()
718 DUMP_REG(SOR_BLANK); in tegra_sor_show_regs()
719 DUMP_REG(SOR_SEQ_CTL); in tegra_sor_show_regs()
720 DUMP_REG(SOR_LANE_SEQ_CTL); in tegra_sor_show_regs()
721 DUMP_REG(SOR_SEQ_INST(0)); in tegra_sor_show_regs()
722 DUMP_REG(SOR_SEQ_INST(1)); in tegra_sor_show_regs()
723 DUMP_REG(SOR_SEQ_INST(2)); in tegra_sor_show_regs()
724 DUMP_REG(SOR_SEQ_INST(3)); in tegra_sor_show_regs()
725 DUMP_REG(SOR_SEQ_INST(4)); in tegra_sor_show_regs()
726 DUMP_REG(SOR_SEQ_INST(5)); in tegra_sor_show_regs()
727 DUMP_REG(SOR_SEQ_INST(6)); in tegra_sor_show_regs()
728 DUMP_REG(SOR_SEQ_INST(7)); in tegra_sor_show_regs()
729 DUMP_REG(SOR_SEQ_INST(8)); in tegra_sor_show_regs()
730 DUMP_REG(SOR_SEQ_INST(9)); in tegra_sor_show_regs()
731 DUMP_REG(SOR_SEQ_INST(10)); in tegra_sor_show_regs()
732 DUMP_REG(SOR_SEQ_INST(11)); in tegra_sor_show_regs()
733 DUMP_REG(SOR_SEQ_INST(12)); in tegra_sor_show_regs()
734 DUMP_REG(SOR_SEQ_INST(13)); in tegra_sor_show_regs()
735 DUMP_REG(SOR_SEQ_INST(14)); in tegra_sor_show_regs()
736 DUMP_REG(SOR_SEQ_INST(15)); in tegra_sor_show_regs()
737 DUMP_REG(SOR_PWM_DIV); in tegra_sor_show_regs()
738 DUMP_REG(SOR_PWM_CTL); in tegra_sor_show_regs()
739 DUMP_REG(SOR_VCRC_A_0); in tegra_sor_show_regs()
740 DUMP_REG(SOR_VCRC_A_1); in tegra_sor_show_regs()
741 DUMP_REG(SOR_VCRC_B_0); in tegra_sor_show_regs()
742 DUMP_REG(SOR_VCRC_B_1); in tegra_sor_show_regs()
743 DUMP_REG(SOR_CCRC_A_0); in tegra_sor_show_regs()
744 DUMP_REG(SOR_CCRC_A_1); in tegra_sor_show_regs()
745 DUMP_REG(SOR_CCRC_B_0); in tegra_sor_show_regs()
746 DUMP_REG(SOR_CCRC_B_1); in tegra_sor_show_regs()
747 DUMP_REG(SOR_EDATA_A_0); in tegra_sor_show_regs()
748 DUMP_REG(SOR_EDATA_A_1); in tegra_sor_show_regs()
749 DUMP_REG(SOR_EDATA_B_0); in tegra_sor_show_regs()
750 DUMP_REG(SOR_EDATA_B_1); in tegra_sor_show_regs()
751 DUMP_REG(SOR_COUNT_A_0); in tegra_sor_show_regs()
752 DUMP_REG(SOR_COUNT_A_1); in tegra_sor_show_regs()
753 DUMP_REG(SOR_COUNT_B_0); in tegra_sor_show_regs()
754 DUMP_REG(SOR_COUNT_B_1); in tegra_sor_show_regs()
755 DUMP_REG(SOR_DEBUG_A_0); in tegra_sor_show_regs()
756 DUMP_REG(SOR_DEBUG_A_1); in tegra_sor_show_regs()
757 DUMP_REG(SOR_DEBUG_B_0); in tegra_sor_show_regs()
758 DUMP_REG(SOR_DEBUG_B_1); in tegra_sor_show_regs()
759 DUMP_REG(SOR_TRIG); in tegra_sor_show_regs()
760 DUMP_REG(SOR_MSCHECK); in tegra_sor_show_regs()
761 DUMP_REG(SOR_XBAR_CTRL); in tegra_sor_show_regs()
762 DUMP_REG(SOR_XBAR_POL); in tegra_sor_show_regs()
763 DUMP_REG(SOR_DP_LINKCTL_0); in tegra_sor_show_regs()
764 DUMP_REG(SOR_DP_LINKCTL_1); in tegra_sor_show_regs()
765 DUMP_REG(SOR_LANE_DRIVE_CURRENT_0); in tegra_sor_show_regs()
766 DUMP_REG(SOR_LANE_DRIVE_CURRENT_1); in tegra_sor_show_regs()
767 DUMP_REG(SOR_LANE4_DRIVE_CURRENT_0); in tegra_sor_show_regs()
768 DUMP_REG(SOR_LANE4_DRIVE_CURRENT_1); in tegra_sor_show_regs()
769 DUMP_REG(SOR_LANE_PREEMPHASIS_0); in tegra_sor_show_regs()
770 DUMP_REG(SOR_LANE_PREEMPHASIS_1); in tegra_sor_show_regs()
771 DUMP_REG(SOR_LANE4_PREEMPHASIS_0); in tegra_sor_show_regs()
772 DUMP_REG(SOR_LANE4_PREEMPHASIS_1); in tegra_sor_show_regs()
773 DUMP_REG(SOR_LANE_POST_CURSOR_0); in tegra_sor_show_regs()
774 DUMP_REG(SOR_LANE_POST_CURSOR_1); in tegra_sor_show_regs()
775 DUMP_REG(SOR_DP_CONFIG_0); in tegra_sor_show_regs()
776 DUMP_REG(SOR_DP_CONFIG_1); in tegra_sor_show_regs()
777 DUMP_REG(SOR_DP_MN_0); in tegra_sor_show_regs()
778 DUMP_REG(SOR_DP_MN_1); in tegra_sor_show_regs()
779 DUMP_REG(SOR_DP_PADCTL_0); in tegra_sor_show_regs()
780 DUMP_REG(SOR_DP_PADCTL_1); in tegra_sor_show_regs()
781 DUMP_REG(SOR_DP_DEBUG_0); in tegra_sor_show_regs()
782 DUMP_REG(SOR_DP_DEBUG_1); in tegra_sor_show_regs()
783 DUMP_REG(SOR_DP_SPARE_0); in tegra_sor_show_regs()
784 DUMP_REG(SOR_DP_SPARE_1); in tegra_sor_show_regs()
785 DUMP_REG(SOR_DP_AUDIO_CTRL); in tegra_sor_show_regs()
786 DUMP_REG(SOR_DP_AUDIO_HBLANK_SYMBOLS); in tegra_sor_show_regs()
787 DUMP_REG(SOR_DP_AUDIO_VBLANK_SYMBOLS); in tegra_sor_show_regs()
788 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_HEADER); in tegra_sor_show_regs()
789 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_0); in tegra_sor_show_regs()
790 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_1); in tegra_sor_show_regs()
791 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_2); in tegra_sor_show_regs()
792 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_3); in tegra_sor_show_regs()
793 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_4); in tegra_sor_show_regs()
794 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_5); in tegra_sor_show_regs()
795 DUMP_REG(SOR_DP_GENERIC_INFOFRAME_SUBPACK_6); in tegra_sor_show_regs()
796 DUMP_REG(SOR_DP_TPG); in tegra_sor_show_regs()
797 DUMP_REG(SOR_DP_TPG_CONFIG); in tegra_sor_show_regs()
798 DUMP_REG(SOR_DP_LQ_CSTM_0); in tegra_sor_show_regs()
799 DUMP_REG(SOR_DP_LQ_CSTM_1); in tegra_sor_show_regs()
800 DUMP_REG(SOR_DP_LQ_CSTM_2); in tegra_sor_show_regs()
802 #undef DUMP_REG in tegra_sor_show_regs()