37 #define PCH_I2CSR	0x08	/* I2C status register */  macro
273 	while (ioread32(p + PCH_I2CSR) & I2CMBB_BIT) {  in pch_i2c_wait_for_bus_idle()
275 			pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));  in pch_i2c_wait_for_bus_idle()
339 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT);  in pch_i2c_wait_for_check_xfer()
340 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);  in pch_i2c_wait_for_check_xfer()
347 	if (ioread32(p + PCH_I2CSR) & PCH_GETACK) {  in pch_i2c_wait_for_check_xfer()
435 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMCF_BIT);  in pch_i2c_writebytes()
436 		pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT);  in pch_i2c_writebytes()
607 	sts = ioread32(p + PCH_I2CSR);  in pch_i2c_cb()
616 	pch_clrbit(adap->pch_base_address, PCH_I2CSR, sts);  in pch_i2c_cb()
618 	pch_dbg(adap, "PCH_I2CSR = %x\n", ioread32(p + PCH_I2CSR));  in pch_i2c_cb()
646 		reg_val = ioread32(p + PCH_I2CSR);  in pch_i2c_handler()
876 		ioread32(p + PCH_I2CSR), ioread32(p + PCH_I2CBUFSTA),  in pch_i2c_suspend()