Lines Matching refs:pch_dbg
119 #define pch_dbg(adap, fmt, arg...) \ macro
238 pch_dbg(adap, "Fast mode enabled\n"); in pch_i2c_init()
254 pch_dbg(adap, in pch_i2c_init()
275 pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR)); in pch_i2c_wait_for_bus_idle()
305 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL)); in pch_i2c_start()
316 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL)); in pch_i2c_stop()
348 pch_dbg(adap, "Receive NACK for slave address setting\n"); in pch_i2c_wait_for_check_xfer()
362 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL)); in pch_i2c_repstart()
395 pch_dbg(adap, "I2CCTL = %x msgs->len = %d\n", ioread32(p + PCH_I2CCTL), in pch_i2c_writebytes()
429 pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]); in pch_i2c_writebytes()
445 pch_dbg(adap, "return=%d\n", wrcount); in pch_i2c_writebytes()
457 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL)); in pch_i2c_sendack()
468 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL)); in pch_i2c_sendnack()
481 pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL)); in pch_i2c_restart()
618 pch_dbg(adap, "PCH_I2CSR = %x\n", ioread32(p + PCH_I2CSR)); in pch_i2c_cb()
681 pch_dbg(adap, "adap->p_adapter_info->pch_i2c_suspended is %d\n", in pch_i2c_xfer()
690 pch_dbg(adap, in pch_i2c_xfer()