Lines Matching refs:outb
75 outb(index, hwif->dma_base + 1); in get_indexed_reg()
89 outb(index, hwif->dma_base + 1); in set_indexed_reg()
90 outb(value, hwif->dma_base + 3); in set_indexed_reg()
215 outb(0x20, pri_dma_base + 0x01); in read_counter()
217 outb(0x21, pri_dma_base + 0x01); in read_counter()
219 outb(0x20, sec_dma_base + 0x01); in read_counter()
221 outb(0x21, sec_dma_base + 0x01); in read_counter()
255 outb(0x01, dma_base + 0x01); in detect_pll_input_clock()
258 outb(scr1 | 0x40, dma_base + 0x03); in detect_pll_input_clock()
267 outb(0x01, dma_base + 0x01); in detect_pll_input_clock()
270 outb(scr1 & ~0x40, dma_base + 0x03); in detect_pll_input_clock()
354 outb(0x02, sec_dma_base + 0x01); in init_chipset_pdcnew()
356 outb(0x03, sec_dma_base + 0x01); in init_chipset_pdcnew()
401 outb(0x02, sec_dma_base + 0x01); in init_chipset_pdcnew()
402 outb(pll_ctl0, sec_dma_base + 0x03); in init_chipset_pdcnew()
403 outb(0x03, sec_dma_base + 0x01); in init_chipset_pdcnew()
404 outb(pll_ctl1, sec_dma_base + 0x03); in init_chipset_pdcnew()
413 outb(0x02, sec_dma_base + 0x01); in init_chipset_pdcnew()
415 outb(0x03, sec_dma_base + 0x01); in init_chipset_pdcnew()