167 #define FW_RI_TPTE_VALID_V(x)		((x) << FW_RI_TPTE_VALID_S)  argument
168 #define FW_RI_TPTE_VALID_G(x)		\  argument
169 	(((x) >> FW_RI_TPTE_VALID_S) & FW_RI_TPTE_VALID_M)
174 #define FW_RI_TPTE_STAGKEY_V(x)		((x) << FW_RI_TPTE_STAGKEY_S)  argument
175 #define FW_RI_TPTE_STAGKEY_G(x)		\  argument
176 	(((x) >> FW_RI_TPTE_STAGKEY_S) & FW_RI_TPTE_STAGKEY_M)
180 #define FW_RI_TPTE_STAGSTATE_V(x)	((x) << FW_RI_TPTE_STAGSTATE_S)  argument
181 #define FW_RI_TPTE_STAGSTATE_G(x)	\  argument
182 	(((x) >> FW_RI_TPTE_STAGSTATE_S) & FW_RI_TPTE_STAGSTATE_M)
187 #define FW_RI_TPTE_STAGTYPE_V(x)	((x) << FW_RI_TPTE_STAGTYPE_S)  argument
188 #define FW_RI_TPTE_STAGTYPE_G(x)	\  argument
189 	(((x) >> FW_RI_TPTE_STAGTYPE_S) & FW_RI_TPTE_STAGTYPE_M)
193 #define FW_RI_TPTE_PDID_V(x)		((x) << FW_RI_TPTE_PDID_S)  argument
194 #define FW_RI_TPTE_PDID_G(x)		\  argument
195 	(((x) >> FW_RI_TPTE_PDID_S) & FW_RI_TPTE_PDID_M)
199 #define FW_RI_TPTE_PERM_V(x)		((x) << FW_RI_TPTE_PERM_S)  argument
200 #define FW_RI_TPTE_PERM_G(x)		\  argument
201 	(((x) >> FW_RI_TPTE_PERM_S) & FW_RI_TPTE_PERM_M)
205 #define FW_RI_TPTE_REMINVDIS_V(x)	((x) << FW_RI_TPTE_REMINVDIS_S)  argument
206 #define FW_RI_TPTE_REMINVDIS_G(x)	\  argument
207 	(((x) >> FW_RI_TPTE_REMINVDIS_S) & FW_RI_TPTE_REMINVDIS_M)
212 #define FW_RI_TPTE_ADDRTYPE_V(x)	((x) << FW_RI_TPTE_ADDRTYPE_S)  argument
213 #define FW_RI_TPTE_ADDRTYPE_G(x)	\  argument
214 	(((x) >> FW_RI_TPTE_ADDRTYPE_S) & FW_RI_TPTE_ADDRTYPE_M)
219 #define FW_RI_TPTE_MWBINDEN_V(x)	((x) << FW_RI_TPTE_MWBINDEN_S)  argument
220 #define FW_RI_TPTE_MWBINDEN_G(x)	\  argument
221 	(((x) >> FW_RI_TPTE_MWBINDEN_S) & FW_RI_TPTE_MWBINDEN_M)
226 #define FW_RI_TPTE_PS_V(x)		((x) << FW_RI_TPTE_PS_S)  argument
227 #define FW_RI_TPTE_PS_G(x)		\  argument
228 	(((x) >> FW_RI_TPTE_PS_S) & FW_RI_TPTE_PS_M)
232 #define FW_RI_TPTE_QPID_V(x)		((x) << FW_RI_TPTE_QPID_S)  argument
233 #define FW_RI_TPTE_QPID_G(x)		\  argument
234 	(((x) >> FW_RI_TPTE_QPID_S) & FW_RI_TPTE_QPID_M)
238 #define FW_RI_TPTE_NOSNOOP_V(x)		((x) << FW_RI_TPTE_NOSNOOP_S)  argument
239 #define FW_RI_TPTE_NOSNOOP_G(x)		\  argument
240 	(((x) >> FW_RI_TPTE_NOSNOOP_S) & FW_RI_TPTE_NOSNOOP_M)
245 #define FW_RI_TPTE_PBLADDR_V(x)		((x) << FW_RI_TPTE_PBLADDR_S)  argument
246 #define FW_RI_TPTE_PBLADDR_G(x)		\  argument
247 	(((x) >> FW_RI_TPTE_PBLADDR_S) & FW_RI_TPTE_PBLADDR_M)
251 #define FW_RI_TPTE_DCA_V(x)		((x) << FW_RI_TPTE_DCA_S)  argument
252 #define FW_RI_TPTE_DCA_G(x)		\  argument
253 	(((x) >> FW_RI_TPTE_DCA_S) & FW_RI_TPTE_DCA_M)
257 #define FW_RI_TPTE_MWBCNT_PSTAT_V(x)	\  argument
258 	((x) << FW_RI_TPTE_MWBCNT_PSTAG_S)
259 #define FW_RI_TPTE_MWBCNT_PSTAG_G(x)	\  argument
260 	(((x) >> FW_RI_TPTE_MWBCNT_PSTAG_S) & FW_RI_TPTE_MWBCNT_PSTAG_M)
313 #define FW_RI_RES_WR_NRES_V(x)	((x) << FW_RI_RES_WR_NRES_S)  argument
314 #define FW_RI_RES_WR_NRES_G(x)	\  argument
315 	(((x) >> FW_RI_RES_WR_NRES_S) & FW_RI_RES_WR_NRES_M)
319 #define FW_RI_RES_WR_FETCHSZM_V(x)	((x) << FW_RI_RES_WR_FETCHSZM_S)  argument
320 #define FW_RI_RES_WR_FETCHSZM_G(x)	\  argument
321 	(((x) >> FW_RI_RES_WR_FETCHSZM_S) & FW_RI_RES_WR_FETCHSZM_M)
326 #define FW_RI_RES_WR_STATUSPGNS_V(x)	((x) << FW_RI_RES_WR_STATUSPGNS_S)  argument
327 #define FW_RI_RES_WR_STATUSPGNS_G(x)	\  argument
328 	(((x) >> FW_RI_RES_WR_STATUSPGNS_S) & FW_RI_RES_WR_STATUSPGNS_M)
333 #define FW_RI_RES_WR_STATUSPGRO_V(x)	((x) << FW_RI_RES_WR_STATUSPGRO_S)  argument
334 #define FW_RI_RES_WR_STATUSPGRO_G(x)	\  argument
335 	(((x) >> FW_RI_RES_WR_STATUSPGRO_S) & FW_RI_RES_WR_STATUSPGRO_M)
340 #define FW_RI_RES_WR_FETCHNS_V(x)	((x) << FW_RI_RES_WR_FETCHNS_S)  argument
341 #define FW_RI_RES_WR_FETCHNS_G(x)	\  argument
342 	(((x) >> FW_RI_RES_WR_FETCHNS_S) & FW_RI_RES_WR_FETCHNS_M)
347 #define FW_RI_RES_WR_FETCHRO_V(x)	((x) << FW_RI_RES_WR_FETCHRO_S)  argument
348 #define FW_RI_RES_WR_FETCHRO_G(x)	\  argument
349 	(((x) >> FW_RI_RES_WR_FETCHRO_S) & FW_RI_RES_WR_FETCHRO_M)
354 #define FW_RI_RES_WR_HOSTFCMODE_V(x)	((x) << FW_RI_RES_WR_HOSTFCMODE_S)  argument
355 #define FW_RI_RES_WR_HOSTFCMODE_G(x)	\  argument
356 	(((x) >> FW_RI_RES_WR_HOSTFCMODE_S) & FW_RI_RES_WR_HOSTFCMODE_M)
360 #define FW_RI_RES_WR_CPRIO_V(x)	((x) << FW_RI_RES_WR_CPRIO_S)  argument
361 #define FW_RI_RES_WR_CPRIO_G(x)	\  argument
362 	(((x) >> FW_RI_RES_WR_CPRIO_S) & FW_RI_RES_WR_CPRIO_M)
367 #define FW_RI_RES_WR_ONCHIP_V(x)	((x) << FW_RI_RES_WR_ONCHIP_S)  argument
368 #define FW_RI_RES_WR_ONCHIP_G(x)	\  argument
369 	(((x) >> FW_RI_RES_WR_ONCHIP_S) & FW_RI_RES_WR_ONCHIP_M)
374 #define FW_RI_RES_WR_PCIECHN_V(x)	((x) << FW_RI_RES_WR_PCIECHN_S)  argument
375 #define FW_RI_RES_WR_PCIECHN_G(x)	\  argument
376 	(((x) >> FW_RI_RES_WR_PCIECHN_S) & FW_RI_RES_WR_PCIECHN_M)
380 #define FW_RI_RES_WR_IQID_V(x)	((x) << FW_RI_RES_WR_IQID_S)  argument
381 #define FW_RI_RES_WR_IQID_G(x)	\  argument
382 	(((x) >> FW_RI_RES_WR_IQID_S) & FW_RI_RES_WR_IQID_M)
386 #define FW_RI_RES_WR_DCAEN_V(x)	((x) << FW_RI_RES_WR_DCAEN_S)  argument
387 #define FW_RI_RES_WR_DCAEN_G(x)	\  argument
388 	(((x) >> FW_RI_RES_WR_DCAEN_S) & FW_RI_RES_WR_DCAEN_M)
393 #define FW_RI_RES_WR_DCACPU_V(x)	((x) << FW_RI_RES_WR_DCACPU_S)  argument
394 #define FW_RI_RES_WR_DCACPU_G(x)	\  argument
395 	(((x) >> FW_RI_RES_WR_DCACPU_S) & FW_RI_RES_WR_DCACPU_M)
399 #define FW_RI_RES_WR_FBMIN_V(x)	((x) << FW_RI_RES_WR_FBMIN_S)  argument
400 #define FW_RI_RES_WR_FBMIN_G(x)	\  argument
401 	(((x) >> FW_RI_RES_WR_FBMIN_S) & FW_RI_RES_WR_FBMIN_M)
405 #define FW_RI_RES_WR_FBMAX_V(x)	((x) << FW_RI_RES_WR_FBMAX_S)  argument
406 #define FW_RI_RES_WR_FBMAX_G(x)	\  argument
407 	(((x) >> FW_RI_RES_WR_FBMAX_S) & FW_RI_RES_WR_FBMAX_M)
411 #define FW_RI_RES_WR_CIDXFTHRESHO_V(x)	((x) << FW_RI_RES_WR_CIDXFTHRESHO_S)  argument
412 #define FW_RI_RES_WR_CIDXFTHRESHO_G(x)	\  argument
413 	(((x) >> FW_RI_RES_WR_CIDXFTHRESHO_S) & FW_RI_RES_WR_CIDXFTHRESHO_M)
418 #define FW_RI_RES_WR_CIDXFTHRESH_V(x)	((x) << FW_RI_RES_WR_CIDXFTHRESH_S)  argument
419 #define FW_RI_RES_WR_CIDXFTHRESH_G(x)	\  argument
420 	(((x) >> FW_RI_RES_WR_CIDXFTHRESH_S) & FW_RI_RES_WR_CIDXFTHRESH_M)
424 #define FW_RI_RES_WR_EQSIZE_V(x)	((x) << FW_RI_RES_WR_EQSIZE_S)  argument
425 #define FW_RI_RES_WR_EQSIZE_G(x)	\  argument
426 	(((x) >> FW_RI_RES_WR_EQSIZE_S) & FW_RI_RES_WR_EQSIZE_M)
430 #define FW_RI_RES_WR_IQANDST_V(x)	((x) << FW_RI_RES_WR_IQANDST_S)  argument
431 #define FW_RI_RES_WR_IQANDST_G(x)	\  argument
432 	(((x) >> FW_RI_RES_WR_IQANDST_S) & FW_RI_RES_WR_IQANDST_M)
437 #define FW_RI_RES_WR_IQANUS_V(x)	((x) << FW_RI_RES_WR_IQANUS_S)  argument
438 #define FW_RI_RES_WR_IQANUS_G(x)	\  argument
439 	(((x) >> FW_RI_RES_WR_IQANUS_S) & FW_RI_RES_WR_IQANUS_M)
444 #define FW_RI_RES_WR_IQANUD_V(x)	((x) << FW_RI_RES_WR_IQANUD_S)  argument
445 #define FW_RI_RES_WR_IQANUD_G(x)	\  argument
446 	(((x) >> FW_RI_RES_WR_IQANUD_S) & FW_RI_RES_WR_IQANUD_M)
450 #define FW_RI_RES_WR_IQANDSTINDEX_V(x)	((x) << FW_RI_RES_WR_IQANDSTINDEX_S)  argument
451 #define FW_RI_RES_WR_IQANDSTINDEX_G(x)	\  argument
452 	(((x) >> FW_RI_RES_WR_IQANDSTINDEX_S) & FW_RI_RES_WR_IQANDSTINDEX_M)
456 #define FW_RI_RES_WR_IQDROPRSS_V(x)	((x) << FW_RI_RES_WR_IQDROPRSS_S)  argument
457 #define FW_RI_RES_WR_IQDROPRSS_G(x)	\  argument
458 	(((x) >> FW_RI_RES_WR_IQDROPRSS_S) & FW_RI_RES_WR_IQDROPRSS_M)
463 #define FW_RI_RES_WR_IQGTSMODE_V(x)	((x) << FW_RI_RES_WR_IQGTSMODE_S)  argument
464 #define FW_RI_RES_WR_IQGTSMODE_G(x)	\  argument
465 	(((x) >> FW_RI_RES_WR_IQGTSMODE_S) & FW_RI_RES_WR_IQGTSMODE_M)
470 #define FW_RI_RES_WR_IQPCIECH_V(x)	((x) << FW_RI_RES_WR_IQPCIECH_S)  argument
471 #define FW_RI_RES_WR_IQPCIECH_G(x)	\  argument
472 	(((x) >> FW_RI_RES_WR_IQPCIECH_S) & FW_RI_RES_WR_IQPCIECH_M)
476 #define FW_RI_RES_WR_IQDCAEN_V(x)	((x) << FW_RI_RES_WR_IQDCAEN_S)  argument
477 #define FW_RI_RES_WR_IQDCAEN_G(x)	\  argument
478 	(((x) >> FW_RI_RES_WR_IQDCAEN_S) & FW_RI_RES_WR_IQDCAEN_M)
483 #define FW_RI_RES_WR_IQDCACPU_V(x)	((x) << FW_RI_RES_WR_IQDCACPU_S)  argument
484 #define FW_RI_RES_WR_IQDCACPU_G(x)	\  argument
485 	(((x) >> FW_RI_RES_WR_IQDCACPU_S) & FW_RI_RES_WR_IQDCACPU_M)
489 #define FW_RI_RES_WR_IQINTCNTTHRESH_V(x)	\  argument
490 	((x) << FW_RI_RES_WR_IQINTCNTTHRESH_S)
491 #define FW_RI_RES_WR_IQINTCNTTHRESH_G(x)	\  argument
492 	(((x) >> FW_RI_RES_WR_IQINTCNTTHRESH_S) & FW_RI_RES_WR_IQINTCNTTHRESH_M)
496 #define FW_RI_RES_WR_IQO_V(x)	((x) << FW_RI_RES_WR_IQO_S)  argument
497 #define FW_RI_RES_WR_IQO_G(x)	\  argument
498 	(((x) >> FW_RI_RES_WR_IQO_S) & FW_RI_RES_WR_IQO_M)
503 #define FW_RI_RES_WR_IQCPRIO_V(x)	((x) << FW_RI_RES_WR_IQCPRIO_S)  argument
504 #define FW_RI_RES_WR_IQCPRIO_G(x)	\  argument
505 	(((x) >> FW_RI_RES_WR_IQCPRIO_S) & FW_RI_RES_WR_IQCPRIO_M)
510 #define FW_RI_RES_WR_IQESIZE_V(x)	((x) << FW_RI_RES_WR_IQESIZE_S)  argument
511 #define FW_RI_RES_WR_IQESIZE_G(x)	\  argument
512 	(((x) >> FW_RI_RES_WR_IQESIZE_S) & FW_RI_RES_WR_IQESIZE_M)
516 #define FW_RI_RES_WR_IQNS_V(x)	((x) << FW_RI_RES_WR_IQNS_S)  argument
517 #define FW_RI_RES_WR_IQNS_G(x)	\  argument
518 	(((x) >> FW_RI_RES_WR_IQNS_S) & FW_RI_RES_WR_IQNS_M)
523 #define FW_RI_RES_WR_IQRO_V(x)	((x) << FW_RI_RES_WR_IQRO_S)  argument
524 #define FW_RI_RES_WR_IQRO_G(x)	\  argument
525 	(((x) >> FW_RI_RES_WR_IQRO_S) & FW_RI_RES_WR_IQRO_M)
567 #define FW_RI_SEND_WR_SENDOP_V(x)	((x) << FW_RI_SEND_WR_SENDOP_S)  argument
568 #define FW_RI_SEND_WR_SENDOP_G(x)	\  argument
569 	(((x) >> FW_RI_SEND_WR_SENDOP_S) & FW_RI_SEND_WR_SENDOP_M)
617 #define FW_RI_BIND_MW_WR_QPBINDE_V(x)	((x) << FW_RI_BIND_MW_WR_QPBINDE_S)  argument
618 #define FW_RI_BIND_MW_WR_QPBINDE_G(x)	\  argument
619 	(((x) >> FW_RI_BIND_MW_WR_QPBINDE_S) & FW_RI_BIND_MW_WR_QPBINDE_M)
624 #define FW_RI_BIND_MW_WR_NS_V(x)	((x) << FW_RI_BIND_MW_WR_NS_S)  argument
625 #define FW_RI_BIND_MW_WR_NS_G(x)	\  argument
626 	(((x) >> FW_RI_BIND_MW_WR_NS_S) & FW_RI_BIND_MW_WR_NS_M)
631 #define FW_RI_BIND_MW_WR_DCACPU_V(x)	((x) << FW_RI_BIND_MW_WR_DCACPU_S)  argument
632 #define FW_RI_BIND_MW_WR_DCACPU_G(x)	\  argument
633 	(((x) >> FW_RI_BIND_MW_WR_DCACPU_S) & FW_RI_BIND_MW_WR_DCACPU_M)
654 #define FW_RI_FR_NSMR_WR_QPBINDE_V(x)	((x) << FW_RI_FR_NSMR_WR_QPBINDE_S)  argument
655 #define FW_RI_FR_NSMR_WR_QPBINDE_G(x)	\  argument
656 	(((x) >> FW_RI_FR_NSMR_WR_QPBINDE_S) & FW_RI_FR_NSMR_WR_QPBINDE_M)
661 #define FW_RI_FR_NSMR_WR_NS_V(x)	((x) << FW_RI_FR_NSMR_WR_NS_S)  argument
662 #define FW_RI_FR_NSMR_WR_NS_G(x)	\  argument
663 	(((x) >> FW_RI_FR_NSMR_WR_NS_S) & FW_RI_FR_NSMR_WR_NS_M)
668 #define FW_RI_FR_NSMR_WR_DCACPU_V(x)	((x) << FW_RI_FR_NSMR_WR_DCACPU_S)  argument
669 #define FW_RI_FR_NSMR_WR_DCACPU_G(x)	\  argument
670 	(((x) >> FW_RI_FR_NSMR_WR_DCACPU_S) & FW_RI_FR_NSMR_WR_DCACPU_M)
745 #define FW_RI_WR_MPAREQBIT_V(x)	((x) << FW_RI_WR_MPAREQBIT_S)  argument
746 #define FW_RI_WR_MPAREQBIT_G(x)	\  argument
747 	(((x) >> FW_RI_WR_MPAREQBIT_S) & FW_RI_WR_MPAREQBIT_M)
752 #define FW_RI_WR_P2PTYPE_V(x)	((x) << FW_RI_WR_P2PTYPE_S)  argument
753 #define FW_RI_WR_P2PTYPE_G(x)	\  argument
754 	(((x) >> FW_RI_WR_P2PTYPE_S) & FW_RI_WR_P2PTYPE_M)
788 #define SYN_RX_CHAN_V(x) ((x) << SYN_RX_CHAN_S)  argument
789 #define SYN_RX_CHAN_G(x) (((x) >> SYN_RX_CHAN_S) & SYN_RX_CHAN_M)  argument
793 #define TCP_HDR_LEN_V(x) ((x) << TCP_HDR_LEN_S)  argument
794 #define TCP_HDR_LEN_G(x) (((x) >> TCP_HDR_LEN_S) & TCP_HDR_LEN_M)  argument
798 #define IP_HDR_LEN_V(x) ((x) << IP_HDR_LEN_S)  argument
799 #define IP_HDR_LEN_G(x) (((x) >> IP_HDR_LEN_S) & IP_HDR_LEN_M)  argument
803 #define ETH_HDR_LEN_V(x) ((x) << ETH_HDR_LEN_S)  argument
804 #define ETH_HDR_LEN_G(x) (((x) >> ETH_HDR_LEN_S) & ETH_HDR_LEN_M)  argument
809 #define SYN_MAC_IDX_V(x) ((x) << SYN_MAC_IDX_S)  argument
810 #define SYN_MAC_IDX_G(x) (((x) >> SYN_MAC_IDX_S) & SYN_MAC_IDX_M)  argument
813 #define SYN_XACT_MATCH_V(x) ((x) << SYN_XACT_MATCH_S)  argument
818 #define SYN_INTF_V(x) ((x) << SYN_INTF_S)  argument
819 #define SYN_INTF_G(x) (((x) >> SYN_INTF_S) & SYN_INTF_M)  argument
828 #define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S)  argument
832 #define RX_DACK_MODE_V(x) ((x) << RX_DACK_MODE_S)  argument
833 #define RX_DACK_MODE_G(x) (((x) >> RX_DACK_MODE_S) & RX_DACK_MODE_M)  argument
836 #define RX_DACK_CHANGE_V(x) ((x) << RX_DACK_CHANGE_S)  argument
848 #define CONG_CNTRL_V(x) ((x) << CONG_CNTRL_S)  argument
849 #define CONG_CNTRL_G(x) (((x) >> CONG_CNTRL_S) & CONG_CNTRL_M)  argument
852 #define T5_ISS_V(x) ((x) << T5_ISS_S)  argument