148 		for (i = 0; i < dev->dev->caps.num_ports; i++) {  in is_sqp()
149 			if (qp->mqp.qpn == dev->dev->caps.qp0_proxy[i] ||  in is_sqp()
150 			    qp->mqp.qpn == dev->dev->caps.qp1_proxy[i]) {  in is_sqp()
173 		for (i = 0; i < dev->dev->caps.num_ports; i++) {  in is_qp0()
174 			if (qp->mqp.qpn == dev->dev->caps.qp0_proxy[i]) {  in is_qp0()
381 	if (cap->max_recv_wr > dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE ||  in set_rq_size()
382 	    cap->max_recv_sge > min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg))  in set_rq_size()
406 			min(dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE, qp->rq.wqe_cnt);  in set_rq_size()
408 					min(dev->dev->caps.max_sq_sg,  in set_rq_size()
409 					    dev->dev->caps.max_rq_sg));  in set_rq_size()
421 	if (cap->max_send_wr  > (dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE) ||  in set_kernel_sq_size()
422 	    cap->max_send_sge > min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg) ||  in set_kernel_sq_size()
424 	    sizeof (struct mlx4_wqe_inline_seg) > dev->dev->caps.max_sq_desc_sz)  in set_kernel_sq_size()
433 	    cap->max_send_sge + 2 > dev->dev->caps.max_sq_sg)  in set_kernel_sq_size()
440 	if (s > dev->dev->caps.max_sq_desc_sz)  in set_kernel_sq_size()
474 	if (dev->dev->caps.fw_ver >= MLX4_FW_VER_WQE_CTRL_NEC &&  in set_kernel_sq_size()
495 		if (qp->sq.wqe_cnt <= dev->dev->caps.max_wqes)  in set_kernel_sq_size()
504 	qp->sq.max_gs = (min(dev->dev->caps.max_sq_desc_sz,  in set_kernel_sq_size()
522 				min(dev->dev->caps.max_sq_sg,  in set_kernel_sq_size()
523 				    dev->dev->caps.max_rq_sg));  in set_kernel_sq_size()
535 	if ((1 << ucmd->log_sq_bb_count) > dev->dev->caps.max_wqes	 ||  in set_user_sq_size()
537 		ilog2(roundup_pow_of_two(dev->dev->caps.max_sq_desc_sz)) ||  in set_user_sq_size()
613 	for (i = 0; i < dev->caps.num_ports; i++) {  in qp0_enabled_vf()
614 		if (qpn == dev->caps.qp0_proxy[i])  in qp0_enabled_vf()
615 			return !!dev->caps.qp0_qkey[i];  in qp0_enabled_vf()
1078 		return dev->dev->caps.qp0_proxy[attr->port_num - 1];  in get_sqp_num()
1080 		return dev->dev->caps.qp1_proxy[attr->port_num - 1];  in get_sqp_num()
1126 		if (!(to_mdev(pd->device)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))  in mlx4_ib_create_qp()
1289 		       !(1 << path->static_rate & dev->dev->caps.stat_rate_support))  in _mlx4_set_path()
1295 		if (ah->grh.sgid_index >= dev->dev->caps.gid_table_len[port]) {  in _mlx4_set_path()
1297 			       ah->grh.sgid_index, dev->dev->caps.gid_table_len[port] - 1);  in _mlx4_set_path()
1497 					      ilog2(dev->dev->caps.max_gso_sz);  in __mlx4_ib_modify_qp()
1507 			ilog2(dev->dev->caps.max_msg_sz);  in __mlx4_ib_modify_qp()
1579 		    attr->alt_port_num > dev->dev->caps.num_ports)  in __mlx4_ib_modify_qp()
1583 		    dev->dev->caps.pkey_table_len[attr->alt_port_num])  in __mlx4_ib_modify_qp()
1716 		if (dev->dev->caps.tunnel_offload_mode ==  MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {  in __mlx4_ib_modify_qp()
1978 		if (attr->pkey_index >= dev->dev->caps.pkey_table_len[p]) {  in mlx4_ib_modify_qp()
1988 	    attr->max_rd_atomic > dev->dev->caps.max_qp_init_rdma) {  in mlx4_ib_modify_qp()
1997 	    attr->max_dest_rd_atomic > dev->dev->caps.max_qp_dest_rdma) {  in mlx4_ib_modify_qp()
2023 	for (i = 0; i < dev->caps.num_ports; i++) {  in vf_get_qp0_qkey()
2024 		if (qpn == dev->caps.qp0_proxy[i] ||  in vf_get_qp0_qkey()
2025 		    qpn == dev->caps.qp0_tunnel[i]) {  in vf_get_qp0_qkey()
2026 			*qkey = dev->caps.qp0_qkey[i];  in vf_get_qp0_qkey()
2087 			cpu_to_be32(mdev->dev->caps.qp0_tunnel[sqp->qp.port - 1]);  in build_sriov_qp0_header()
2507 		dseg->dqpn = cpu_to_be32(dev->dev->caps.qp1_tunnel[port - 1]);  in set_tunnel_datagram_seg()
2509 		dseg->dqpn = cpu_to_be32(dev->dev->caps.qp0_tunnel[port - 1]);  in set_tunnel_datagram_seg()
3088 	if (ib_ah_attr->port_num == 0 || ib_ah_attr->port_num > dev->caps.num_ports)  in to_ib_ah_attr()