359 static inline u64 qib_read_kreg64(const struct qib_devdata *dd,  in qib_read_kreg64()  function
754 	hwerrs = qib_read_kreg64(dd, kr_hwerrstatus);  in qib_handle_6120_hwerrors()
977 	sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror);  in qib_disarm_6120_senderrbufs()
978 	sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1);  in qib_disarm_6120_senderrbufs()
1076 		u64 ibcs = qib_read_kreg64(dd, kr_ibcstatus);  in handle_6120_errors()
1144 	extsval = qib_read_kreg64(dd, kr_extstatus);  in qib_6120_init_hwerrors()
1170 	dd->cspec->errormask = qib_read_kreg64(dd, kr_errmask);  in qib_6120_init_hwerrors()
1279 	val = qib_read_kreg64(dd, kr_serdes_cfg0);  in qib_6120_bringup_serdes()
1280 	config1 = qib_read_kreg64(dd, kr_serdes_cfg1);  in qib_6120_bringup_serdes()
1296 	qib_read_kreg64(dd, kr_scratch);  in qib_6120_bringup_serdes()
1316 	(void) qib_read_kreg64(dd, kr_scratch);  in qib_6120_bringup_serdes()
1328 	(void) qib_read_kreg64(dd, kr_scratch);  in qib_6120_bringup_serdes()
1330 	val = qib_read_kreg64(dd, kr_xgxs_cfg);  in qib_6120_bringup_serdes()
1342 	val = qib_read_kreg64(dd, kr_serdes_cfg0);  in qib_6120_bringup_serdes()
1360 	hwstat = qib_read_kreg64(dd, kr_hwerrstatus);  in qib_6120_bringup_serdes()
1396 		diagc = qib_read_kreg64(dd, kr_hwdiagctrl);  in qib_6120_quiet_serdes()
1419 	val = qib_read_kreg64(dd, kr_serdes_cfg0);  in qib_6120_quiet_serdes()
1467 		val = qib_read_kreg64(dd, kr_ibcstatus);  in qib_6120_setup_setextled()
1547 		estat = qib_read_kreg64(dd, kr_errstatus);  in unlikely_6120_intr()
2629 	errormask = qib_read_kreg64(dd, kr_errmask);  in qib_chk_6120_errormask()
2635 	hwerrs = qib_read_kreg64(dd, kr_hwerrstatus);  in qib_chk_6120_errormask()
2711 	prev_val = qib_read_kreg64(dd, kr_xgxs_cfg);  in qib_6120_xgxs_reset()
3107 	read_val = qib_read_kreg64(dd, kr_extstatus);  in gpio_6120_mod()
3128 	dd->piobufbase = qib_read_kreg64(dd, kr_sendpiobufbase);  in get_6120_chip_params()
3133 	val = qib_read_kreg64(dd, kr_sendpiosize);  in get_6120_chip_params()
3142 	val = qib_read_kreg64(dd, kr_sendpiobufcnt);  in get_6120_chip_params()
3198 	val = qib_read_kreg64(dd, kr_sendpioavailaddr);  in qib_late_6120_initreg()
3370 	qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */  in get_6120_link_buf()
3378 	qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */  in get_6120_link_buf()
3581 	if (qib_read_kreg64(dd, kr_hwerrstatus) &  in qib_init_iba6120_funcs()