749 static inline void qib_write_kreg(const struct qib_devdata *dd,
852 static inline void qib_write_kreg(const struct qib_devdata *dd,  in qib_write_kreg()  function
890 	qib_write_kreg(dd, regno + ctxt, value);  in qib_write_kreg_ctxt()
1365 			qib_write_kreg(dd, kr_sendbuffererror + i, sbuf[i]);  in qib_disarm_7322_senderrbufs()
1508 		qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1520 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1525 		qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_sdma_sendctrl()
1697 	qib_write_kreg(dd, kr_errclear, errs);  in handle_7322_errors()
1754 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_error_tasklet()
2030 		qib_write_kreg(dd, kr_intmask, dd->cspec->int_enable_mask);  in qib_7322_set_intr_state()
2032 		qib_write_kreg(dd, kr_intclear, 0ULL);  in qib_7322_set_intr_state()
2038 				qib_write_kreg(dd, kr_intgranted, val);  in qib_7322_set_intr_state()
2041 		qib_write_kreg(dd, kr_intmask, 0ULL);  in qib_7322_set_intr_state()
2064 	qib_write_kreg(dd, kr_errmask, 0ULL);  in qib_7322_clear_freeze()
2075 	qib_write_kreg(dd, kr_control, dd->control);  in qib_7322_clear_freeze()
2084 	qib_write_kreg(dd, kr_hwerrclear, 0ULL);  in qib_7322_clear_freeze()
2085 	qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE);  in qib_7322_clear_freeze()
2086 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_7322_clear_freeze()
2127 	qib_write_kreg(dd, kr_hwerrclear, hwerrs &  in qib_7322_handle_hwerrors()
2166 		qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_handle_hwerrors()
2236 	qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed));  in qib_7322_init_hwerrors()
2237 	qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_init_hwerrors()
2240 	qib_write_kreg(dd, kr_errclear, ~0ULL);  in qib_7322_init_hwerrors()
2242 	qib_write_kreg(dd, kr_errmask, ~0ULL);  in qib_7322_init_hwerrors()
2259 		qib_write_kreg(dd, kr_errclear, QIB_E_SPIOARMLAUNCH);  in qib_set_7322_armlaunch()
2263 	qib_write_kreg(dd, kr_errmask, dd->cspec->errormask);  in qib_set_7322_armlaunch()
2313 	qib_write_kreg(dd, kr_scratch, 0);  in qib_set_ib_7322_lstate()
2359 	qib_write_kreg(dd, kr_scratch, 0ULL);  in set_vls()
2372 	qib_write_kreg(dd, kr_scratch, 0ULL);  in set_vls()
2400 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_bringup_serdes()
2499 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_bringup_serdes()
2509 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_bringup_serdes()
2573 		qib_write_kreg(dd, kr_hwdiagctrl,  in qib_7322_mini_quiet_serdes()
2601 		qib_write_kreg(dd, kr_hwdiagctrl, diagc);  in qib_7322_mini_quiet_serdes()
2671 	qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in qib_setup_7322_setextled()
2697 			qib_write_kreg(dd, KREG_IDX(DCACtrlA),  in qib_7322_notify_dca()
2723 		qib_write_kreg(dd, rmp->regno,  in qib_update_rhdrq_dca()
2726 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);  in qib_update_rhdrq_dca()
2751 		qib_write_kreg(dd, KREG_IDX(DCACtrlF),  in qib_update_sdma_dca()
2756 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);  in qib_update_sdma_dca()
2793 		qib_write_kreg(dd, KREG_IDX(DCACtrlB) + i,  in qib_setup_dca()
2869 		qib_write_kreg(dd, kr_intgranted, intgranted);  in qib_7322_nomsix()
2890 		qib_write_kreg(dd, KREG_IDX(DCACtrlA), dd->cspec->dca_ctrl);  in qib_setup_7322_cleanup()
2909 			qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in qib_setup_7322_cleanup()
2951 	qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);  in qib_wantpiobuf_7322_intr()
2952 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_wantpiobuf_7322_intr()
2970 	qib_write_kreg(dd, kr_intmask, (dd->cspec->int_enable_mask & ~kills));  in unknown_7322_ibits()
2995 	qib_write_kreg(dd, kr_gpio_clear, gpiostatus);  in unknown_7322_gpio_intr()
3034 		qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in unknown_7322_gpio_intr()
3049 		qib_write_kreg(dd, kr_errmask, 0ULL);  in unlikely_7322_intr()
3079 	qib_write_kreg(dd, kr_rcvavailtimeout + rcd->ctxt, timeout);  in adjust_rcv_timeout()
3142 	qib_write_kreg(dd, kr_intclear, istat);  in qib_7322intr()
3200 	qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) |  in qib_7322pintr()
3227 	qib_write_kreg(dd, kr_intclear, QIB_I_SPIOBUFAVAIL);  in qib_7322bufavail()
3258 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_intr()
3285 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_idle_intr()
3312 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_progress_intr()
3340 	qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?  in sdma_cleanup_intr()
3426 		qib_write_kreg(dd, kr_intclear, ~0ULL);  in qib_setup_7322_interrupt()
3429 		qib_write_kreg(dd, kr_intgranted, ~0ULL);  in qib_setup_7322_interrupt()
3430 		qib_write_kreg(dd, kr_vecclr_wo_int, ~0ULL);  in qib_setup_7322_interrupt()
3576 		qib_write_kreg(dd, kr_intredirect + i, redirect[i]);  in qib_setup_7322_interrupt()
3773 			qib_write_kreg(dd, 2 * i +  in qib_do_7322_reset()
3776 			qib_write_kreg(dd, 1 + 2 * i +  in qib_do_7322_reset()
4001 	qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);  in qib_7322_config_ctxts()
4203 			qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4217 			qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4237 		qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4254 		qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_set_ib_cfg()
4366 	qib_write_kreg(dd, kr_scratch, 0);  in qib_7322_set_ib_cfg()
4401 		qib_write_kreg(ppd->dd, kr_scratch, 0);  in qib_7322_set_loopback()
4442 		qib_write_kreg(dd, kr_scratch, 0);  in set_vl_weights()
4593 		qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl);  in rcvctrl_7322_mod()
4709 			qib_write_kreg(dd, kr_sendctrl,  in sendctrl_7322_mod()
4712 			qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4728 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4742 		qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl);  in sendctrl_7322_mod()
4743 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4748 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4752 		qib_write_kreg(dd, kr_sendctrl, dd->sendctrl);  in sendctrl_7322_mod()
4753 		qib_write_kreg(dd, kr_scratch, 0);  in sendctrl_7322_mod()
4767 		qib_write_kreg(dd, kr_scratch, v);  in sendctrl_7322_mod()
4769 		qib_write_kreg(dd, kr_scratch, v);  in sendctrl_7322_mod()
5249 	qib_write_kreg(dd, kr_hwerrmask,  in qib_7322_mini_pcs_reset()
5259 	qib_write_kreg(dd, kr_scratch, 0ULL);  in qib_7322_mini_pcs_reset()
5260 	qib_write_kreg(dd, kr_hwerrclear,  in qib_7322_mini_pcs_reset()
5262 	qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);  in qib_7322_mini_pcs_reset()
5393 	qib_write_kreg(ppd->dd, kr_scratch, 0);  in set_7322_ibspeed_fast()
5769 		qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in gpio_7322_mod()
5770 		qib_write_kreg(dd, kr_gpio_out, new_out);  in gpio_7322_mod()
5970 		qib_write_kreg(dd, idx, tval);  in sendctrl_hook()
5971 		qib_write_kreg(dd, kr_scratch, 0Ull);  in sendctrl_hook()
6090 	qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl);  in qib_init_7322_qsfp()
6091 	qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask);  in qib_init_7322_qsfp()
6231 	qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize);  in qib_late_7322_initreg()
6232 	qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize);  in qib_late_7322_initreg()
6233 	qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt);  in qib_late_7322_initreg()
6234 	qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys);  in qib_late_7322_initreg()
6253 	qib_write_kreg(dd, kr_control, dd->control);  in qib_late_7322_initreg()
6271 	qib_write_kreg(dd, kr_control, dd->control);  in qib_late_7322_initreg()
6300 		qib_write_kreg(ppd->dd, kr_scratch, 0);  in write_7322_init_portregs()
6349 	qib_write_kreg(dd, KREG_IDX(RcvQPMulticastContext_1), 1);  in write_7322_initregs()
6401 		qib_write_kreg(dd, kr_rcvavailtimeout + i, rcv_int_timeout);  in write_7322_initregs()
7211 		qib_write_kreg(dd, kr_sendcheckmask + i,  in qib_7322_txchk_change()
7215 		qib_write_kreg(dd, kr_sendgrhcheckmask + i,  in qib_7322_txchk_change()
7217 		qib_write_kreg(dd, kr_sendibpktmask + i,  in qib_7322_txchk_change()
7232 	qib_write_kreg(dd, kr_scratch, val);  in writescratch()
7374 	qib_write_kreg(dd, kr_hwdiagctrl, 0);  in qib_init_iba7322_funcs()
7432 	qib_write_kreg(dd, regidx, pack_ent);  in set_txdds()
7434 	qib_write_kreg(ppd->dd, kr_scratch, 0);  in set_txdds()
7813 	qib_write_kreg(dd, KR_AHB_ACC, acc);  in ahb_mod()
7832 		qib_write_kreg(dd, KR_AHB_TRANS, trans);  in ahb_mod()
7855 		qib_write_kreg(dd, KR_AHB_TRANS, trans);  in ahb_mod()
7870 	qib_write_kreg(dd, KR_AHB_ACC, prev_acc);  in ahb_mod()
8327 	qib_write_kreg(dd, kr_r_access, val);  in qib_r_grab()
8370 		qib_write_kreg(dd, kr_r_access, val);  in qib_r_shift()
8378 	qib_write_kreg(dd, kr_r_access, val);  in qib_r_shift()
8396 		qib_write_kreg(dd, kr_r_access, val);  in qib_r_update()
8538 	qib_write_kreg(dd, kr_control, dd->control |  in check_7322_rxe_status()
8551 		qib_write_kreg(dd, kr_fmask, 0ULL);  in check_7322_rxe_status()
8556 	qib_write_kreg(ppd->dd, kr_hwerrclear,  in check_7322_rxe_status()
8560 	qib_write_kreg(dd, kr_control, dd->control);  in check_7322_rxe_status()