52 static inline void smmu_writel(struct tegra_smmu *smmu, u32 value,  in smmu_writel()  argument
55 	writel(value, smmu->regs + offset);  in smmu_writel()
140 	u32 value;  in smmu_flush_ptc()  local
147 			value = (phys >> 32) & SMMU_PTC_FLUSH_HI_MASK;  in smmu_flush_ptc()
149 			value = 0;  in smmu_flush_ptc()
151 			smmu_writel(smmu, value, SMMU_PTC_FLUSH_HI);  in smmu_flush_ptc()
154 		value = (phys + offset) | SMMU_PTC_FLUSH_TYPE_ADR;  in smmu_flush_ptc()
156 		value = SMMU_PTC_FLUSH_TYPE_ALL;  in smmu_flush_ptc()
159 	smmu_writel(smmu, value, SMMU_PTC_FLUSH);  in smmu_flush_ptc()
170 	u32 value;  in smmu_flush_tlb_asid()  local
172 	value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) |  in smmu_flush_tlb_asid()
174 	smmu_writel(smmu, value, SMMU_TLB_FLUSH);  in smmu_flush_tlb_asid()
181 	u32 value;  in smmu_flush_tlb_section()  local
183 	value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) |  in smmu_flush_tlb_section()
185 	smmu_writel(smmu, value, SMMU_TLB_FLUSH);  in smmu_flush_tlb_section()
192 	u32 value;  in smmu_flush_tlb_group()  local
194 	value = SMMU_TLB_FLUSH_ASID_MATCH | SMMU_TLB_FLUSH_ASID(asid) |  in smmu_flush_tlb_group()
196 	smmu_writel(smmu, value, SMMU_TLB_FLUSH);  in smmu_flush_tlb_group()
316 	u32 value;  in tegra_smmu_enable()  local
324 		value = smmu_readl(smmu, client->smmu.reg);  in tegra_smmu_enable()
325 		value |= BIT(client->smmu.bit);  in tegra_smmu_enable()
326 		smmu_writel(smmu, value, client->smmu.reg);  in tegra_smmu_enable()
331 		value = smmu_readl(smmu, group->reg);  in tegra_smmu_enable()
332 		value &= ~SMMU_ASID_MASK;  in tegra_smmu_enable()
333 		value |= SMMU_ASID_VALUE(asid);  in tegra_smmu_enable()
334 		value |= SMMU_ASID_ENABLE;  in tegra_smmu_enable()
335 		smmu_writel(smmu, value, group->reg);  in tegra_smmu_enable()
344 	u32 value;  in tegra_smmu_disable()  local
348 		value = smmu_readl(smmu, group->reg);  in tegra_smmu_disable()
349 		value &= ~SMMU_ASID_MASK;  in tegra_smmu_disable()
350 		value |= SMMU_ASID_VALUE(asid);  in tegra_smmu_disable()
351 		value &= ~SMMU_ASID_ENABLE;  in tegra_smmu_disable()
352 		smmu_writel(smmu, value, group->reg);  in tegra_smmu_disable()
361 		value = smmu_readl(smmu, client->smmu.reg);  in tegra_smmu_disable()
362 		value &= ~BIT(client->smmu.bit);  in tegra_smmu_disable()
363 		smmu_writel(smmu, value, client->smmu.reg);  in tegra_smmu_disable()
370 	u32 value;  in tegra_smmu_as_prepare()  local
387 	value = SMMU_PTB_DATA_VALUE(as->pd, as->attr);  in tegra_smmu_as_prepare()
388 	smmu_writel(smmu, value, SMMU_PTB_DATA);  in tegra_smmu_as_prepare()
684 	u32 value;  in tegra_smmu_probe()  local
725 	value = SMMU_PTC_CONFIG_ENABLE | SMMU_PTC_CONFIG_INDEX_MAP(0x3f);  in tegra_smmu_probe()
728 		value |= SMMU_PTC_CONFIG_REQ_LIMIT(8);  in tegra_smmu_probe()
730 	smmu_writel(smmu, value, SMMU_PTC_CONFIG);  in tegra_smmu_probe()
732 	value = SMMU_TLB_CONFIG_HIT_UNDER_MISS |  in tegra_smmu_probe()
736 		value |= SMMU_TLB_CONFIG_ROUND_ROBIN_ARBITRATION;  in tegra_smmu_probe()
738 	smmu_writel(smmu, value, SMMU_TLB_CONFIG);  in tegra_smmu_probe()