129 	u8 val;  in cx22702_set_inversion()  local
131 	val = cx22702_readreg(state, 0x0C);  in cx22702_set_inversion()
136 		val |= 0x01;  in cx22702_set_inversion()
139 		val &= 0xfe;  in cx22702_set_inversion()
144 	return cx22702_writereg(state, 0x0C, val);  in cx22702_set_inversion()
151 	u8 val;  in cx22702_get_tps()  local
157 	val = cx22702_readreg(state, 0x01);  in cx22702_get_tps()
158 	switch ((val & 0x18) >> 3) {  in cx22702_get_tps()
169 	switch (val & 0x07) {  in cx22702_get_tps()
185 	val = cx22702_readreg(state, 0x02);  in cx22702_get_tps()
186 	switch ((val & 0x38) >> 3) {  in cx22702_get_tps()
203 	switch (val & 0x07) {  in cx22702_get_tps()
221 	val = cx22702_readreg(state, 0x03);  in cx22702_get_tps()
222 	switch ((val & 0x0c) >> 2) {  in cx22702_get_tps()
236 	switch (val & 0x03) {  in cx22702_get_tps()
251 	u8 val;  in cx22702_i2c_gate_ctrl()  local
254 	val = cx22702_readreg(state, 0x0D);  in cx22702_i2c_gate_ctrl()
256 		val &= 0xfe;  in cx22702_i2c_gate_ctrl()
258 		val |= 0x01;  in cx22702_i2c_gate_ctrl()
259 	return cx22702_writereg(state, 0x0D, val);  in cx22702_i2c_gate_ctrl()
266 	u8 val;  in cx22702_set_tps()  local
279 	val = cx22702_readreg(state, 0x0C) & 0xcf;  in cx22702_set_tps()
282 		val |= 0x20;  in cx22702_set_tps()
285 		val |= 0x10;  in cx22702_set_tps()
293 	cx22702_writereg(state, 0x0C, val);  in cx22702_set_tps()
321 		val = 0x00;  in cx22702_set_tps()
324 		val = 0x08;  in cx22702_set_tps()
327 		val = 0x10;  in cx22702_set_tps()
337 		val |= 0x01;  in cx22702_set_tps()
340 		val |= 0x02;  in cx22702_set_tps()
343 		val |= 0x03;  in cx22702_set_tps()
349 	cx22702_writereg(state, 0x06, val);  in cx22702_set_tps()
354 		val = 0x00;  in cx22702_set_tps()
357 		val = 0x08;  in cx22702_set_tps()
360 		val = 0x10;  in cx22702_set_tps()
363 		val = 0x18;  in cx22702_set_tps()
366 		val = 0x20;  in cx22702_set_tps()
377 		val |= 0x01;  in cx22702_set_tps()
380 		val |= 0x02;  in cx22702_set_tps()
383 		val |= 0x03;  in cx22702_set_tps()
386 		val |= 0x04;  in cx22702_set_tps()
392 	cx22702_writereg(state, 0x07, val);  in cx22702_set_tps()
396 		val = 0x00;  in cx22702_set_tps()
399 		val = 0x04;  in cx22702_set_tps()
402 		val = 0x08;  in cx22702_set_tps()
405 		val = 0x0c;  in cx22702_set_tps()
415 		val |= 0x1;  in cx22702_set_tps()
421 	cx22702_writereg(state, 0x08, val);  in cx22702_set_tps()