Lines Matching refs:intp
132 void stv0900_write_reg(struct stv0900_internal *intp, u16 reg_addr, in stv0900_write_reg() argument
138 .addr = intp->i2c_addr, in stv0900_write_reg()
148 ret = i2c_transfer(intp->i2c_adap, &i2cmsg, 1); in stv0900_write_reg()
153 u8 stv0900_read_reg(struct stv0900_internal *intp, u16 reg) in stv0900_read_reg() argument
160 .addr = intp->i2c_addr, in stv0900_read_reg()
165 .addr = intp->i2c_addr, in stv0900_read_reg()
172 ret = i2c_transfer(intp->i2c_adap, msg, 2); in stv0900_read_reg()
194 void stv0900_write_bits(struct stv0900_internal *intp, u32 label, u8 val) in stv0900_write_bits() argument
198 reg = stv0900_read_reg(intp, (label >> 16) & 0xffff); in stv0900_write_bits()
204 stv0900_write_reg(intp, (label >> 16) & 0xffff, reg); in stv0900_write_bits()
208 u8 stv0900_get_bits(struct stv0900_internal *intp, u32 label) in stv0900_get_bits() argument
215 val = stv0900_read_reg(intp, label >> 16); in stv0900_get_bits()
221 static enum fe_stv0900_error stv0900_initialize(struct stv0900_internal *intp) in stv0900_initialize() argument
225 if (intp == NULL) in stv0900_initialize()
228 intp->chip_id = stv0900_read_reg(intp, R0900_MID); in stv0900_initialize()
230 if (intp->errs != STV0900_NO_ERROR) in stv0900_initialize()
231 return intp->errs; in stv0900_initialize()
234 stv0900_write_reg(intp, R0900_P1_DMDISTATE, 0x5c); in stv0900_initialize()
235 stv0900_write_reg(intp, R0900_P2_DMDISTATE, 0x5c); in stv0900_initialize()
237 stv0900_write_reg(intp, R0900_P1_TNRCFG, 0x6c); in stv0900_initialize()
238 stv0900_write_reg(intp, R0900_P2_TNRCFG, 0x6f); in stv0900_initialize()
239 stv0900_write_reg(intp, R0900_P1_I2CRPT, 0x20); in stv0900_initialize()
240 stv0900_write_reg(intp, R0900_P2_I2CRPT, 0x20); in stv0900_initialize()
241 stv0900_write_reg(intp, R0900_NCOARSE, 0x13); in stv0900_initialize()
243 stv0900_write_reg(intp, R0900_I2CCFG, 0x08); in stv0900_initialize()
245 switch (intp->clkmode) { in stv0900_initialize()
248 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 in stv0900_initialize()
249 | intp->clkmode); in stv0900_initialize()
253 i = 0x02 & stv0900_read_reg(intp, R0900_SYNTCTRL); in stv0900_initialize()
254 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | i); in stv0900_initialize()
260 stv0900_write_reg(intp, STV0900_InitVal[i][0], in stv0900_initialize()
263 if (stv0900_read_reg(intp, R0900_MID) >= 0x20) { in stv0900_initialize()
264 stv0900_write_reg(intp, R0900_TSGENERAL, 0x0c); in stv0900_initialize()
266 stv0900_write_reg(intp, STV0900_Cut20_AddOnVal[i][0], in stv0900_initialize()
270 stv0900_write_reg(intp, R0900_P1_FSPYCFG, 0x6c); in stv0900_initialize()
271 stv0900_write_reg(intp, R0900_P2_FSPYCFG, 0x6c); in stv0900_initialize()
273 stv0900_write_reg(intp, R0900_P1_PDELCTRL2, 0x01); in stv0900_initialize()
274 stv0900_write_reg(intp, R0900_P2_PDELCTRL2, 0x21); in stv0900_initialize()
276 stv0900_write_reg(intp, R0900_P1_PDELCTRL3, 0x20); in stv0900_initialize()
277 stv0900_write_reg(intp, R0900_P2_PDELCTRL3, 0x20); in stv0900_initialize()
279 stv0900_write_reg(intp, R0900_TSTRES0, 0x80); in stv0900_initialize()
280 stv0900_write_reg(intp, R0900_TSTRES0, 0x00); in stv0900_initialize()
285 static u32 stv0900_get_mclk_freq(struct stv0900_internal *intp, u32 ext_clk) in stv0900_get_mclk_freq() argument
289 div = stv0900_get_bits(intp, F0900_M_DIV); in stv0900_get_mclk_freq()
290 ad_div = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); in stv0900_get_mclk_freq()
299 static enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32 mclk) in stv0900_set_mclk() argument
303 if (intp == NULL) in stv0900_set_mclk()
306 if (intp->errs) in stv0900_set_mclk()
310 intp->quartz); in stv0900_set_mclk()
312 clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6); in stv0900_set_mclk()
313 m_div = ((clk_sel * mclk) / intp->quartz) - 1; in stv0900_set_mclk()
314 stv0900_write_bits(intp, F0900_M_DIV, m_div); in stv0900_set_mclk()
315 intp->mclk = stv0900_get_mclk_freq(intp, in stv0900_set_mclk()
316 intp->quartz); in stv0900_set_mclk()
324 m_div = intp->mclk / 704000; in stv0900_set_mclk()
325 stv0900_write_reg(intp, R0900_P1_F22TX, m_div); in stv0900_set_mclk()
326 stv0900_write_reg(intp, R0900_P1_F22RX, m_div); in stv0900_set_mclk()
328 stv0900_write_reg(intp, R0900_P2_F22TX, m_div); in stv0900_set_mclk()
329 stv0900_write_reg(intp, R0900_P2_F22RX, m_div); in stv0900_set_mclk()
331 if ((intp->errs)) in stv0900_set_mclk()
337 static u32 stv0900_get_err_count(struct stv0900_internal *intp, int cntr, in stv0900_get_err_count() argument
345 hsb = stv0900_get_bits(intp, ERR_CNT12); in stv0900_get_err_count()
346 msb = stv0900_get_bits(intp, ERR_CNT11); in stv0900_get_err_count()
347 lsb = stv0900_get_bits(intp, ERR_CNT10); in stv0900_get_err_count()
350 hsb = stv0900_get_bits(intp, ERR_CNT22); in stv0900_get_err_count()
351 msb = stv0900_get_bits(intp, ERR_CNT21); in stv0900_get_err_count()
352 lsb = stv0900_get_bits(intp, ERR_CNT20); in stv0900_get_err_count()
364 struct stv0900_internal *intp = state->internal; in stv0900_i2c_gate_ctrl() local
367 stv0900_write_bits(intp, I2CT_ON, enable); in stv0900_i2c_gate_ctrl()
372 static void stv0900_set_ts_parallel_serial(struct stv0900_internal *intp, in stv0900_set_ts_parallel_serial() argument
379 if (intp->chip_id >= 0x20) { in stv0900_set_ts_parallel_serial()
387 stv0900_write_reg(intp, R0900_TSGENERAL, in stv0900_set_ts_parallel_serial()
392 stv0900_write_reg(intp, R0900_TSGENERAL, in stv0900_set_ts_parallel_serial()
394 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
396 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
398 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
400 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
412 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
417 stv0900_write_reg(intp, in stv0900_set_ts_parallel_serial()
432 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
437 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
439 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
441 stv0900_write_bits(intp, in stv0900_set_ts_parallel_serial()
443 stv0900_write_reg(intp, R0900_P1_TSSPEED, in stv0900_set_ts_parallel_serial()
445 stv0900_write_reg(intp, R0900_P2_TSSPEED, in stv0900_set_ts_parallel_serial()
458 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
463 stv0900_write_reg(intp, R0900_TSGENERAL1X, in stv0900_set_ts_parallel_serial()
475 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
476 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
479 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
480 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
483 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
484 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
487 stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
488 stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
496 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
497 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
500 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00); in stv0900_set_ts_parallel_serial()
501 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
504 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
505 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00); in stv0900_set_ts_parallel_serial()
508 stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01); in stv0900_set_ts_parallel_serial()
509 stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01); in stv0900_set_ts_parallel_serial()
515 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1); in stv0900_set_ts_parallel_serial()
516 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0); in stv0900_set_ts_parallel_serial()
517 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1); in stv0900_set_ts_parallel_serial()
518 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0); in stv0900_set_ts_parallel_serial()
564 u32 stv0900_get_freq_auto(struct stv0900_internal *intp, int demod) in stv0900_get_freq_auto() argument
572 freq = (stv0900_get_bits(intp, TUN_RFFREQ2) << 10) + in stv0900_get_freq_auto()
573 (stv0900_get_bits(intp, TUN_RFFREQ1) << 2) + in stv0900_get_freq_auto()
574 stv0900_get_bits(intp, TUN_RFFREQ0); in stv0900_get_freq_auto()
578 round = (stv0900_get_bits(intp, TUN_RFRESTE1) >> 2) + in stv0900_get_freq_auto()
579 stv0900_get_bits(intp, TUN_RFRESTE0); in stv0900_get_freq_auto()
586 void stv0900_set_tuner_auto(struct stv0900_internal *intp, u32 Frequency, in stv0900_set_tuner_auto() argument
595 stv0900_write_bits(intp, TUN_RFFREQ2, (tunerFrequency >> 10)); in stv0900_set_tuner_auto()
596 stv0900_write_bits(intp, TUN_RFFREQ1, (tunerFrequency >> 2) & 0xff); in stv0900_set_tuner_auto()
597 stv0900_write_bits(intp, TUN_RFFREQ0, (tunerFrequency & 0x03)); in stv0900_set_tuner_auto()
599 stv0900_write_bits(intp, TUN_BW, Bandwidth / 2000000); in stv0900_set_tuner_auto()
601 stv0900_write_reg(intp, TNRLD, 1); in stv0900_set_tuner_auto()
604 static s32 stv0900_get_rf_level(struct stv0900_internal *intp, in stv0900_get_rf_level() argument
619 agc_gain = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1), in stv0900_get_rf_level()
620 stv0900_get_bits(intp, AGCIQ_VALUE0)); in stv0900_get_rf_level()
676 struct stv0900_internal *intp = state->internal; in stv0900_carr_get_quality() local
697 if (stv0900_get_bits(intp, LOCK_DEFINITIF)) { in stv0900_carr_get_quality()
702 regval += MAKEWORD(stv0900_get_bits(intp, in stv0900_carr_get_quality()
704 stv0900_get_bits(intp, in stv0900_carr_get_quality()
742 struct stv0900_internal *intp = state->internal; in stv0900_read_ucblocks() local
752 err_val1 = stv0900_read_reg(intp, BBFCRCKO1); in stv0900_read_ucblocks()
753 err_val0 = stv0900_read_reg(intp, BBFCRCKO0); in stv0900_read_ucblocks()
757 err_val1 = stv0900_read_reg(intp, UPCRCKO1); in stv0900_read_ucblocks()
758 err_val0 = stv0900_read_reg(intp, UPCRCKO0); in stv0900_read_ucblocks()
782 static u32 stv0900_get_ber(struct stv0900_internal *intp, in stv0900_get_ber() argument
788 demod_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_ber()
800 ber += stv0900_get_err_count(intp, 0, demod); in stv0900_get_ber()
804 if (stv0900_get_bits(intp, PRFVIT)) { in stv0900_get_ber()
814 ber += stv0900_get_err_count(intp, 0, demod); in stv0900_get_ber()
818 if (stv0900_get_bits(intp, PKTDELIN_LOCK)) { in stv0900_get_ber()
839 int stv0900_get_demod_lock(struct stv0900_internal *intp, in stv0900_get_demod_lock() argument
848 dmd_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_demod_lock()
858 lock = stv0900_get_bits(intp, LOCK_DEFINITIF); in stv0900_get_demod_lock()
876 void stv0900_stop_all_s2_modcod(struct stv0900_internal *intp, in stv0900_stop_all_s2_modcod() argument
887 stv0900_write_reg(intp, regflist + i, 0xff); in stv0900_stop_all_s2_modcod()
890 void stv0900_activate_s2_modcod(struct stv0900_internal *intp, in stv0900_activate_s2_modcod() argument
901 if (intp->chip_id <= 0x11) { in stv0900_activate_s2_modcod()
904 mod_code = stv0900_read_reg(intp, PLHMODCOD); in stv0900_activate_s2_modcod()
930 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
933 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
937 } else if (intp->chip_id >= 0x12) { in stv0900_activate_s2_modcod()
939 stv0900_write_reg(intp, MODCODLST0 + reg_index, 0xff); in stv0900_activate_s2_modcod()
941 stv0900_write_reg(intp, MODCODLSTE, 0xff); in stv0900_activate_s2_modcod()
942 stv0900_write_reg(intp, MODCODLSTF, 0xcf); in stv0900_activate_s2_modcod()
944 stv0900_write_reg(intp, MODCODLST7 + reg_index, 0xcc); in stv0900_activate_s2_modcod()
950 void stv0900_activate_s2_modcod_single(struct stv0900_internal *intp, in stv0900_activate_s2_modcod_single() argument
957 stv0900_write_reg(intp, MODCODLST0, 0xff); in stv0900_activate_s2_modcod_single()
958 stv0900_write_reg(intp, MODCODLST1, 0xf0); in stv0900_activate_s2_modcod_single()
959 stv0900_write_reg(intp, MODCODLSTF, 0x0f); in stv0900_activate_s2_modcod_single()
961 stv0900_write_reg(intp, MODCODLST2 + reg_index, 0); in stv0900_activate_s2_modcod_single()
970 void stv0900_start_search(struct stv0900_internal *intp, in stv0900_start_search() argument
976 stv0900_write_bits(intp, DEMOD_MODE, 0x1f); in stv0900_start_search()
977 if (intp->chip_id == 0x10) in stv0900_start_search()
978 stv0900_write_reg(intp, CORRELEXP, 0xaa); in stv0900_start_search()
980 if (intp->chip_id < 0x20) in stv0900_start_search()
981 stv0900_write_reg(intp, CARHDR, 0x55); in stv0900_start_search()
983 if (intp->chip_id <= 0x20) { in stv0900_start_search()
984 if (intp->symbol_rate[0] <= 5000000) { in stv0900_start_search()
985 stv0900_write_reg(intp, CARCFG, 0x44); in stv0900_start_search()
986 stv0900_write_reg(intp, CFRUP1, 0x0f); in stv0900_start_search()
987 stv0900_write_reg(intp, CFRUP0, 0xff); in stv0900_start_search()
988 stv0900_write_reg(intp, CFRLOW1, 0xf0); in stv0900_start_search()
989 stv0900_write_reg(intp, CFRLOW0, 0x00); in stv0900_start_search()
990 stv0900_write_reg(intp, RTCS2, 0x68); in stv0900_start_search()
992 stv0900_write_reg(intp, CARCFG, 0xc4); in stv0900_start_search()
993 stv0900_write_reg(intp, RTCS2, 0x44); in stv0900_start_search()
997 if (intp->symbol_rate[demod] <= 5000000) in stv0900_start_search()
998 stv0900_write_reg(intp, RTCS2, 0x68); in stv0900_start_search()
1000 stv0900_write_reg(intp, RTCS2, 0x44); in stv0900_start_search()
1002 stv0900_write_reg(intp, CARCFG, 0x46); in stv0900_start_search()
1003 if (intp->srch_algo[demod] == STV0900_WARM_START) { in stv0900_start_search()
1005 freq /= (intp->mclk / 1000); in stv0900_start_search()
1008 freq = (intp->srch_range[demod] / 2000); in stv0900_start_search()
1009 if (intp->symbol_rate[demod] <= 5000000) in stv0900_start_search()
1015 freq /= (intp->mclk / 1000); in stv0900_start_search()
1019 stv0900_write_bits(intp, CFR_UP1, MSB(freq_s16)); in stv0900_start_search()
1020 stv0900_write_bits(intp, CFR_UP0, LSB(freq_s16)); in stv0900_start_search()
1022 stv0900_write_bits(intp, CFR_LOW1, MSB(freq_s16)); in stv0900_start_search()
1023 stv0900_write_bits(intp, CFR_LOW0, LSB(freq_s16)); in stv0900_start_search()
1026 stv0900_write_reg(intp, CFRINIT1, 0); in stv0900_start_search()
1027 stv0900_write_reg(intp, CFRINIT0, 0); in stv0900_start_search()
1029 if (intp->chip_id >= 0x20) { in stv0900_start_search()
1030 stv0900_write_reg(intp, EQUALCFG, 0x41); in stv0900_start_search()
1031 stv0900_write_reg(intp, FFECFG, 0x41); in stv0900_start_search()
1033 if ((intp->srch_standard[demod] == STV0900_SEARCH_DVBS1) || in stv0900_start_search()
1034 (intp->srch_standard[demod] == STV0900_SEARCH_DSS) || in stv0900_start_search()
1035 (intp->srch_standard[demod] == STV0900_AUTO_SEARCH)) { in stv0900_start_search()
1036 stv0900_write_reg(intp, VITSCALE, in stv0900_start_search()
1038 stv0900_write_reg(intp, VAVSRVIT, 0x0); in stv0900_start_search()
1042 stv0900_write_reg(intp, SFRSTEP, 0x00); in stv0900_start_search()
1043 stv0900_write_reg(intp, TMGTHRISE, 0xe0); in stv0900_start_search()
1044 stv0900_write_reg(intp, TMGTHFALL, 0xc0); in stv0900_start_search()
1045 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_start_search()
1046 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_start_search()
1047 stv0900_write_bits(intp, S1S2_SEQUENTIAL, 0); in stv0900_start_search()
1048 stv0900_write_reg(intp, RTC, 0x88); in stv0900_start_search()
1049 if (intp->chip_id >= 0x20) { in stv0900_start_search()
1050 if (intp->symbol_rate[demod] < 2000000) { in stv0900_start_search()
1051 if (intp->chip_id <= 0x20) in stv0900_start_search()
1052 stv0900_write_reg(intp, CARFREQ, 0x39); in stv0900_start_search()
1054 stv0900_write_reg(intp, CARFREQ, 0x89); in stv0900_start_search()
1056 stv0900_write_reg(intp, CARHDR, 0x40); in stv0900_start_search()
1057 } else if (intp->symbol_rate[demod] < 10000000) { in stv0900_start_search()
1058 stv0900_write_reg(intp, CARFREQ, 0x4c); in stv0900_start_search()
1059 stv0900_write_reg(intp, CARHDR, 0x20); in stv0900_start_search()
1061 stv0900_write_reg(intp, CARFREQ, 0x4b); in stv0900_start_search()
1062 stv0900_write_reg(intp, CARHDR, 0x20); in stv0900_start_search()
1066 if (intp->symbol_rate[demod] < 10000000) in stv0900_start_search()
1067 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_start_search()
1069 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_start_search()
1072 switch (intp->srch_algo[demod]) { in stv0900_start_search()
1074 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_start_search()
1075 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_start_search()
1078 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_start_search()
1079 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_start_search()
1269 enum fe_stv0900_error stv0900_st_dvbs2_single(struct stv0900_internal *intp, in stv0900_st_dvbs2_single() argument
1280 if ((intp->demod_mode != STV0900_DUAL) in stv0900_st_dvbs2_single()
1281 || (stv0900_get_bits(intp, F0900_DDEMOD) != 1)) { in stv0900_st_dvbs2_single()
1282 stv0900_write_reg(intp, R0900_GENCFG, 0x1d); in stv0900_st_dvbs2_single()
1284 intp->demod_mode = STV0900_DUAL; in stv0900_st_dvbs2_single()
1286 stv0900_write_bits(intp, F0900_FRESFEC, 1); in stv0900_st_dvbs2_single()
1287 stv0900_write_bits(intp, F0900_FRESFEC, 0); in stv0900_st_dvbs2_single()
1290 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1294 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1298 stv0900_write_reg(intp, R0900_P1_MODCODLSTE, 0xff); in stv0900_st_dvbs2_single()
1299 stv0900_write_reg(intp, R0900_P1_MODCODLSTF, 0xcf); in stv0900_st_dvbs2_single()
1302 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1306 stv0900_write_reg(intp, in stv0900_st_dvbs2_single()
1310 stv0900_write_reg(intp, R0900_P2_MODCODLSTE, 0xff); in stv0900_st_dvbs2_single()
1311 stv0900_write_reg(intp, R0900_P2_MODCODLSTF, 0xcf); in stv0900_st_dvbs2_single()
1317 stv0900_stop_all_s2_modcod(intp, STV0900_DEMOD_1); in stv0900_st_dvbs2_single()
1318 stv0900_activate_s2_modcod_single(intp, in stv0900_st_dvbs2_single()
1320 stv0900_write_reg(intp, R0900_GENCFG, 0x06); in stv0900_st_dvbs2_single()
1322 stv0900_stop_all_s2_modcod(intp, STV0900_DEMOD_2); in stv0900_st_dvbs2_single()
1323 stv0900_activate_s2_modcod_single(intp, in stv0900_st_dvbs2_single()
1325 stv0900_write_reg(intp, R0900_GENCFG, 0x04); in stv0900_st_dvbs2_single()
1328 intp->demod_mode = STV0900_SINGLE; in stv0900_st_dvbs2_single()
1330 stv0900_write_bits(intp, F0900_FRESFEC, 1); in stv0900_st_dvbs2_single()
1331 stv0900_write_bits(intp, F0900_FRESFEC, 0); in stv0900_st_dvbs2_single()
1332 stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 1); in stv0900_st_dvbs2_single()
1333 stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 0); in stv0900_st_dvbs2_single()
1334 stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 1); in stv0900_st_dvbs2_single()
1335 stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 0); in stv0900_st_dvbs2_single()
1348 struct stv0900_internal *intp = NULL; in stv0900_init_internal() local
1397 intp = state->internal; in stv0900_init_internal()
1399 intp->demod_mode = p_init->demod_mode; in stv0900_init_internal()
1400 stv0900_st_dvbs2_single(intp, intp->demod_mode, STV0900_DEMOD_1); in stv0900_init_internal()
1401 intp->chip_id = stv0900_read_reg(intp, R0900_MID); in stv0900_init_internal()
1402 intp->rolloff = p_init->rolloff; in stv0900_init_internal()
1403 intp->quartz = p_init->dmd_ref_clk; in stv0900_init_internal()
1405 stv0900_write_bits(intp, F0900_P1_ROLLOFF_CONTROL, p_init->rolloff); in stv0900_init_internal()
1406 stv0900_write_bits(intp, F0900_P2_ROLLOFF_CONTROL, p_init->rolloff); in stv0900_init_internal()
1408 intp->ts_config = p_init->ts_config; in stv0900_init_internal()
1409 if (intp->ts_config == NULL) in stv0900_init_internal()
1410 stv0900_set_ts_parallel_serial(intp, in stv0900_init_internal()
1414 for (i = 0; intp->ts_config[i].addr != 0xffff; i++) in stv0900_init_internal()
1415 stv0900_write_reg(intp, in stv0900_init_internal()
1416 intp->ts_config[i].addr, in stv0900_init_internal()
1417 intp->ts_config[i].val); in stv0900_init_internal()
1419 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1); in stv0900_init_internal()
1420 stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0); in stv0900_init_internal()
1421 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1); in stv0900_init_internal()
1422 stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0); in stv0900_init_internal()
1425 intp->tuner_type[0] = p_init->tuner1_type; in stv0900_init_internal()
1426 intp->tuner_type[1] = p_init->tuner2_type; in stv0900_init_internal()
1430 stv0900_write_reg(intp, R0900_P1_TNRCFG, 0x3c); in stv0900_init_internal()
1431 stv0900_write_reg(intp, R0900_P1_TNRCFG2, 0x86); in stv0900_init_internal()
1432 stv0900_write_reg(intp, R0900_P1_TNRCFG3, 0x18); in stv0900_init_internal()
1433 stv0900_write_reg(intp, R0900_P1_TNRXTAL, 27); /* 27MHz */ in stv0900_init_internal()
1434 stv0900_write_reg(intp, R0900_P1_TNRSTEPS, 0x05); in stv0900_init_internal()
1435 stv0900_write_reg(intp, R0900_P1_TNRGAIN, 0x17); in stv0900_init_internal()
1436 stv0900_write_reg(intp, R0900_P1_TNRADJ, 0x1f); in stv0900_init_internal()
1437 stv0900_write_reg(intp, R0900_P1_TNRCTL2, 0x0); in stv0900_init_internal()
1438 stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 3); in stv0900_init_internal()
1442 stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 6); in stv0900_init_internal()
1446 stv0900_write_bits(intp, F0900_P1_TUN_MADDRESS, p_init->tun1_maddress); in stv0900_init_internal()
1449 stv0900_write_reg(intp, R0900_TSTTNR1, 0x26); in stv0900_init_internal()
1455 stv0900_write_reg(intp, R0900_P1_TNRLD, 1); /* hw tuner */ in stv0900_init_internal()
1460 stv0900_write_reg(intp, R0900_P2_TNRCFG, 0x3c); in stv0900_init_internal()
1461 stv0900_write_reg(intp, R0900_P2_TNRCFG2, 0x86); in stv0900_init_internal()
1462 stv0900_write_reg(intp, R0900_P2_TNRCFG3, 0x18); in stv0900_init_internal()
1463 stv0900_write_reg(intp, R0900_P2_TNRXTAL, 27); /* 27MHz */ in stv0900_init_internal()
1464 stv0900_write_reg(intp, R0900_P2_TNRSTEPS, 0x05); in stv0900_init_internal()
1465 stv0900_write_reg(intp, R0900_P2_TNRGAIN, 0x17); in stv0900_init_internal()
1466 stv0900_write_reg(intp, R0900_P2_TNRADJ, 0x1f); in stv0900_init_internal()
1467 stv0900_write_reg(intp, R0900_P2_TNRCTL2, 0x0); in stv0900_init_internal()
1468 stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 3); in stv0900_init_internal()
1472 stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 6); in stv0900_init_internal()
1476 stv0900_write_bits(intp, F0900_P2_TUN_MADDRESS, p_init->tun2_maddress); in stv0900_init_internal()
1479 stv0900_write_reg(intp, R0900_TSTTNR3, 0x26); in stv0900_init_internal()
1485 stv0900_write_reg(intp, R0900_P2_TNRLD, 1); /* hw tuner */ in stv0900_init_internal()
1487 stv0900_write_bits(intp, F0900_P1_TUN_IQSWAP, p_init->tun1_iq_inv); in stv0900_init_internal()
1488 stv0900_write_bits(intp, F0900_P2_TUN_IQSWAP, p_init->tun2_iq_inv); in stv0900_init_internal()
1489 stv0900_set_mclk(intp, 135000000); in stv0900_init_internal()
1492 switch (intp->clkmode) { in stv0900_init_internal()
1495 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | intp->clkmode); in stv0900_init_internal()
1498 selosci = 0x02 & stv0900_read_reg(intp, R0900_SYNTCTRL); in stv0900_init_internal()
1499 stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | selosci); in stv0900_init_internal()
1504 intp->mclk = stv0900_get_mclk_freq(intp, intp->quartz); in stv0900_init_internal()
1505 if (intp->errs) in stv0900_init_internal()
1511 static int stv0900_status(struct stv0900_internal *intp, in stv0900_status() argument
1519 demod_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_status()
1527 locked = stv0900_get_bits(intp, LOCK_DEFINITIF) && in stv0900_status()
1528 stv0900_get_bits(intp, PKTDELIN_LOCK) && in stv0900_status()
1529 stv0900_get_bits(intp, TSFIFO_LINEOK); in stv0900_status()
1532 locked = stv0900_get_bits(intp, LOCK_DEFINITIF) && in stv0900_status()
1533 stv0900_get_bits(intp, LOCKEDVIT) && in stv0900_status()
1534 stv0900_get_bits(intp, TSFIFO_LINEOK); in stv0900_status()
1542 tsbitrate0_val = stv0900_read_reg(intp, TSBITRATE0); in stv0900_status()
1543 tsbitrate1_val = stv0900_read_reg(intp, TSBITRATE1); in stv0900_status()
1545 bitrate = (stv0900_get_mclk_freq(intp, intp->quartz)/1000000) in stv0900_status()
1554 static int stv0900_set_mis(struct stv0900_internal *intp, in stv0900_set_mis() argument
1561 stv0900_write_bits(intp, FILTER_EN, 0); in stv0900_set_mis()
1564 stv0900_write_bits(intp, FILTER_EN, 1); in stv0900_set_mis()
1565 stv0900_write_reg(intp, ISIENTRY, mis); in stv0900_set_mis()
1566 stv0900_write_reg(intp, ISIBITENA, 0xff); in stv0900_set_mis()
1576 struct stv0900_internal *intp = state->internal; in stv0900_search() local
1581 struct stv0900_signal_info p_result = intp->result[demod]; in stv0900_search()
1593 stv0900_set_mis(intp, demod, c->stream_id); in stv0900_search()
1608 intp->srch_standard[demod] = p_search.standard; in stv0900_search()
1609 intp->symbol_rate[demod] = p_search.symbol_rate; in stv0900_search()
1610 intp->srch_range[demod] = p_search.search_range; in stv0900_search()
1611 intp->freq[demod] = p_search.frequency; in stv0900_search()
1612 intp->srch_algo[demod] = p_search.search_algo; in stv0900_search()
1613 intp->srch_iq_inv[demod] = p_search.iq_inversion; in stv0900_search()
1614 intp->fec[demod] = p_search.fec; in stv0900_search()
1616 (intp->errs == STV0900_NO_ERROR)) { in stv0900_search()
1617 p_result.locked = intp->result[demod].locked; in stv0900_search()
1618 p_result.standard = intp->result[demod].standard; in stv0900_search()
1619 p_result.frequency = intp->result[demod].frequency; in stv0900_search()
1620 p_result.symbol_rate = intp->result[demod].symbol_rate; in stv0900_search()
1621 p_result.fec = intp->result[demod].fec; in stv0900_search()
1622 p_result.modcode = intp->result[demod].modcode; in stv0900_search()
1623 p_result.pilot = intp->result[demod].pilot; in stv0900_search()
1624 p_result.frame_len = intp->result[demod].frame_len; in stv0900_search()
1625 p_result.spectrum = intp->result[demod].spectrum; in stv0900_search()
1626 p_result.rolloff = intp->result[demod].rolloff; in stv0900_search()
1627 p_result.modulation = intp->result[demod].modulation; in stv0900_search()
1630 switch (intp->err[demod]) { in stv0900_search()
1679 struct stv0900_internal *intp = state->internal; in stv0900_stop_ts() local
1683 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_stop_ts()
1685 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_stop_ts()
1693 struct stv0900_internal *intp = state->internal; in stv0900_diseqc_init() local
1696 stv0900_write_bits(intp, DISTX_MODE, state->config->diseqc_mode); in stv0900_diseqc_init()
1697 stv0900_write_bits(intp, DISEQC_RESET, 1); in stv0900_diseqc_init()
1698 stv0900_write_bits(intp, DISEQC_RESET, 0); in stv0900_diseqc_init()
1713 static int stv0900_diseqc_send(struct stv0900_internal *intp , u8 *data, in stv0900_diseqc_send() argument
1718 stv0900_write_bits(intp, DIS_PRECHARGE, 1); in stv0900_diseqc_send()
1720 while (stv0900_get_bits(intp, FIFO_FULL)) in stv0900_diseqc_send()
1722 stv0900_write_reg(intp, DISTXDATA, data[i]); in stv0900_diseqc_send()
1726 stv0900_write_bits(intp, DIS_PRECHARGE, 0); in stv0900_diseqc_send()
1728 while ((stv0900_get_bits(intp, TX_IDLE) != 1) && (i < 10)) { in stv0900_diseqc_send()
1750 struct stv0900_internal *intp = state->internal; in stv0900_send_burst() local
1757 stv0900_write_bits(intp, DISTX_MODE, 3);/* Unmodulated */ in stv0900_send_burst()
1759 stv0900_diseqc_send(intp, &data, 1, state->demod); in stv0900_send_burst()
1762 stv0900_write_bits(intp, DISTX_MODE, 2);/* Modulated */ in stv0900_send_burst()
1764 stv0900_diseqc_send(intp, &data, 1, state->demod); in stv0900_send_burst()
1775 struct stv0900_internal *intp = state->internal; in stv0900_recv_slave_reply() local
1781 while ((stv0900_get_bits(intp, RX_END) != 1) && (i < 10)) { in stv0900_recv_slave_reply()
1786 if (stv0900_get_bits(intp, RX_END)) { in stv0900_recv_slave_reply()
1787 reply->msg_len = stv0900_get_bits(intp, FIFO_BYTENBR); in stv0900_recv_slave_reply()
1790 reply->msg[i] = stv0900_read_reg(intp, DISRXDATA); in stv0900_recv_slave_reply()
1799 struct stv0900_internal *intp = state->internal; in stv0900_set_tone() local
1807 stv0900_write_bits(intp, DISTX_MODE, 0); in stv0900_set_tone()
1808 stv0900_write_bits(intp, DISEQC_RESET, 1); in stv0900_set_tone()
1810 stv0900_write_bits(intp, DISEQC_RESET, 0); in stv0900_set_tone()
1815 stv0900_write_bits(intp, DISTX_MODE, in stv0900_set_tone()
1818 stv0900_write_bits(intp, DISEQC_RESET, 1); in stv0900_set_tone()
1819 stv0900_write_bits(intp, DISEQC_RESET, 0); in stv0900_set_tone()
1864 struct stv0900_internal *intp = state->internal; in stv0900_get_frontend() local
1866 struct stv0900_signal_info p_result = intp->result[demod]; in stv0900_get_frontend()