Lines Matching refs:intp
38 int stv0900_check_signal_presence(struct stv0900_internal *intp, in stv0900_check_signal_presence() argument
47 carr_offset = (stv0900_read_reg(intp, CFR2) << 8) in stv0900_check_signal_presence()
48 | stv0900_read_reg(intp, CFR1); in stv0900_check_signal_presence()
50 agc2_integr = (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_check_signal_presence()
51 | stv0900_read_reg(intp, AGC2I0); in stv0900_check_signal_presence()
52 max_carrier = intp->srch_range[demod] / 1000; in stv0900_check_signal_presence()
56 max_carrier /= intp->mclk / 1000; in stv0900_check_signal_presence()
68 static void stv0900_get_sw_loop_params(struct stv0900_internal *intp, in stv0900_get_sw_loop_params() argument
77 srate = intp->symbol_rate[demod]; in stv0900_get_sw_loop_params()
78 max_carrier = intp->srch_range[demod] / 1000; in stv0900_get_sw_loop_params()
80 standard = intp->srch_standard[demod]; in stv0900_get_sw_loop_params()
83 max_carrier /= intp->mclk / 1000; in stv0900_get_sw_loop_params()
89 freq_inc /= intp->mclk >> 10; in stv0900_get_sw_loop_params()
135 static int stv0900_search_carr_sw_loop(struct stv0900_internal *intp, in stv0900_search_carr_sw_loop() argument
145 max_carrier = intp->srch_range[demod] / 1000; in stv0900_search_carr_sw_loop()
149 max_carrier /= intp->mclk / 1000; in stv0900_search_carr_sw_loop()
162 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_search_carr_sw_loop()
163 stv0900_write_reg(intp, CFRINIT1, (freqOffset / 256) & 0xff); in stv0900_search_carr_sw_loop()
164 stv0900_write_reg(intp, CFRINIT0, freqOffset & 0xff); in stv0900_search_carr_sw_loop()
165 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_search_carr_sw_loop()
166 stv0900_write_bits(intp, ALGOSWRST, 1); in stv0900_search_carr_sw_loop()
168 if (intp->chip_id == 0x12) { in stv0900_search_carr_sw_loop()
169 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_search_carr_sw_loop()
170 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_search_carr_sw_loop()
182 lock = stv0900_get_demod_lock(intp, demod, Timeout); in stv0900_search_carr_sw_loop()
183 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_search_carr_sw_loop()
191 stv0900_write_bits(intp, ALGOSWRST, 0); in stv0900_search_carr_sw_loop()
196 static int stv0900_sw_algo(struct stv0900_internal *intp, in stv0900_sw_algo() argument
208 stv0900_get_sw_loop_params(intp, &fqc_inc, &sft_stp_tout, in stv0900_sw_algo()
210 switch (intp->srch_standard[demod]) { in stv0900_sw_algo()
213 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
214 stv0900_write_reg(intp, CARFREQ, 0x3b); in stv0900_sw_algo()
216 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_sw_algo()
218 stv0900_write_reg(intp, DMDCFGMD, 0x49); in stv0900_sw_algo()
222 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
223 stv0900_write_reg(intp, CORRELABS, 0x79); in stv0900_sw_algo()
225 stv0900_write_reg(intp, CORRELABS, 0x68); in stv0900_sw_algo()
227 stv0900_write_reg(intp, DMDCFGMD, 0x89); in stv0900_sw_algo()
233 if (intp->chip_id >= 0x20) { in stv0900_sw_algo()
234 stv0900_write_reg(intp, CARFREQ, 0x3b); in stv0900_sw_algo()
235 stv0900_write_reg(intp, CORRELABS, 0x79); in stv0900_sw_algo()
237 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_sw_algo()
238 stv0900_write_reg(intp, CORRELABS, 0x68); in stv0900_sw_algo()
241 stv0900_write_reg(intp, DMDCFGMD, 0xc9); in stv0900_sw_algo()
248 lock = stv0900_search_carr_sw_loop(intp, in stv0900_sw_algo()
254 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_sw_algo()
260 if (intp->chip_id >= 0x20) { in stv0900_sw_algo()
261 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_sw_algo()
262 stv0900_write_reg(intp, CORRELABS, 0x9e); in stv0900_sw_algo()
264 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_sw_algo()
265 stv0900_write_reg(intp, CORRELABS, 0x88); in stv0900_sw_algo()
268 if ((stv0900_get_bits(intp, HEADER_MODE) == in stv0900_sw_algo()
272 s2fw = stv0900_get_bits(intp, FLYWHEEL_CPT); in stv0900_sw_algo()
276 s2fw = stv0900_get_bits(intp, in stv0900_sw_algo()
284 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
285 stv0900_write_reg(intp, in stv0900_sw_algo()
289 stv0900_write_reg(intp, in stv0900_sw_algo()
293 stv0900_write_reg(intp, in stv0900_sw_algo()
308 static u32 stv0900_get_symbol_rate(struct stv0900_internal *intp, in stv0900_get_symbol_rate() argument
314 srate = (stv0900_get_bits(intp, SYMB_FREQ3) << 24) + in stv0900_get_symbol_rate()
315 (stv0900_get_bits(intp, SYMB_FREQ2) << 16) + in stv0900_get_symbol_rate()
316 (stv0900_get_bits(intp, SYMB_FREQ1) << 8) + in stv0900_get_symbol_rate()
317 (stv0900_get_bits(intp, SYMB_FREQ0)); in stv0900_get_symbol_rate()
319 srate, stv0900_get_bits(intp, SYMB_FREQ0), in stv0900_get_symbol_rate()
320 stv0900_get_bits(intp, SYMB_FREQ1), in stv0900_get_symbol_rate()
321 stv0900_get_bits(intp, SYMB_FREQ2), in stv0900_get_symbol_rate()
322 stv0900_get_bits(intp, SYMB_FREQ3)); in stv0900_get_symbol_rate()
336 static void stv0900_set_symbol_rate(struct stv0900_internal *intp, in stv0900_set_symbol_rate() argument
356 stv0900_write_reg(intp, SFRINIT1, (symb >> 8) & 0x7f); in stv0900_set_symbol_rate()
357 stv0900_write_reg(intp, SFRINIT1 + 1, (symb & 0xff)); in stv0900_set_symbol_rate()
360 static void stv0900_set_max_symbol_rate(struct stv0900_internal *intp, in stv0900_set_max_symbol_rate() argument
380 stv0900_write_reg(intp, SFRUP1, (symb >> 8) & 0x7f); in stv0900_set_max_symbol_rate()
381 stv0900_write_reg(intp, SFRUP1 + 1, (symb & 0xff)); in stv0900_set_max_symbol_rate()
383 stv0900_write_reg(intp, SFRUP1, 0x7f); in stv0900_set_max_symbol_rate()
384 stv0900_write_reg(intp, SFRUP1 + 1, 0xff); in stv0900_set_max_symbol_rate()
388 static void stv0900_set_min_symbol_rate(struct stv0900_internal *intp, in stv0900_set_min_symbol_rate() argument
408 stv0900_write_reg(intp, SFRLOW1, (symb >> 8) & 0xff); in stv0900_set_min_symbol_rate()
409 stv0900_write_reg(intp, SFRLOW1 + 1, (symb & 0xff)); in stv0900_set_min_symbol_rate()
412 static s32 stv0900_get_timing_offst(struct stv0900_internal *intp, in stv0900_get_timing_offst() argument
419 timingoffset = (stv0900_read_reg(intp, TMGREG2) << 16) + in stv0900_get_timing_offst()
420 (stv0900_read_reg(intp, TMGREG2 + 1) << 8) + in stv0900_get_timing_offst()
421 (stv0900_read_reg(intp, TMGREG2 + 2)); in stv0900_get_timing_offst()
435 static void stv0900_set_dvbs2_rolloff(struct stv0900_internal *intp, in stv0900_set_dvbs2_rolloff() argument
440 if (intp->chip_id == 0x10) { in stv0900_set_dvbs2_rolloff()
441 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_set_dvbs2_rolloff()
442 rolloff = stv0900_read_reg(intp, MATSTR1) & 0x03; in stv0900_set_dvbs2_rolloff()
443 stv0900_write_bits(intp, ROLLOFF_CONTROL, rolloff); in stv0900_set_dvbs2_rolloff()
444 } else if (intp->chip_id <= 0x20) in stv0900_set_dvbs2_rolloff()
445 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 0); in stv0900_set_dvbs2_rolloff()
447 stv0900_write_bits(intp, MANUALS2_ROLLOFF, 0); in stv0900_set_dvbs2_rolloff()
470 static int stv0900_check_timing_lock(struct stv0900_internal *intp, in stv0900_check_timing_lock() argument
480 car_freq = stv0900_read_reg(intp, CARFREQ); in stv0900_check_timing_lock()
481 tmg_th_high = stv0900_read_reg(intp, TMGTHRISE); in stv0900_check_timing_lock()
482 tmg_th_low = stv0900_read_reg(intp, TMGTHFALL); in stv0900_check_timing_lock()
483 stv0900_write_reg(intp, TMGTHRISE, 0x20); in stv0900_check_timing_lock()
484 stv0900_write_reg(intp, TMGTHFALL, 0x0); in stv0900_check_timing_lock()
485 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_check_timing_lock()
486 stv0900_write_reg(intp, RTC, 0x80); in stv0900_check_timing_lock()
487 stv0900_write_reg(intp, RTCS2, 0x40); in stv0900_check_timing_lock()
488 stv0900_write_reg(intp, CARFREQ, 0x0); in stv0900_check_timing_lock()
489 stv0900_write_reg(intp, CFRINIT1, 0x0); in stv0900_check_timing_lock()
490 stv0900_write_reg(intp, CFRINIT0, 0x0); in stv0900_check_timing_lock()
491 stv0900_write_reg(intp, AGC2REF, 0x65); in stv0900_check_timing_lock()
492 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_check_timing_lock()
496 if (stv0900_get_bits(intp, TMGLOCK_QUALITY) >= 2) in stv0900_check_timing_lock()
505 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_check_timing_lock()
506 stv0900_write_reg(intp, RTC, 0x88); in stv0900_check_timing_lock()
507 stv0900_write_reg(intp, RTCS2, 0x68); in stv0900_check_timing_lock()
508 stv0900_write_reg(intp, CARFREQ, car_freq); in stv0900_check_timing_lock()
509 stv0900_write_reg(intp, TMGTHRISE, tmg_th_high); in stv0900_check_timing_lock()
510 stv0900_write_reg(intp, TMGTHFALL, tmg_th_low); in stv0900_check_timing_lock()
519 struct stv0900_internal *intp = state->internal; in stv0900_get_demod_cold_lock() local
534 srate = intp->symbol_rate[d]; in stv0900_get_demod_cold_lock()
535 search_range = intp->srch_range[d]; in stv0900_get_demod_cold_lock()
542 lock = stv0900_get_demod_lock(intp, d, locktimeout); in stv0900_get_demod_cold_lock()
548 if (stv0900_check_timing_lock(intp, d) == TRUE) { in stv0900_get_demod_cold_lock()
549 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
550 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_get_demod_cold_lock()
551 lock = stv0900_get_demod_lock(intp, d, demod_timeout); in stv0900_get_demod_cold_lock()
558 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
595 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
596 tuner_freq = intp->freq[d]; in stv0900_get_demod_cold_lock()
597 intp->bw[d] = stv0900_carrier_width(intp->symbol_rate[d], in stv0900_get_demod_cold_lock()
598 intp->rolloff) + intp->symbol_rate[d]; in stv0900_get_demod_cold_lock()
608 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
609 if (intp->tuner_type[d] == 3) in stv0900_get_demod_cold_lock()
610 stv0900_set_tuner_auto(intp, tuner_freq, in stv0900_get_demod_cold_lock()
611 intp->bw[d], demod); in stv0900_get_demod_cold_lock()
613 stv0900_set_tuner(fe, tuner_freq, intp->bw[d]); in stv0900_get_demod_cold_lock()
615 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_get_demod_cold_lock()
616 stv0900_write_reg(intp, CFRINIT1, 0); in stv0900_get_demod_cold_lock()
617 stv0900_write_reg(intp, CFRINIT0, 0); in stv0900_get_demod_cold_lock()
618 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
619 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_get_demod_cold_lock()
621 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_get_demod_cold_lock()
622 freq = (tuner_freq * 65536) / (intp->mclk / 1000); in stv0900_get_demod_cold_lock()
623 stv0900_write_bits(intp, CFR_INIT1, MSB(freq)); in stv0900_get_demod_cold_lock()
624 stv0900_write_bits(intp, CFR_INIT0, LSB(freq)); in stv0900_get_demod_cold_lock()
625 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
626 stv0900_write_reg(intp, DMDISTATE, 0x05); in stv0900_get_demod_cold_lock()
629 lock = stv0900_get_demod_lock(intp, d, timeout); in stv0900_get_demod_cold_lock()
686 static void stv0900_set_viterbi_tracq(struct stv0900_internal *intp, in stv0900_set_viterbi_tracq() argument
694 stv0900_write_reg(intp, vth_reg++, 0xd0); in stv0900_set_viterbi_tracq()
695 stv0900_write_reg(intp, vth_reg++, 0x7d); in stv0900_set_viterbi_tracq()
696 stv0900_write_reg(intp, vth_reg++, 0x53); in stv0900_set_viterbi_tracq()
697 stv0900_write_reg(intp, vth_reg++, 0x2f); in stv0900_set_viterbi_tracq()
698 stv0900_write_reg(intp, vth_reg++, 0x24); in stv0900_set_viterbi_tracq()
699 stv0900_write_reg(intp, vth_reg++, 0x1f); in stv0900_set_viterbi_tracq()
702 static void stv0900_set_viterbi_standard(struct stv0900_internal *intp, in stv0900_set_viterbi_standard() argument
712 stv0900_write_reg(intp, FECM, 0x10); in stv0900_set_viterbi_standard()
713 stv0900_write_reg(intp, PRVIT, 0x3f); in stv0900_set_viterbi_standard()
717 stv0900_write_reg(intp, FECM, 0x00); in stv0900_set_viterbi_standard()
721 stv0900_write_reg(intp, PRVIT, 0x2f); in stv0900_set_viterbi_standard()
724 stv0900_write_reg(intp, PRVIT, 0x01); in stv0900_set_viterbi_standard()
727 stv0900_write_reg(intp, PRVIT, 0x02); in stv0900_set_viterbi_standard()
730 stv0900_write_reg(intp, PRVIT, 0x04); in stv0900_set_viterbi_standard()
733 stv0900_write_reg(intp, PRVIT, 0x08); in stv0900_set_viterbi_standard()
736 stv0900_write_reg(intp, PRVIT, 0x20); in stv0900_set_viterbi_standard()
743 stv0900_write_reg(intp, FECM, 0x80); in stv0900_set_viterbi_standard()
747 stv0900_write_reg(intp, PRVIT, 0x13); in stv0900_set_viterbi_standard()
750 stv0900_write_reg(intp, PRVIT, 0x01); in stv0900_set_viterbi_standard()
753 stv0900_write_reg(intp, PRVIT, 0x02); in stv0900_set_viterbi_standard()
756 stv0900_write_reg(intp, PRVIT, 0x10); in stv0900_set_viterbi_standard()
765 static enum fe_stv0900_fec stv0900_get_vit_fec(struct stv0900_internal *intp, in stv0900_get_vit_fec() argument
769 s32 rate_fld = stv0900_get_bits(intp, VIT_CURPUN); in stv0900_get_vit_fec()
798 static void stv0900_set_dvbs1_track_car_loop(struct stv0900_internal *intp, in stv0900_set_dvbs1_track_car_loop() argument
802 if (intp->chip_id >= 0x30) { in stv0900_set_dvbs1_track_car_loop()
804 stv0900_write_reg(intp, ACLC, 0x2b); in stv0900_set_dvbs1_track_car_loop()
805 stv0900_write_reg(intp, BCLC, 0x1a); in stv0900_set_dvbs1_track_car_loop()
807 stv0900_write_reg(intp, ACLC, 0x0c); in stv0900_set_dvbs1_track_car_loop()
808 stv0900_write_reg(intp, BCLC, 0x1b); in stv0900_set_dvbs1_track_car_loop()
810 stv0900_write_reg(intp, ACLC, 0x2c); in stv0900_set_dvbs1_track_car_loop()
811 stv0900_write_reg(intp, BCLC, 0x1c); in stv0900_set_dvbs1_track_car_loop()
815 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_dvbs1_track_car_loop()
816 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_dvbs1_track_car_loop()
824 struct stv0900_internal *intp = state->internal; in stv0900_track_optimization() local
842 srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_track_optimization()
843 srate += stv0900_get_timing_offst(intp, srate, demod); in stv0900_track_optimization()
845 switch (intp->result[demod].standard) { in stv0900_track_optimization()
849 if (intp->srch_standard[demod] == STV0900_AUTO_SEARCH) { in stv0900_track_optimization()
850 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_track_optimization()
851 stv0900_write_bits(intp, DVBS2_ENABLE, 0); in stv0900_track_optimization()
854 stv0900_write_bits(intp, ROLLOFF_CONTROL, intp->rolloff); in stv0900_track_optimization()
855 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_track_optimization()
857 if (intp->chip_id < 0x30) { in stv0900_track_optimization()
858 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_track_optimization()
862 if (stv0900_get_vit_fec(intp, demod) == STV0900_FEC_1_2) { in stv0900_track_optimization()
863 stv0900_write_reg(intp, GAUSSR0, 0x98); in stv0900_track_optimization()
864 stv0900_write_reg(intp, CCIR0, 0x18); in stv0900_track_optimization()
866 stv0900_write_reg(intp, GAUSSR0, 0x18); in stv0900_track_optimization()
867 stv0900_write_reg(intp, CCIR0, 0x18); in stv0900_track_optimization()
870 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_track_optimization()
874 stv0900_write_bits(intp, DVBS1_ENABLE, 0); in stv0900_track_optimization()
875 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_track_optimization()
876 stv0900_write_reg(intp, ACLC, 0); in stv0900_track_optimization()
877 stv0900_write_reg(intp, BCLC, 0); in stv0900_track_optimization()
878 if (intp->result[demod].frame_len == STV0900_LONG_FRAME) { in stv0900_track_optimization()
879 foundModcod = stv0900_get_bits(intp, DEMOD_MODCOD); in stv0900_track_optimization()
880 pilots = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01; in stv0900_track_optimization()
884 intp->chip_id); in stv0900_track_optimization()
886 stv0900_write_reg(intp, ACLC2S2Q, aclc); in stv0900_track_optimization()
888 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
889 stv0900_write_reg(intp, ACLC2S28, aclc); in stv0900_track_optimization()
892 if ((intp->demod_mode == STV0900_SINGLE) && in stv0900_track_optimization()
895 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
896 stv0900_write_reg(intp, ACLC2S216A, in stv0900_track_optimization()
899 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
900 stv0900_write_reg(intp, ACLC2S232A, in stv0900_track_optimization()
906 modulation = intp->result[demod].modulation; in stv0900_track_optimization()
908 modulation, intp->chip_id); in stv0900_track_optimization()
910 stv0900_write_reg(intp, ACLC2S2Q, aclc); in stv0900_track_optimization()
912 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
913 stv0900_write_reg(intp, ACLC2S28, aclc); in stv0900_track_optimization()
915 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
916 stv0900_write_reg(intp, ACLC2S216A, aclc); in stv0900_track_optimization()
918 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
919 stv0900_write_reg(intp, ACLC2S232A, aclc); in stv0900_track_optimization()
924 if (intp->chip_id <= 0x11) { in stv0900_track_optimization()
925 if (intp->demod_mode != STV0900_SINGLE) in stv0900_track_optimization()
926 stv0900_activate_s2_modcod(intp, demod); in stv0900_track_optimization()
930 stv0900_write_reg(intp, ERRCTRL1, 0x67); in stv0900_track_optimization()
935 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_track_optimization()
936 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_track_optimization()
940 freq1 = stv0900_read_reg(intp, CFR2); in stv0900_track_optimization()
941 freq0 = stv0900_read_reg(intp, CFR1); in stv0900_track_optimization()
942 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) { in stv0900_track_optimization()
943 stv0900_write_reg(intp, SFRSTEP, 0x00); in stv0900_track_optimization()
944 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_track_optimization()
945 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_track_optimization()
946 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_track_optimization()
947 stv0900_set_symbol_rate(intp, intp->mclk, srate, demod); in stv0900_track_optimization()
949 if (intp->result[demod].standard != STV0900_DVBS2_STANDARD) in stv0900_track_optimization()
950 stv0900_set_dvbs1_track_car_loop(intp, demod, srate); in stv0900_track_optimization()
954 if (intp->chip_id >= 0x20) { in stv0900_track_optimization()
955 if ((intp->srch_standard[demod] == STV0900_SEARCH_DVBS1) || in stv0900_track_optimization()
956 (intp->srch_standard[demod] == in stv0900_track_optimization()
958 (intp->srch_standard[demod] == in stv0900_track_optimization()
960 stv0900_write_reg(intp, VAVSRVIT, 0x0a); in stv0900_track_optimization()
961 stv0900_write_reg(intp, VITSCALE, 0x0); in stv0900_track_optimization()
965 if (intp->chip_id < 0x20) in stv0900_track_optimization()
966 stv0900_write_reg(intp, CARHDR, 0x08); in stv0900_track_optimization()
968 if (intp->chip_id == 0x10) in stv0900_track_optimization()
969 stv0900_write_reg(intp, CORRELEXP, 0x0a); in stv0900_track_optimization()
971 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_track_optimization()
973 if ((intp->chip_id >= 0x20) || in stv0900_track_optimization()
975 (intp->symbol_rate[demod] < 10000000)) { in stv0900_track_optimization()
976 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
977 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
978 intp->bw[demod] = stv0900_carrier_width(srate, in stv0900_track_optimization()
979 intp->rolloff) + 10000000; in stv0900_track_optimization()
981 if ((intp->chip_id >= 0x20) || (blind_tun_sw == 1)) { in stv0900_track_optimization()
982 if (intp->srch_algo[demod] != STV0900_WARM_START) { in stv0900_track_optimization()
983 if (intp->tuner_type[demod] == 3) in stv0900_track_optimization()
984 stv0900_set_tuner_auto(intp, in stv0900_track_optimization()
985 intp->freq[demod], in stv0900_track_optimization()
986 intp->bw[demod], in stv0900_track_optimization()
990 intp->bw[demod]); in stv0900_track_optimization()
994 if ((intp->srch_algo[demod] == STV0900_BLIND_SEARCH) || in stv0900_track_optimization()
995 (intp->symbol_rate[demod] < 10000000)) in stv0900_track_optimization()
1003 if (stv0900_get_demod_lock(intp, demod, timed / 2) == FALSE) { in stv0900_track_optimization()
1004 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_track_optimization()
1005 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
1006 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
1007 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_track_optimization()
1009 while ((stv0900_get_demod_lock(intp, in stv0900_track_optimization()
1013 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_track_optimization()
1014 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
1015 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
1016 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_track_optimization()
1023 if (intp->chip_id >= 0x20) in stv0900_track_optimization()
1024 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_track_optimization()
1026 if ((intp->result[demod].standard == STV0900_DVBS1_STANDARD) || in stv0900_track_optimization()
1027 (intp->result[demod].standard == STV0900_DSS_STANDARD)) in stv0900_track_optimization()
1028 stv0900_set_viterbi_tracq(intp, demod); in stv0900_track_optimization()
1032 static int stv0900_get_fec_lock(struct stv0900_internal *intp, in stv0900_get_fec_lock() argument
1041 dmd_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_fec_lock()
1051 lock = stv0900_get_bits(intp, PKTDELIN_LOCK); in stv0900_get_fec_lock()
1054 lock = stv0900_get_bits(intp, LOCKEDVIT); in stv0900_get_fec_lock()
1072 static int stv0900_wait_for_lock(struct stv0900_internal *intp, in stv0900_wait_for_lock() argument
1081 lock = stv0900_get_demod_lock(intp, demod, dmd_timeout); in stv0900_wait_for_lock()
1084 lock = stv0900_get_fec_lock(intp, demod, fec_timeout); in stv0900_wait_for_lock()
1093 lock = stv0900_get_bits(intp, TSFIFO_LINEOK); in stv0900_wait_for_lock()
1114 struct stv0900_internal *intp = state->internal; in stv0900_get_standard() local
1117 int hdr_mode = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_standard()
1124 if (stv0900_get_bits(intp, DSS_DVB) == 1) in stv0900_get_standard()
1139 static s32 stv0900_get_carr_freq(struct stv0900_internal *intp, u32 mclk, in stv0900_get_carr_freq() argument
1148 derot = (stv0900_get_bits(intp, CAR_FREQ2) << 16) + in stv0900_get_carr_freq()
1149 (stv0900_get_bits(intp, CAR_FREQ1) << 8) + in stv0900_get_carr_freq()
1150 (stv0900_get_bits(intp, CAR_FREQ0)); in stv0900_get_carr_freq()
1188 struct stv0900_internal *intp = state->internal; in stv0900_get_signal_params() local
1191 struct stv0900_signal_info *result = &intp->result[demod]; in stv0900_get_signal_params()
1200 if (intp->srch_algo[d] == STV0900_BLIND_SEARCH) { in stv0900_get_signal_params()
1201 timing = stv0900_read_reg(intp, TMGREG2); in stv0900_get_signal_params()
1203 stv0900_write_reg(intp, SFRSTEP, 0x5c); in stv0900_get_signal_params()
1206 timing = stv0900_read_reg(intp, TMGREG2); in stv0900_get_signal_params()
1213 if (intp->tuner_type[demod] == 3) in stv0900_get_signal_params()
1214 result->frequency = stv0900_get_freq_auto(intp, d); in stv0900_get_signal_params()
1218 offsetFreq = stv0900_get_carr_freq(intp, intp->mclk, d) / 1000; in stv0900_get_signal_params()
1220 result->symbol_rate = stv0900_get_symbol_rate(intp, intp->mclk, d); in stv0900_get_signal_params()
1221 srate_offset = stv0900_get_timing_offst(intp, result->symbol_rate, d); in stv0900_get_signal_params()
1223 result->fec = stv0900_get_vit_fec(intp, d); in stv0900_get_signal_params()
1224 result->modcode = stv0900_get_bits(intp, DEMOD_MODCOD); in stv0900_get_signal_params()
1225 result->pilot = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01; in stv0900_get_signal_params()
1226 result->frame_len = ((u32)stv0900_get_bits(intp, DEMOD_TYPE)) >> 1; in stv0900_get_signal_params()
1227 result->rolloff = stv0900_get_bits(intp, ROLLOFF_STATUS); in stv0900_get_signal_params()
1233 result->spectrum = stv0900_get_bits(intp, SPECINV_DEMOD); in stv0900_get_signal_params()
1247 result->spectrum = stv0900_get_bits(intp, IQINV); in stv0900_get_signal_params()
1254 if ((intp->srch_algo[d] == STV0900_BLIND_SEARCH) || in stv0900_get_signal_params()
1255 (intp->symbol_rate[d] < 10000000)) { in stv0900_get_signal_params()
1256 offsetFreq = result->frequency - intp->freq[d]; in stv0900_get_signal_params()
1257 if (intp->tuner_type[demod] == 3) in stv0900_get_signal_params()
1258 intp->freq[d] = stv0900_get_freq_auto(intp, d); in stv0900_get_signal_params()
1260 intp->freq[d] = stv0900_get_tuner_freq(fe); in stv0900_get_signal_params()
1262 if (ABS(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500)) in stv0900_get_signal_params()
1269 } else if (ABS(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500)) in stv0900_get_signal_params()
1281 struct stv0900_internal *intp = state->internal; in stv0900_dvbs1_acq_workaround() local
1291 intp->result[demod].locked = FALSE; in stv0900_dvbs1_acq_workaround()
1293 if (stv0900_get_bits(intp, HEADER_MODE) == STV0900_DVBS_FOUND) { in stv0900_dvbs1_acq_workaround()
1294 srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_dvbs1_acq_workaround()
1295 srate += stv0900_get_timing_offst(intp, srate, demod); in stv0900_dvbs1_acq_workaround()
1296 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) in stv0900_dvbs1_acq_workaround()
1297 stv0900_set_symbol_rate(intp, intp->mclk, srate, demod); in stv0900_dvbs1_acq_workaround()
1301 freq1 = stv0900_read_reg(intp, CFR2); in stv0900_dvbs1_acq_workaround()
1302 freq0 = stv0900_read_reg(intp, CFR1); in stv0900_dvbs1_acq_workaround()
1303 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_dvbs1_acq_workaround()
1304 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_dvbs1_acq_workaround()
1306 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_dvbs1_acq_workaround()
1307 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_dvbs1_acq_workaround()
1308 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_dvbs1_acq_workaround()
1309 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_dvbs1_acq_workaround()
1310 if (stv0900_wait_for_lock(intp, demod, in stv0900_dvbs1_acq_workaround()
1312 intp->result[demod].locked = TRUE; in stv0900_dvbs1_acq_workaround()
1316 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_dvbs1_acq_workaround()
1318 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_dvbs1_acq_workaround()
1319 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_dvbs1_acq_workaround()
1320 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_dvbs1_acq_workaround()
1321 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_dvbs1_acq_workaround()
1322 if (stv0900_wait_for_lock(intp, demod, in stv0900_dvbs1_acq_workaround()
1324 intp->result[demod].locked = TRUE; in stv0900_dvbs1_acq_workaround()
1332 intp->result[demod].locked = FALSE; in stv0900_dvbs1_acq_workaround()
1337 static u16 stv0900_blind_check_agc2_min_level(struct stv0900_internal *intp, in stv0900_blind_check_agc2_min_level() argument
1348 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_blind_check_agc2_min_level()
1349 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_blind_check_agc2_min_level()
1350 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_blind_check_agc2_min_level()
1352 stv0900_write_bits(intp, AUTO_GUP, 1); in stv0900_blind_check_agc2_min_level()
1353 stv0900_write_bits(intp, AUTO_GLOW, 1); in stv0900_blind_check_agc2_min_level()
1355 stv0900_write_reg(intp, DMDT0M, 0x0); in stv0900_blind_check_agc2_min_level()
1357 stv0900_set_symbol_rate(intp, intp->mclk, 1000000, demod); in stv0900_blind_check_agc2_min_level()
1358 nb_steps = -1 + (intp->srch_range[demod] / 1000000); in stv0900_blind_check_agc2_min_level()
1367 freq_step = (1000000 << 8) / (intp->mclk >> 8); in stv0900_blind_check_agc2_min_level()
1378 stv0900_write_reg(intp, DMDISTATE, 0x5C); in stv0900_blind_check_agc2_min_level()
1379 stv0900_write_reg(intp, CFRINIT1, (init_freq >> 8) & 0xff); in stv0900_blind_check_agc2_min_level()
1380 stv0900_write_reg(intp, CFRINIT0, init_freq & 0xff); in stv0900_blind_check_agc2_min_level()
1381 stv0900_write_reg(intp, DMDISTATE, 0x58); in stv0900_blind_check_agc2_min_level()
1386 agc2level += (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_blind_check_agc2_min_level()
1387 | stv0900_read_reg(intp, AGC2I0); in stv0900_blind_check_agc2_min_level()
1402 struct stv0900_internal *intp = state->internal; in stv0900_search_srate_coarse() local
1415 if (intp->chip_id >= 0x30) in stv0900_search_srate_coarse()
1420 stv0900_write_bits(intp, DEMOD_MODE, 0x1f); in stv0900_search_srate_coarse()
1421 stv0900_write_reg(intp, TMGCFG, 0x12); in stv0900_search_srate_coarse()
1422 stv0900_write_reg(intp, TMGTHRISE, 0xf0); in stv0900_search_srate_coarse()
1423 stv0900_write_reg(intp, TMGTHFALL, 0xe0); in stv0900_search_srate_coarse()
1424 stv0900_write_bits(intp, SCAN_ENABLE, 1); in stv0900_search_srate_coarse()
1425 stv0900_write_bits(intp, CFR_AUTOSCAN, 1); in stv0900_search_srate_coarse()
1426 stv0900_write_reg(intp, SFRUP1, 0x83); in stv0900_search_srate_coarse()
1427 stv0900_write_reg(intp, SFRUP0, 0xc0); in stv0900_search_srate_coarse()
1428 stv0900_write_reg(intp, SFRLOW1, 0x82); in stv0900_search_srate_coarse()
1429 stv0900_write_reg(intp, SFRLOW0, 0xa0); in stv0900_search_srate_coarse()
1430 stv0900_write_reg(intp, DMDT0M, 0x0); in stv0900_search_srate_coarse()
1431 stv0900_write_reg(intp, AGC2REF, 0x50); in stv0900_search_srate_coarse()
1433 if (intp->chip_id >= 0x30) { in stv0900_search_srate_coarse()
1434 stv0900_write_reg(intp, CARFREQ, 0x99); in stv0900_search_srate_coarse()
1435 stv0900_write_reg(intp, SFRSTEP, 0x98); in stv0900_search_srate_coarse()
1436 } else if (intp->chip_id >= 0x20) { in stv0900_search_srate_coarse()
1437 stv0900_write_reg(intp, CARFREQ, 0x6a); in stv0900_search_srate_coarse()
1438 stv0900_write_reg(intp, SFRSTEP, 0x95); in stv0900_search_srate_coarse()
1440 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_search_srate_coarse()
1441 stv0900_write_reg(intp, SFRSTEP, 0x73); in stv0900_search_srate_coarse()
1444 if (intp->symbol_rate[demod] <= 2000000) in stv0900_search_srate_coarse()
1446 else if (intp->symbol_rate[demod] <= 5000000) in stv0900_search_srate_coarse()
1448 else if (intp->symbol_rate[demod] <= 12000000) in stv0900_search_srate_coarse()
1453 nb_steps = -1 + ((intp->srch_range[demod] / 1000) / currier_step); in stv0900_search_srate_coarse()
1461 currier_step = (intp->srch_range[demod] / 1000) / 10; in stv0900_search_srate_coarse()
1467 tuner_freq = intp->freq[demod]; in stv0900_search_srate_coarse()
1470 stv0900_write_reg(intp, DMDISTATE, 0x5f); in stv0900_search_srate_coarse()
1471 stv0900_write_bits(intp, DEMOD_MODE, 0); in stv0900_search_srate_coarse()
1476 if (stv0900_get_bits(intp, TMGLOCK_QUALITY) >= 2) in stv0900_search_srate_coarse()
1479 agc2_integr += (stv0900_read_reg(intp, AGC2I1) << 8) | in stv0900_search_srate_coarse()
1480 stv0900_read_reg(intp, AGC2I0); in stv0900_search_srate_coarse()
1484 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_coarse()
1503 if (intp->tuner_type[demod] == 3) in stv0900_search_srate_coarse()
1504 stv0900_set_tuner_auto(intp, tuner_freq, in stv0900_search_srate_coarse()
1505 intp->bw[demod], demod); in stv0900_search_srate_coarse()
1508 intp->bw[demod]); in stv0900_search_srate_coarse()
1515 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_coarse()
1523 struct stv0900_internal *intp = state->internal; in stv0900_search_srate_fine() local
1532 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_fine()
1537 symbmax /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1541 symbmin /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1544 symb /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1548 symbmax /= (intp->mclk / 100); in stv0900_search_srate_fine()
1552 symbmin /= (intp->mclk / 100); in stv0900_search_srate_fine()
1555 symb /= (intp->mclk / 100); in stv0900_search_srate_fine()
1559 coarse_freq = (stv0900_read_reg(intp, CFR2) << 8) in stv0900_search_srate_fine()
1560 | stv0900_read_reg(intp, CFR1); in stv0900_search_srate_fine()
1562 if (symbcomp < intp->symbol_rate[demod]) in stv0900_search_srate_fine()
1565 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_search_srate_fine()
1566 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_search_srate_fine()
1567 stv0900_write_reg(intp, TMGTHRISE, 0x20); in stv0900_search_srate_fine()
1568 stv0900_write_reg(intp, TMGTHFALL, 0x00); in stv0900_search_srate_fine()
1569 stv0900_write_reg(intp, TMGCFG, 0xd2); in stv0900_search_srate_fine()
1570 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_search_srate_fine()
1571 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_search_srate_fine()
1573 if (intp->chip_id >= 0x30) in stv0900_search_srate_fine()
1574 stv0900_write_reg(intp, CARFREQ, 0x79); in stv0900_search_srate_fine()
1575 else if (intp->chip_id >= 0x20) in stv0900_search_srate_fine()
1576 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_search_srate_fine()
1578 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_search_srate_fine()
1580 stv0900_write_reg(intp, SFRUP1, (symbmax >> 8) & 0x7f); in stv0900_search_srate_fine()
1581 stv0900_write_reg(intp, SFRUP0, (symbmax & 0xff)); in stv0900_search_srate_fine()
1583 stv0900_write_reg(intp, SFRLOW1, (symbmin >> 8) & 0x7f); in stv0900_search_srate_fine()
1584 stv0900_write_reg(intp, SFRLOW0, (symbmin & 0xff)); in stv0900_search_srate_fine()
1586 stv0900_write_reg(intp, SFRINIT1, (symb >> 8) & 0xff); in stv0900_search_srate_fine()
1587 stv0900_write_reg(intp, SFRINIT0, (symb & 0xff)); in stv0900_search_srate_fine()
1589 stv0900_write_reg(intp, DMDT0M, 0x20); in stv0900_search_srate_fine()
1590 stv0900_write_reg(intp, CFRINIT1, (coarse_freq >> 8) & 0xff); in stv0900_search_srate_fine()
1591 stv0900_write_reg(intp, CFRINIT0, coarse_freq & 0xff); in stv0900_search_srate_fine()
1592 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_search_srate_fine()
1601 struct stv0900_internal *intp = state->internal; in stv0900_blind_search_algo() local
1620 if (intp->chip_id < 0x20) { in stv0900_blind_search_algo()
1628 if (intp->chip_id <= 0x20) in stv0900_blind_search_algo()
1633 agc2_int = stv0900_blind_check_agc2_min_level(intp, demod); in stv0900_blind_search_algo()
1639 if (intp->chip_id == 0x10) in stv0900_blind_search_algo()
1640 stv0900_write_reg(intp, CORRELEXP, 0xaa); in stv0900_blind_search_algo()
1642 if (intp->chip_id < 0x20) in stv0900_blind_search_algo()
1643 stv0900_write_reg(intp, CARHDR, 0x55); in stv0900_blind_search_algo()
1645 stv0900_write_reg(intp, CARHDR, 0x20); in stv0900_blind_search_algo()
1647 if (intp->chip_id <= 0x20) in stv0900_blind_search_algo()
1648 stv0900_write_reg(intp, CARCFG, 0xc4); in stv0900_blind_search_algo()
1650 stv0900_write_reg(intp, CARCFG, 0x6); in stv0900_blind_search_algo()
1652 stv0900_write_reg(intp, RTCS2, 0x44); in stv0900_blind_search_algo()
1654 if (intp->chip_id >= 0x20) { in stv0900_blind_search_algo()
1655 stv0900_write_reg(intp, EQUALCFG, 0x41); in stv0900_blind_search_algo()
1656 stv0900_write_reg(intp, FFECFG, 0x41); in stv0900_blind_search_algo()
1657 stv0900_write_reg(intp, VITSCALE, 0x82); in stv0900_blind_search_algo()
1658 stv0900_write_reg(intp, VAVSRVIT, 0x0); in stv0900_blind_search_algo()
1664 stv0900_write_reg(intp, KREFTMG, k_ref_tmg); in stv0900_blind_search_algo()
1673 lock = stv0900_get_demod_lock(intp, in stv0900_blind_search_algo()
1683 agc2_int = (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_blind_search_algo()
1684 | stv0900_read_reg(intp, AGC2I0); in stv0900_blind_search_algo()
1689 dstatus2 = stv0900_read_reg(intp, DSTATUS2); in stv0900_blind_search_algo()
1709 static void stv0900_set_viterbi_acq(struct stv0900_internal *intp, in stv0900_set_viterbi_acq() argument
1716 stv0900_write_reg(intp, vth_reg++, 0x96); in stv0900_set_viterbi_acq()
1717 stv0900_write_reg(intp, vth_reg++, 0x64); in stv0900_set_viterbi_acq()
1718 stv0900_write_reg(intp, vth_reg++, 0x36); in stv0900_set_viterbi_acq()
1719 stv0900_write_reg(intp, vth_reg++, 0x23); in stv0900_set_viterbi_acq()
1720 stv0900_write_reg(intp, vth_reg++, 0x1e); in stv0900_set_viterbi_acq()
1721 stv0900_write_reg(intp, vth_reg++, 0x19); in stv0900_set_viterbi_acq()
1724 static void stv0900_set_search_standard(struct stv0900_internal *intp, in stv0900_set_search_standard() argument
1730 switch (intp->srch_standard[demod]) { in stv0900_set_search_standard()
1746 switch (intp->srch_standard[demod]) { in stv0900_set_search_standard()
1749 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_set_search_standard()
1750 stv0900_write_bits(intp, DVBS2_ENABLE, 0); in stv0900_set_search_standard()
1751 stv0900_write_bits(intp, STOP_CLKVIT, 0); in stv0900_set_search_standard()
1752 stv0900_set_dvbs1_track_car_loop(intp, in stv0900_set_search_standard()
1754 intp->symbol_rate[demod]); in stv0900_set_search_standard()
1755 stv0900_write_reg(intp, CAR2CFG, 0x22); in stv0900_set_search_standard()
1757 stv0900_set_viterbi_acq(intp, demod); in stv0900_set_search_standard()
1758 stv0900_set_viterbi_standard(intp, in stv0900_set_search_standard()
1759 intp->srch_standard[demod], in stv0900_set_search_standard()
1760 intp->fec[demod], demod); in stv0900_set_search_standard()
1764 stv0900_write_bits(intp, DVBS1_ENABLE, 0); in stv0900_set_search_standard()
1765 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_set_search_standard()
1766 stv0900_write_bits(intp, STOP_CLKVIT, 1); in stv0900_set_search_standard()
1767 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_search_standard()
1768 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_search_standard()
1769 if (intp->chip_id <= 0x20) /*cut 1.x and 2.0*/ in stv0900_set_search_standard()
1770 stv0900_write_reg(intp, CAR2CFG, 0x26); in stv0900_set_search_standard()
1772 stv0900_write_reg(intp, CAR2CFG, 0x66); in stv0900_set_search_standard()
1774 if (intp->demod_mode != STV0900_SINGLE) { in stv0900_set_search_standard()
1775 if (intp->chip_id <= 0x11) in stv0900_set_search_standard()
1776 stv0900_stop_all_s2_modcod(intp, demod); in stv0900_set_search_standard()
1778 stv0900_activate_s2_modcod(intp, demod); in stv0900_set_search_standard()
1781 stv0900_activate_s2_modcod_single(intp, demod); in stv0900_set_search_standard()
1783 stv0900_set_viterbi_tracq(intp, demod); in stv0900_set_search_standard()
1788 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_set_search_standard()
1789 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_set_search_standard()
1790 stv0900_write_bits(intp, STOP_CLKVIT, 0); in stv0900_set_search_standard()
1791 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_search_standard()
1792 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_search_standard()
1793 stv0900_set_dvbs1_track_car_loop(intp, in stv0900_set_search_standard()
1795 intp->symbol_rate[demod]); in stv0900_set_search_standard()
1796 if (intp->chip_id <= 0x20) /*cut 1.x and 2.0*/ in stv0900_set_search_standard()
1797 stv0900_write_reg(intp, CAR2CFG, 0x26); in stv0900_set_search_standard()
1799 stv0900_write_reg(intp, CAR2CFG, 0x66); in stv0900_set_search_standard()
1801 if (intp->demod_mode != STV0900_SINGLE) { in stv0900_set_search_standard()
1802 if (intp->chip_id <= 0x11) in stv0900_set_search_standard()
1803 stv0900_stop_all_s2_modcod(intp, demod); in stv0900_set_search_standard()
1805 stv0900_activate_s2_modcod(intp, demod); in stv0900_set_search_standard()
1808 stv0900_activate_s2_modcod_single(intp, demod); in stv0900_set_search_standard()
1810 stv0900_set_viterbi_tracq(intp, demod); in stv0900_set_search_standard()
1811 stv0900_set_viterbi_standard(intp, in stv0900_set_search_standard()
1812 intp->srch_standard[demod], in stv0900_set_search_standard()
1813 intp->fec[demod], demod); in stv0900_set_search_standard()
1822 struct stv0900_internal *intp = state->internal; in stv0900_algo() local
1836 algo = intp->srch_algo[demod]; in stv0900_algo()
1837 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1838 stv0900_write_reg(intp, DMDISTATE, 0x5c); in stv0900_algo()
1839 if (intp->chip_id >= 0x20) { in stv0900_algo()
1840 if (intp->symbol_rate[demod] > 5000000) in stv0900_algo()
1841 stv0900_write_reg(intp, CORRELABS, 0x9e); in stv0900_algo()
1843 stv0900_write_reg(intp, CORRELABS, 0x82); in stv0900_algo()
1845 stv0900_write_reg(intp, CORRELABS, 0x88); in stv0900_algo()
1848 intp->symbol_rate[demod], in stv0900_algo()
1849 intp->srch_algo[demod]); in stv0900_algo()
1851 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) { in stv0900_algo()
1852 intp->bw[demod] = 2 * 36000000; in stv0900_algo()
1854 stv0900_write_reg(intp, TMGCFG2, 0xc0); in stv0900_algo()
1855 stv0900_write_reg(intp, CORRELMANT, 0x70); in stv0900_algo()
1857 stv0900_set_symbol_rate(intp, intp->mclk, 1000000, demod); in stv0900_algo()
1859 stv0900_write_reg(intp, DMDT0M, 0x20); in stv0900_algo()
1860 stv0900_write_reg(intp, TMGCFG, 0xd2); in stv0900_algo()
1862 if (intp->symbol_rate[demod] < 2000000) in stv0900_algo()
1863 stv0900_write_reg(intp, CORRELMANT, 0x63); in stv0900_algo()
1865 stv0900_write_reg(intp, CORRELMANT, 0x70); in stv0900_algo()
1867 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_algo()
1869 intp->bw[demod] = in stv0900_algo()
1870 stv0900_carrier_width(intp->symbol_rate[demod], in stv0900_algo()
1871 intp->rolloff); in stv0900_algo()
1872 if (intp->chip_id >= 0x20) { in stv0900_algo()
1873 stv0900_write_reg(intp, KREFTMG, 0x5a); in stv0900_algo()
1875 if (intp->srch_algo[demod] == STV0900_COLD_START) { in stv0900_algo()
1876 intp->bw[demod] += 10000000; in stv0900_algo()
1877 intp->bw[demod] *= 15; in stv0900_algo()
1878 intp->bw[demod] /= 10; in stv0900_algo()
1879 } else if (intp->srch_algo[demod] == STV0900_WARM_START) in stv0900_algo()
1880 intp->bw[demod] += 10000000; in stv0900_algo()
1883 stv0900_write_reg(intp, KREFTMG, 0xc1); in stv0900_algo()
1884 intp->bw[demod] += 10000000; in stv0900_algo()
1885 intp->bw[demod] *= 15; in stv0900_algo()
1886 intp->bw[demod] /= 10; in stv0900_algo()
1889 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_algo()
1891 stv0900_set_symbol_rate(intp, intp->mclk, in stv0900_algo()
1892 intp->symbol_rate[demod], demod); in stv0900_algo()
1893 stv0900_set_max_symbol_rate(intp, intp->mclk, in stv0900_algo()
1894 intp->symbol_rate[demod], demod); in stv0900_algo()
1895 stv0900_set_min_symbol_rate(intp, intp->mclk, in stv0900_algo()
1896 intp->symbol_rate[demod], demod); in stv0900_algo()
1897 if (intp->symbol_rate[demod] >= 10000000) in stv0900_algo()
1904 if (intp->tuner_type[demod] == 3) in stv0900_algo()
1905 stv0900_set_tuner_auto(intp, intp->freq[demod], in stv0900_algo()
1906 intp->bw[demod], demod); in stv0900_algo()
1908 stv0900_set_tuner(fe, intp->freq[demod], intp->bw[demod]); in stv0900_algo()
1910 agc1_power = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1), in stv0900_algo()
1911 stv0900_get_bits(intp, AGCIQ_VALUE0)); in stv0900_algo()
1917 aq_power += (stv0900_get_bits(intp, POWER_I) + in stv0900_algo()
1918 stv0900_get_bits(intp, POWER_Q)) / 2; in stv0900_algo()
1924 intp->result[demod].locked = FALSE; in stv0900_algo()
1928 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_algo()
1929 intp->srch_iq_inv[demod]); in stv0900_algo()
1930 if (intp->chip_id <= 0x20) /*cut 2.0*/ in stv0900_algo()
1931 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_algo()
1933 stv0900_write_bits(intp, MANUALS2_ROLLOFF, 1); in stv0900_algo()
1935 stv0900_set_search_standard(intp, demod); in stv0900_algo()
1937 if (intp->srch_algo[demod] != STV0900_BLIND_SEARCH) in stv0900_algo()
1938 stv0900_start_search(intp, demod); in stv0900_algo()
1944 if (intp->chip_id == 0x12) { in stv0900_algo()
1945 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1947 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1948 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1956 lock = stv0900_get_demod_lock(intp, demod, demod_timeout); in stv0900_algo()
1960 if (stv0900_check_timing_lock(intp, demod) == TRUE) in stv0900_algo()
1961 lock = stv0900_sw_algo(intp, demod); in stv0900_algo()
1970 if (intp->chip_id <= 0x11) { in stv0900_algo()
1976 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1978 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1980 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1981 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1984 } else if (intp->chip_id >= 0x20) { in stv0900_algo()
1985 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1987 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1988 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1991 if (stv0900_wait_for_lock(intp, demod, in stv0900_algo()
1994 intp->result[demod].locked = TRUE; in stv0900_algo()
1995 if (intp->result[demod].standard == in stv0900_algo()
1997 stv0900_set_dvbs2_rolloff(intp, demod); in stv0900_algo()
1998 stv0900_write_bits(intp, RESET_UPKO_COUNT, 1); in stv0900_algo()
1999 stv0900_write_bits(intp, RESET_UPKO_COUNT, 0); in stv0900_algo()
2000 stv0900_write_reg(intp, ERRCTRL1, 0x67); in stv0900_algo()
2002 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_algo()
2005 stv0900_write_reg(intp, FBERCPT4, 0); in stv0900_algo()
2006 stv0900_write_reg(intp, ERRCTRL2, 0xc1); in stv0900_algo()
2010 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_algo()
2012 intp->result[demod].locked = FALSE; in stv0900_algo()
2019 if (intp->chip_id > 0x11) { in stv0900_algo()
2020 intp->result[demod].locked = FALSE; in stv0900_algo()
2024 if ((stv0900_get_bits(intp, HEADER_MODE) == STV0900_DVBS_FOUND) && in stv0900_algo()
2025 (intp->srch_iq_inv[demod] <= STV0900_IQ_AUTO_NORMAL_FIRST)) in stv0900_algo()