Lines Matching refs:stv090x_write_reg
762 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data) in stv090x_write_reg() function
1222 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_vitclk_ctl()
1231 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_vitclk_ctl()
3931 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_sleep()
3936 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0) in stv090x_sleep()
3955 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_sleep()
3966 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_sleep()
3974 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_sleep()
3979 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0) in stv090x_sleep()
3998 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_sleep()
4009 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_sleep()
4022 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0) in stv090x_sleep()
4053 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0) in stv090x_wakeup()
4061 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_wakeup()
4066 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0) in stv090x_wakeup()
4077 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_wakeup()
4086 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_wakeup()
4094 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_wakeup()
4099 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0) in stv090x_wakeup()
4110 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0) in stv090x_wakeup()
4119 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0) in stv090x_wakeup()
4163 if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0) in stv090x_ldpc_mode()
4170 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4173 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4220 if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */ in stv090x_ldpc_mode()
4223 if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */ in stv090x_ldpc_mode()
4229 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4232 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0) in stv090x_ldpc_mode()
4277 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0) in stv090x_set_mclk()
4307 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00); in stv0900_set_tspath()
4312 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */ in stv0900_set_tspath()
4316 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4320 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0) in stv0900_set_tspath()
4322 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0) in stv0900_set_tspath()
4324 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0) in stv0900_set_tspath()
4337 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0) in stv0900_set_tspath()
4343 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0) in stv0900_set_tspath()
4357 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10); in stv0900_set_tspath()
4362 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16); in stv0900_set_tspath()
4365 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4369 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4371 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0) in stv0900_set_tspath()
4373 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0) in stv0900_set_tspath()
4386 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14); in stv0900_set_tspath()
4391 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12); in stv0900_set_tspath()
4404 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4413 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4422 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4431 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4445 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4454 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4463 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4472 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4506 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0900_set_tspath()
4508 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0) in stv0900_set_tspath()
4538 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0) in stv0900_set_tspath()
4540 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0) in stv0900_set_tspath()
4546 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4549 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0) in stv0900_set_tspath()
4554 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4557 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0900_set_tspath()
4574 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00); in stv0903_set_tspath()
4580 stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c); in stv0903_set_tspath()
4587 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10); in stv0903_set_tspath()
4593 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14); in stv0903_set_tspath()
4603 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4611 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4619 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4627 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4661 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0) in stv0903_set_tspath()
4663 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0) in stv0903_set_tspath()
4669 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4672 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0) in stv0903_set_tspath()
4704 if (stv090x_write_reg(state, STV090x_SYNTCTRL, in stv090x_init()
4788 if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0) in stv090x_setup()
4791 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0) in stv090x_setup()
4797 if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0) in stv090x_setup()
4800 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0) in stv090x_setup()
4805 if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0) in stv090x_setup()
4808 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0) in stv090x_setup()
4811 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */ in stv090x_setup()
4814 if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */ in stv090x_setup()
4816 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */ in stv090x_setup()
4823 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0) in stv090x_setup()
4829 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0) in stv090x_setup()
4835 if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0) in stv090x_setup()
4854 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0) in stv090x_setup()
4861 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0) in stv090x_setup()
4864 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0) in stv090x_setup()
4866 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0) in stv090x_setup()
4885 return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg); in stv090x_set_gpio()