Lines Matching refs:mxl111sf_write_reg
48 ret = mxl111sf_write_reg(state, 0x19, tmp); in mxl111sf_set_gpo_state()
59 ret = mxl111sf_write_reg(state, 0x30, tmp); in mxl111sf_set_gpo_state()
135 ret = mxl111sf_write_reg(state, MXL_GPIO_MUX_REG_0, tmp); in mxl111sf_config_gpio_pins()
148 ret = mxl111sf_write_reg(state, MXL_GPIO_MUX_REG_1, tmp); in mxl111sf_config_gpio_pins()
160 ret = mxl111sf_write_reg(state, MXL_GPIO_MUX_REG_2, tmp); in mxl111sf_config_gpio_pins()
531 ret = mxl111sf_write_reg(state, 0x17, r17); in mxl111sf_config_pin_mux_modes()
534 ret = mxl111sf_write_reg(state, 0x18, r18); in mxl111sf_config_pin_mux_modes()
537 ret = mxl111sf_write_reg(state, 0x12, r12); in mxl111sf_config_pin_mux_modes()
540 ret = mxl111sf_write_reg(state, 0x15, r15); in mxl111sf_config_pin_mux_modes()
543 ret = mxl111sf_write_reg(state, 0x82, r82); in mxl111sf_config_pin_mux_modes()
546 ret = mxl111sf_write_reg(state, 0x84, r84); in mxl111sf_config_pin_mux_modes()
549 ret = mxl111sf_write_reg(state, 0x89, r89); in mxl111sf_config_pin_mux_modes()
552 ret = mxl111sf_write_reg(state, 0x3D, r3D); in mxl111sf_config_pin_mux_modes()