Lines Matching refs:vsec
32 #define CXL_READ_VSEC_LENGTH(dev, vsec, dest) \ argument
34 pci_read_config_word(dev, vsec + 0x6, dest); \
37 #define CXL_READ_VSEC_NAFUS(dev, vsec, dest) \ argument
38 pci_read_config_byte(dev, vsec + 0x8, dest)
40 #define CXL_READ_VSEC_STATUS(dev, vsec, dest) \ argument
41 pci_read_config_byte(dev, vsec + 0x9, dest)
53 #define CXL_READ_VSEC_MODE_CONTROL(dev, vsec, dest) \ argument
54 pci_read_config_byte(dev, vsec + 0xa, dest)
55 #define CXL_WRITE_VSEC_MODE_CONTROL(dev, vsec, val) \ argument
56 pci_write_config_byte(dev, vsec + 0xa, val)
63 #define CXL_READ_VSEC_PSL_REVISION(dev, vsec, dest) \ argument
64 pci_read_config_word(dev, vsec + 0xc, dest)
65 #define CXL_READ_VSEC_CAIA_MINOR(dev, vsec, dest) \ argument
66 pci_read_config_byte(dev, vsec + 0xe, dest)
67 #define CXL_READ_VSEC_CAIA_MAJOR(dev, vsec, dest) \ argument
68 pci_read_config_byte(dev, vsec + 0xf, dest)
69 #define CXL_READ_VSEC_BASE_IMAGE(dev, vsec, dest) \ argument
70 pci_read_config_word(dev, vsec + 0x10, dest)
72 #define CXL_READ_VSEC_IMAGE_STATE(dev, vsec, dest) \ argument
73 pci_read_config_byte(dev, vsec + 0x13, dest)
74 #define CXL_WRITE_VSEC_IMAGE_STATE(dev, vsec, val) \ argument
75 pci_write_config_byte(dev, vsec + 0x13, val)
80 #define CXL_READ_VSEC_AFU_DESC_OFF(dev, vsec, dest) \ argument
81 pci_read_config_dword(dev, vsec + 0x20, dest)
82 #define CXL_READ_VSEC_AFU_DESC_SIZE(dev, vsec, dest) \ argument
83 pci_read_config_dword(dev, vsec + 0x24, dest)
84 #define CXL_READ_VSEC_PS_OFF(dev, vsec, dest) \ argument
85 pci_read_config_dword(dev, vsec + 0x28, dest)
86 #define CXL_READ_VSEC_PS_SIZE(dev, vsec, dest) \ argument
87 pci_read_config_dword(dev, vsec + 0x2c, dest)
172 int vsec = 0; in find_cxl_vsec() local
175 while ((vsec = pci_find_next_ext_capability(dev, vsec, PCI_EXT_CAP_ID_VNDR))) { in find_cxl_vsec()
176 pci_read_config_word(dev, vsec + 0x4, &val); in find_cxl_vsec()
178 return vsec; in find_cxl_vsec()
186 int vsec; in dump_cxl_config_space() local
211 if (!(vsec = find_cxl_vsec(dev))) in dump_cxl_config_space()
217 pci_read_config_dword(dev, vsec + 0x0, &val); in dump_cxl_config_space()
221 pci_read_config_dword(dev, vsec + 0x4, &val); in dump_cxl_config_space()
225 pci_read_config_dword(dev, vsec + 0x8, &val); in dump_cxl_config_space()
230 pci_read_config_dword(dev, vsec + 0xc, &val); in dump_cxl_config_space()
233 pci_read_config_dword(dev, vsec + 0x10, &val); in dump_cxl_config_space()
240 pci_read_config_dword(dev, vsec + 0x14, &val); in dump_cxl_config_space()
242 pci_read_config_dword(dev, vsec + 0x18, &val); in dump_cxl_config_space()
244 pci_read_config_dword(dev, vsec + 0x1c, &val); in dump_cxl_config_space()
247 pci_read_config_dword(dev, vsec + 0x20, &val); in dump_cxl_config_space()
249 pci_read_config_dword(dev, vsec + 0x24, &val); in dump_cxl_config_space()
251 pci_read_config_dword(dev, vsec + 0x28, &val); in dump_cxl_config_space()
253 pci_read_config_dword(dev, vsec + 0x2c, &val); in dump_cxl_config_space()
256 pci_read_config_dword(dev, vsec + 0x30, &val); in dump_cxl_config_space()
258 pci_read_config_dword(dev, vsec + 0x34, &val); in dump_cxl_config_space()
260 pci_read_config_dword(dev, vsec + 0x38, &val); in dump_cxl_config_space()
262 pci_read_config_dword(dev, vsec + 0x3c, &val); in dump_cxl_config_space()
265 pci_read_config_dword(dev, vsec + 0x40, &val); in dump_cxl_config_space()
267 pci_read_config_dword(dev, vsec + 0x44, &val); in dump_cxl_config_space()
270 pci_read_config_dword(dev, vsec + 0x48, &val); in dump_cxl_config_space()
272 pci_read_config_dword(dev, vsec + 0x4c, &val); in dump_cxl_config_space()
275 pci_read_config_dword(dev, vsec + 0x50, &val); in dump_cxl_config_space()
277 pci_read_config_dword(dev, vsec + 0x54, &val); in dump_cxl_config_space()
279 pci_read_config_dword(dev, vsec + 0x58, &val); in dump_cxl_config_space()
281 pci_read_config_dword(dev, vsec + 0x58, &val); in dump_cxl_config_space()
387 int vsec; in cxl_update_image_control() local
390 if (!(vsec = find_cxl_vsec(dev))) { in cxl_update_image_control()
395 if ((rc = CXL_READ_VSEC_IMAGE_STATE(dev, vsec, &image_state))) { in cxl_update_image_control()
410 if ((rc = CXL_WRITE_VSEC_IMAGE_STATE(dev, vsec, image_state))) { in cxl_update_image_control()
469 int vsec; in switch_card_to_cxl() local
475 if (!(vsec = find_cxl_vsec(dev))) { in switch_card_to_cxl()
480 if ((rc = CXL_READ_VSEC_MODE_CONTROL(dev, vsec, &val))) { in switch_card_to_cxl()
486 if ((rc = CXL_WRITE_VSEC_MODE_CONTROL(dev, vsec, val))) { in switch_card_to_cxl()
834 int vsec; in cxl_read_vsec() local
840 if (!(vsec = find_cxl_vsec(dev))) { in cxl_read_vsec()
845 CXL_READ_VSEC_LENGTH(dev, vsec, &vseclen); in cxl_read_vsec()
851 CXL_READ_VSEC_STATUS(dev, vsec, &adapter->vsec_status); in cxl_read_vsec()
852 CXL_READ_VSEC_PSL_REVISION(dev, vsec, &adapter->psl_rev); in cxl_read_vsec()
853 CXL_READ_VSEC_CAIA_MAJOR(dev, vsec, &adapter->caia_major); in cxl_read_vsec()
854 CXL_READ_VSEC_CAIA_MINOR(dev, vsec, &adapter->caia_minor); in cxl_read_vsec()
855 CXL_READ_VSEC_BASE_IMAGE(dev, vsec, &adapter->base_image); in cxl_read_vsec()
856 CXL_READ_VSEC_IMAGE_STATE(dev, vsec, &image_state); in cxl_read_vsec()
861 CXL_READ_VSEC_NAFUS(dev, vsec, &adapter->slices); in cxl_read_vsec()
862 CXL_READ_VSEC_AFU_DESC_OFF(dev, vsec, &afu_desc_off); in cxl_read_vsec()
863 CXL_READ_VSEC_AFU_DESC_SIZE(dev, vsec, &afu_desc_size); in cxl_read_vsec()
864 CXL_READ_VSEC_PS_OFF(dev, vsec, &ps_off); in cxl_read_vsec()
865 CXL_READ_VSEC_PS_SIZE(dev, vsec, &ps_size); in cxl_read_vsec()