Lines Matching refs:mmr
325 unsigned long mmr = 0; in gru_chiplet_cpu_to_mmr() local
339 mmr = UVH_GR0_TLB_INT0_CONFIG + in gru_chiplet_cpu_to_mmr()
342 mmr = UVH_GR1_TLB_INT0_CONFIG + in gru_chiplet_cpu_to_mmr()
349 return mmr; in gru_chiplet_cpu_to_mmr()
371 unsigned long mmr; in gru_chiplet_setup_tlb_irq() local
375 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_setup_tlb_irq()
376 if (mmr == 0) in gru_chiplet_setup_tlb_irq()
402 unsigned long mmr; in gru_chiplet_teardown_tlb_irq() local
408 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_teardown_tlb_irq()
409 if (mmr == 0) in gru_chiplet_teardown_tlb_irq()
421 unsigned long mmr; in gru_chiplet_setup_tlb_irq() local
425 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_setup_tlb_irq()
426 if (mmr == 0) in gru_chiplet_setup_tlb_irq()
429 irq = uv_setup_irq(irq_name, cpu, blade, mmr, UV_AFFINITY_CPU); in gru_chiplet_setup_tlb_irq()
450 unsigned long mmr; in gru_chiplet_teardown_tlb_irq() local
452 mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core); in gru_chiplet_teardown_tlb_irq()
453 if (mmr) { in gru_chiplet_teardown_tlb_irq()