Lines Matching refs:cmdr
240 u32 cmdr; in dw_mci_prepare_command() local
243 cmdr = cmd->opcode; in dw_mci_prepare_command()
250 cmdr |= SDMMC_CMD_STOP; in dw_mci_prepare_command()
252 cmdr |= SDMMC_CMD_PRV_DAT_WAIT; in dw_mci_prepare_command()
258 cmdr |= SDMMC_CMD_VOLT_SWITCH; in dw_mci_prepare_command()
284 cmdr |= SDMMC_CMD_RESP_EXP; in dw_mci_prepare_command()
286 cmdr |= SDMMC_CMD_RESP_LONG; in dw_mci_prepare_command()
290 cmdr |= SDMMC_CMD_RESP_CRC; in dw_mci_prepare_command()
294 cmdr |= SDMMC_CMD_DAT_EXP; in dw_mci_prepare_command()
296 cmdr |= SDMMC_CMD_STRM_MODE; in dw_mci_prepare_command()
298 cmdr |= SDMMC_CMD_DAT_WR; in dw_mci_prepare_command()
302 drv_data->prepare_command(slot->host, &cmdr); in dw_mci_prepare_command()
304 return cmdr; in dw_mci_prepare_command()
310 u32 cmdr; in dw_mci_prep_stop_abort() local
316 cmdr = cmd->opcode; in dw_mci_prep_stop_abort()
319 if (cmdr == MMC_READ_SINGLE_BLOCK || in dw_mci_prep_stop_abort()
320 cmdr == MMC_READ_MULTIPLE_BLOCK || in dw_mci_prep_stop_abort()
321 cmdr == MMC_WRITE_BLOCK || in dw_mci_prep_stop_abort()
322 cmdr == MMC_WRITE_MULTIPLE_BLOCK || in dw_mci_prep_stop_abort()
323 cmdr == MMC_SEND_TUNING_BLOCK || in dw_mci_prep_stop_abort()
324 cmdr == MMC_SEND_TUNING_BLOCK_HS200) { in dw_mci_prep_stop_abort()
328 } else if (cmdr == SD_IO_RW_EXTENDED) { in dw_mci_prep_stop_abort()
337 cmdr = stop->opcode | SDMMC_CMD_STOP | in dw_mci_prep_stop_abort()
340 return cmdr; in dw_mci_prep_stop_abort()