211 static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)  in esdhc_clrset_le()  argument
213 	void __iomem *base = host->ioaddr + (reg & ~0x3);  in esdhc_clrset_le()
219 static u32 esdhc_readl_le(struct sdhci_host *host, int reg)  in esdhc_readl_le()  argument
221 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_readl_le()
223 	u32 val = readl(host->ioaddr + reg);  in esdhc_readl_le()
256 				val = readl(host->ioaddr + SDHCI_CAPABILITIES) & 0xFFFF;  in esdhc_readl_le()
285 			writel(SDHCI_INT_RESPONSE, host->ioaddr +  in esdhc_readl_le()
294 static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)  in esdhc_writel_le()  argument
296 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_writel_le()
310 			data = readl(host->ioaddr + SDHCI_HOST_CONTROL);  in esdhc_writel_le()
312 			writel(data, host->ioaddr + SDHCI_HOST_CONTROL);  in esdhc_writel_le()
314 			writel(data, host->ioaddr + SDHCI_HOST_CONTROL);  in esdhc_writel_le()
322 			v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writel_le()
324 			writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writel_le()
331 				writel(data, host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_writel_le()
343 	writel(val, host->ioaddr + reg);  in esdhc_writel_le()
346 static u16 esdhc_readw_le(struct sdhci_host *host, int reg)  in esdhc_readw_le()  argument
348 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_readw_le()
365 		val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_readw_le()
371 				val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_readw_le()
374 				val = readl(host->ioaddr + SDHCI_ACMD12_ERR);  in esdhc_readw_le()
389 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_readw_le()
397 			ret = readw(host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_readw_le()
403 	return readw(host->ioaddr + reg);  in esdhc_readw_le()
406 static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)  in esdhc_writew_le()  argument
408 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_writew_le()
414 		new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
419 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
422 		new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
427 		writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
429 			new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
434 			writel(new_val , host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
436 			u32 v = readl(host->ioaddr + SDHCI_ACMD12_ERR);  in esdhc_writew_le()
437 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
452 			writel(v, host->ioaddr + SDHCI_ACMD12_ERR);  in esdhc_writew_le()
453 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
458 				&& (host->cmd->opcode == SD_IO_RW_EXTENDED)  in esdhc_writew_le()
459 				&& (host->cmd->data->blocks > 1)  in esdhc_writew_le()
460 				&& (host->cmd->data->flags & MMC_DATA_READ)) {  in esdhc_writew_le()
462 			v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
464 			writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_writew_le()
468 			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
475 			writel(m, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writew_le()
485 		if (host->cmd->opcode == MMC_STOP_TRANSMISSION)  in esdhc_writew_le()
488 		if ((host->cmd->opcode == MMC_SET_BLOCK_COUNT) &&  in esdhc_writew_le()
494 			       host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_writew_le()
497 			       host->ioaddr + SDHCI_TRANSFER_MODE);  in esdhc_writew_le()
503 	esdhc_clrset_le(host, 0xffff, val, reg);  in esdhc_writew_le()
506 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)  in esdhc_writeb_le()  argument
508 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_writeb_le()
539 		esdhc_clrset_le(host, mask, new_val, reg);  in esdhc_writeb_le()
542 	esdhc_clrset_le(host, 0xff, val, reg);  in esdhc_writeb_le()
553 		esdhc_clrset_le(host, 0x7, 0x7, ESDHC_SYSTEM_CONTROL);  in esdhc_writeb_le()
560 			new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writeb_le()
562 					host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_writeb_le()
568 static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)  in esdhc_pltfm_get_max_clock()  argument
570 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_get_max_clock()
580 static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)  in esdhc_pltfm_get_min_clock()  argument
582 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_get_min_clock()
587 static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,  in esdhc_pltfm_set_clock()  argument
590 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_set_clock()
598 		host->mmc->actual_clock = 0;  in esdhc_pltfm_set_clock()
601 			val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
603 					host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
611 	temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
614 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
622 	host->mmc->actual_clock = host_clock / pre_div / div;  in esdhc_pltfm_set_clock()
623 	dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",  in esdhc_pltfm_set_clock()
624 		clock, host->mmc->actual_clock);  in esdhc_pltfm_set_clock()
632 	temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
636 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);  in esdhc_pltfm_set_clock()
639 		val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
641 		host->ioaddr + ESDHC_VENDOR_SPEC);  in esdhc_pltfm_set_clock()
647 static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)  in esdhc_pltfm_get_ro()  argument
649 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_pltfm_get_ro()
655 		return mmc_gpio_get_ro(host->mmc);  in esdhc_pltfm_get_ro()
657 		return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &  in esdhc_pltfm_get_ro()
666 static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)  in esdhc_pltfm_set_bus_width()  argument
682 	esdhc_clrset_le(host, ESDHC_CTRL_BUSWIDTH_MASK, ctrl,  in esdhc_pltfm_set_bus_width()
686 static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)  in esdhc_prepare_tuning()  argument
693 	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_prepare_tuning()
696 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_prepare_tuning()
697 	writel(val << 8, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);  in esdhc_prepare_tuning()
698 	dev_dbg(mmc_dev(host->mmc),  in esdhc_prepare_tuning()
700 			val, readl(host->ioaddr + ESDHC_TUNE_CTRL_STATUS));  in esdhc_prepare_tuning()
703 static void esdhc_post_tuning(struct sdhci_host *host)  in esdhc_post_tuning()  argument
707 	reg = readl(host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_post_tuning()
709 	writel(reg, host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_post_tuning()
712 static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)  in esdhc_executing_tuning()  argument
719 		esdhc_prepare_tuning(host, min);  in esdhc_executing_tuning()
720 		if (!mmc_send_tuning(host->mmc))  in esdhc_executing_tuning()
728 		esdhc_prepare_tuning(host, max);  in esdhc_executing_tuning()
729 		if (mmc_send_tuning(host->mmc)) {  in esdhc_executing_tuning()
738 	esdhc_prepare_tuning(host, avg);  in esdhc_executing_tuning()
739 	ret = mmc_send_tuning(host->mmc);  in esdhc_executing_tuning()
740 	esdhc_post_tuning(host);  in esdhc_executing_tuning()
742 	dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n",  in esdhc_executing_tuning()
748 static int esdhc_change_pinstate(struct sdhci_host *host,  in esdhc_change_pinstate()  argument
751 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_change_pinstate()
755 	dev_dbg(mmc_dev(host->mmc), "change pinctrl state for uhs %d\n", uhs);  in esdhc_change_pinstate()
779 static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)  in esdhc_set_uhs_signaling()  argument
781 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_set_uhs_signaling()
794 		writel(readl(host->ioaddr + ESDHC_MIX_CTRL) |  in esdhc_set_uhs_signaling()
796 				host->ioaddr + ESDHC_MIX_CTRL);  in esdhc_set_uhs_signaling()
805 			writel(v, host->ioaddr + ESDHC_DLL_CTRL);  in esdhc_set_uhs_signaling()
810 	esdhc_change_pinstate(host, timing);  in esdhc_set_uhs_signaling()
813 static void esdhc_reset(struct sdhci_host *host, u8 mask)  in esdhc_reset()  argument
815 	sdhci_reset(host, mask);  in esdhc_reset()
817 	sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);  in esdhc_reset()
818 	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);  in esdhc_reset()
821 static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host)  in esdhc_get_max_timeout_count()  argument
823 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_get_max_timeout_count()
829 static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd)  in esdhc_set_timeout()  argument
831 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in esdhc_set_timeout()
835 	sdhci_writeb(host, esdhc_is_usdhc(imx_data) ? 0xF : 0xE,  in esdhc_set_timeout()
867 			 struct sdhci_host *host,  in sdhci_esdhc_imx_probe_dt()  argument
905 	mmc_of_parse_voltage(np, &host->ocr_mask);  in sdhci_esdhc_imx_probe_dt()
908 	ret = mmc_of_parse(host->mmc);  in sdhci_esdhc_imx_probe_dt()
912 	if (!IS_ERR_VALUE(mmc_gpio_get_cd(host->mmc)))  in sdhci_esdhc_imx_probe_dt()
913 		host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;  in sdhci_esdhc_imx_probe_dt()
920 			 struct sdhci_host *host,  in sdhci_esdhc_imx_probe_dt()  argument
932 	struct sdhci_host *host;  in sdhci_esdhc_imx_probe()  local
938 	host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata, 0);  in sdhci_esdhc_imx_probe()
939 	if (IS_ERR(host))  in sdhci_esdhc_imx_probe()
940 		return PTR_ERR(host);  in sdhci_esdhc_imx_probe()
942 	pltfm_host = sdhci_priv(host);  in sdhci_esdhc_imx_probe()
987 		dev_warn(mmc_dev(host->mmc), "could not get default state\n");  in sdhci_esdhc_imx_probe()
989 	host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;  in sdhci_esdhc_imx_probe()
993 		host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK  in sdhci_esdhc_imx_probe()
1001 		writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);  in sdhci_esdhc_imx_probe()
1002 		host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;  in sdhci_esdhc_imx_probe()
1003 		host->mmc->caps |= MMC_CAP_1_8V_DDR;  in sdhci_esdhc_imx_probe()
1011 		writel(readl(host->ioaddr + ESDHC_TUNING_CTRL) |  in sdhci_esdhc_imx_probe()
1013 			host->ioaddr + ESDHC_TUNING_CTRL);  in sdhci_esdhc_imx_probe()
1016 	if (sdhci_esdhc_imx_probe_dt(pdev, host, boarddata) < 0) {  in sdhci_esdhc_imx_probe()
1017 		if (!host->mmc->parent->platform_data) {  in sdhci_esdhc_imx_probe()
1018 			dev_err(mmc_dev(host->mmc), "no board data!\n");  in sdhci_esdhc_imx_probe()
1023 					host->mmc->parent->platform_data);  in sdhci_esdhc_imx_probe()
1028 		err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio);  in sdhci_esdhc_imx_probe()
1030 			dev_err(mmc_dev(host->mmc),  in sdhci_esdhc_imx_probe()
1034 		host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;  in sdhci_esdhc_imx_probe()
1042 		err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0);  in sdhci_esdhc_imx_probe()
1044 			dev_err(mmc_dev(host->mmc),  in sdhci_esdhc_imx_probe()
1052 		host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;  in sdhci_esdhc_imx_probe()
1056 		host->mmc->caps |= MMC_CAP_NONREMOVABLE;  in sdhci_esdhc_imx_probe()
1065 		host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA;  in sdhci_esdhc_imx_probe()
1068 		host->mmc->caps |= MMC_CAP_4_BIT_DATA;  in sdhci_esdhc_imx_probe()
1072 		host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;  in sdhci_esdhc_imx_probe()
1085 			dev_warn(mmc_dev(host->mmc),  in sdhci_esdhc_imx_probe()
1088 			host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;  in sdhci_esdhc_imx_probe()
1091 		host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;  in sdhci_esdhc_imx_probe()
1094 	err = sdhci_add_host(host);  in sdhci_esdhc_imx_probe()
1117 	struct sdhci_host *host = platform_get_drvdata(pdev);  in sdhci_esdhc_imx_remove()  local
1118 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in sdhci_esdhc_imx_remove()
1120 	int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);  in sdhci_esdhc_imx_remove()
1126 	sdhci_remove_host(host, dead);  in sdhci_esdhc_imx_remove()
1140 	struct sdhci_host *host = dev_get_drvdata(dev);  in sdhci_esdhc_runtime_suspend()  local
1141 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in sdhci_esdhc_runtime_suspend()
1145 	ret = sdhci_runtime_suspend_host(host);  in sdhci_esdhc_runtime_suspend()
1147 	if (!sdhci_sdio_irq_enabled(host)) {  in sdhci_esdhc_runtime_suspend()
1158 	struct sdhci_host *host = dev_get_drvdata(dev);  in sdhci_esdhc_runtime_resume()  local
1159 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);  in sdhci_esdhc_runtime_resume()
1162 	if (!sdhci_sdio_irq_enabled(host)) {  in sdhci_esdhc_runtime_resume()
1168 	return sdhci_runtime_resume_host(host);  in sdhci_esdhc_runtime_resume()