224 	void __iomem *iobase;  member
259 	writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);  in fsl_qspi_unlock_lut()
260 	writel(QUADSPI_LCKER_UNLOCK, q->iobase + QUADSPI_LCKCR);  in fsl_qspi_unlock_lut()
265 	writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);  in fsl_qspi_lock_lut()
266 	writel(QUADSPI_LCKER_LOCK, q->iobase + QUADSPI_LCKCR);  in fsl_qspi_lock_lut()
275 	reg = readl(q->iobase + QUADSPI_FR);  in fsl_qspi_irq_handler()
276 	writel(reg, q->iobase + QUADSPI_FR);  in fsl_qspi_irq_handler()
287 	void __iomem *base = q->iobase;  in fsl_qspi_init_lut()
431 	void __iomem *base = q->iobase;  in fsl_qspi_runcmd()
486 		tmp = readl(q->iobase + QUADSPI_RBDR + i * 4);  in fsl_qspi_read_data()
514 	reg = readl(q->iobase + QUADSPI_MCR);  in fsl_qspi_invalid()
516 	writel(reg, q->iobase + QUADSPI_MCR);  in fsl_qspi_invalid()
525 	writel(reg, q->iobase + QUADSPI_MCR);  in fsl_qspi_invalid()
539 	tmp = readl(q->iobase + QUADSPI_MCR);  in fsl_qspi_nor_write()
540 	writel(tmp | QUADSPI_MCR_CLR_RXF_MASK, q->iobase + QUADSPI_MCR);  in fsl_qspi_nor_write()
545 		writel(tmp, q->iobase + QUADSPI_TBDR);  in fsl_qspi_nor_write()
561 	void __iomem *base = q->iobase;  in fsl_qspi_set_map_addr()
584 	void __iomem *base = q->iobase;  in fsl_qspi_init_abh_read()
606 		q->iobase + QUADSPI_BFGENCR);  in fsl_qspi_init_abh_read()
612 	void __iomem *base = q->iobase;  in fsl_qspi_nor_setup()
639 	writel(QUADSPI_RSER_TFIE, q->iobase + QUADSPI_RSER);  in fsl_qspi_nor_setup()
809 	q->iobase = devm_ioremap_resource(dev, res);  in fsl_qspi_probe()
810 	if (IS_ERR(q->iobase))  in fsl_qspi_probe()
811 		return PTR_ERR(q->iobase);  in fsl_qspi_probe()
973 	writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);  in fsl_qspi_remove()
974 	writel(0x0, q->iobase + QUADSPI_RSER);  in fsl_qspi_remove()