Lines Matching refs:nor
69 static int read_sr(struct spi_nor *nor) in read_sr() argument
74 ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1); in read_sr()
88 static int read_fsr(struct spi_nor *nor) in read_fsr() argument
93 ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1); in read_fsr()
107 static int read_cr(struct spi_nor *nor) in read_cr() argument
112 ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1); in read_cr()
114 dev_err(nor->dev, "error %d reading CR\n", ret); in read_cr()
126 static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor) in spi_nor_read_dummy_cycles() argument
128 switch (nor->flash_read) { in spi_nor_read_dummy_cycles()
143 static inline int write_sr(struct spi_nor *nor, u8 val) in write_sr() argument
145 nor->cmd_buf[0] = val; in write_sr()
146 return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1, 0); in write_sr()
153 static inline int write_enable(struct spi_nor *nor) in write_enable() argument
155 return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0, 0); in write_enable()
161 static inline int write_disable(struct spi_nor *nor) in write_disable() argument
163 return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0, 0); in write_disable()
172 static inline int set_4byte(struct spi_nor *nor, struct flash_info *info, in set_4byte() argument
186 write_enable(nor); in set_4byte()
189 status = nor->write_reg(nor, cmd, NULL, 0, 0); in set_4byte()
191 write_disable(nor); in set_4byte()
196 nor->cmd_buf[0] = enable << 7; in set_4byte()
197 return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1, 0); in set_4byte()
200 static inline int spi_nor_sr_ready(struct spi_nor *nor) in spi_nor_sr_ready() argument
202 int sr = read_sr(nor); in spi_nor_sr_ready()
209 static inline int spi_nor_fsr_ready(struct spi_nor *nor) in spi_nor_fsr_ready() argument
211 int fsr = read_fsr(nor); in spi_nor_fsr_ready()
218 static int spi_nor_ready(struct spi_nor *nor) in spi_nor_ready() argument
221 sr = spi_nor_sr_ready(nor); in spi_nor_ready()
224 fsr = nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; in spi_nor_ready()
234 static int spi_nor_wait_till_ready(struct spi_nor *nor) in spi_nor_wait_till_ready() argument
245 ret = spi_nor_ready(nor); in spi_nor_wait_till_ready()
254 dev_err(nor->dev, "flash operation timed out\n"); in spi_nor_wait_till_ready()
264 static int erase_chip(struct spi_nor *nor) in erase_chip() argument
266 dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd->size >> 10)); in erase_chip()
268 return nor->write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0, 0); in erase_chip()
271 static int spi_nor_lock_and_prep(struct spi_nor *nor, enum spi_nor_ops ops) in spi_nor_lock_and_prep() argument
275 mutex_lock(&nor->lock); in spi_nor_lock_and_prep()
277 if (nor->prepare) { in spi_nor_lock_and_prep()
278 ret = nor->prepare(nor, ops); in spi_nor_lock_and_prep()
280 dev_err(nor->dev, "failed in the preparation.\n"); in spi_nor_lock_and_prep()
281 mutex_unlock(&nor->lock); in spi_nor_lock_and_prep()
288 static void spi_nor_unlock_and_unprep(struct spi_nor *nor, enum spi_nor_ops ops) in spi_nor_unlock_and_unprep() argument
290 if (nor->unprepare) in spi_nor_unlock_and_unprep()
291 nor->unprepare(nor, ops); in spi_nor_unlock_and_unprep()
292 mutex_unlock(&nor->lock); in spi_nor_unlock_and_unprep()
301 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_erase() local
306 dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr, in spi_nor_erase()
316 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_ERASE); in spi_nor_erase()
322 write_enable(nor); in spi_nor_erase()
324 if (erase_chip(nor)) { in spi_nor_erase()
329 ret = spi_nor_wait_till_ready(nor); in spi_nor_erase()
341 write_enable(nor); in spi_nor_erase()
343 if (nor->erase(nor, addr)) { in spi_nor_erase()
351 ret = spi_nor_wait_till_ready(nor); in spi_nor_erase()
357 write_disable(nor); in spi_nor_erase()
359 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE); in spi_nor_erase()
367 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE); in spi_nor_erase()
372 static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_lock() argument
374 struct mtd_info *mtd = nor->mtd; in stm_lock()
379 status_old = read_sr(nor); in stm_lock()
399 write_enable(nor); in stm_lock()
400 ret = write_sr(nor, status_new); in stm_lock()
406 static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) in stm_unlock() argument
408 struct mtd_info *mtd = nor->mtd; in stm_unlock()
413 status_old = read_sr(nor); in stm_unlock()
433 write_enable(nor); in stm_unlock()
434 ret = write_sr(nor, status_new); in stm_unlock()
442 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_lock() local
445 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_LOCK); in spi_nor_lock()
449 ret = nor->flash_lock(nor, ofs, len); in spi_nor_lock()
451 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_UNLOCK); in spi_nor_lock()
457 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_unlock() local
460 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_UNLOCK); in spi_nor_unlock()
464 ret = nor->flash_unlock(nor, ofs, len); in spi_nor_unlock()
466 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK); in spi_nor_unlock()
693 static const struct spi_device_id *spi_nor_read_id(struct spi_nor *nor) in spi_nor_read_id() argument
699 tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN); in spi_nor_read_id()
701 dev_dbg(nor->dev, " error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
712 dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %2x, %2x\n", in spi_nor_read_id()
720 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_read() local
723 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
725 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_READ); in spi_nor_read()
729 ret = nor->read(nor, from, len, retlen, buf); in spi_nor_read()
731 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ); in spi_nor_read()
738 struct spi_nor *nor = mtd_to_spi_nor(mtd); in sst_write() local
742 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in sst_write()
744 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_WRITE); in sst_write()
748 write_enable(nor); in sst_write()
750 nor->sst_write_second = false; in sst_write()
755 nor->program_opcode = SPINOR_OP_BP; in sst_write()
758 nor->write(nor, to, 1, retlen, buf); in sst_write()
759 ret = spi_nor_wait_till_ready(nor); in sst_write()
767 nor->program_opcode = SPINOR_OP_AAI_WP; in sst_write()
770 nor->write(nor, to, 2, retlen, buf + actual); in sst_write()
771 ret = spi_nor_wait_till_ready(nor); in sst_write()
775 nor->sst_write_second = true; in sst_write()
777 nor->sst_write_second = false; in sst_write()
779 write_disable(nor); in sst_write()
780 ret = spi_nor_wait_till_ready(nor); in sst_write()
786 write_enable(nor); in sst_write()
788 nor->program_opcode = SPINOR_OP_BP; in sst_write()
789 nor->write(nor, to, 1, retlen, buf + actual); in sst_write()
791 ret = spi_nor_wait_till_ready(nor); in sst_write()
794 write_disable(nor); in sst_write()
797 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE); in sst_write()
809 struct spi_nor *nor = mtd_to_spi_nor(mtd); in spi_nor_write() local
813 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in spi_nor_write()
815 ret = spi_nor_lock_and_prep(nor, SPI_NOR_OPS_WRITE); in spi_nor_write()
819 write_enable(nor); in spi_nor_write()
821 page_offset = to & (nor->page_size - 1); in spi_nor_write()
824 if (page_offset + len <= nor->page_size) { in spi_nor_write()
825 nor->write(nor, to, len, retlen, buf); in spi_nor_write()
828 page_size = nor->page_size - page_offset; in spi_nor_write()
829 nor->write(nor, to, page_size, retlen, buf); in spi_nor_write()
834 if (page_size > nor->page_size) in spi_nor_write()
835 page_size = nor->page_size; in spi_nor_write()
837 ret = spi_nor_wait_till_ready(nor); in spi_nor_write()
841 write_enable(nor); in spi_nor_write()
843 nor->write(nor, to + i, page_size, retlen, buf + i); in spi_nor_write()
847 ret = spi_nor_wait_till_ready(nor); in spi_nor_write()
849 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE); in spi_nor_write()
853 static int macronix_quad_enable(struct spi_nor *nor) in macronix_quad_enable() argument
857 val = read_sr(nor); in macronix_quad_enable()
858 write_enable(nor); in macronix_quad_enable()
860 nor->cmd_buf[0] = val | SR_QUAD_EN_MX; in macronix_quad_enable()
861 nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1, 0); in macronix_quad_enable()
863 if (spi_nor_wait_till_ready(nor)) in macronix_quad_enable()
866 ret = read_sr(nor); in macronix_quad_enable()
868 dev_err(nor->dev, "Macronix Quad bit not set\n"); in macronix_quad_enable()
881 static int write_sr_cr(struct spi_nor *nor, u16 val) in write_sr_cr() argument
883 nor->cmd_buf[0] = val & 0xff; in write_sr_cr()
884 nor->cmd_buf[1] = (val >> 8); in write_sr_cr()
886 return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 2, 0); in write_sr_cr()
889 static int spansion_quad_enable(struct spi_nor *nor) in spansion_quad_enable() argument
894 write_enable(nor); in spansion_quad_enable()
896 ret = write_sr_cr(nor, quad_en); in spansion_quad_enable()
898 dev_err(nor->dev, in spansion_quad_enable()
904 ret = read_cr(nor); in spansion_quad_enable()
906 dev_err(nor->dev, "Spansion Quad bit not set\n"); in spansion_quad_enable()
913 static int micron_quad_enable(struct spi_nor *nor) in micron_quad_enable() argument
918 ret = nor->read_reg(nor, SPINOR_OP_RD_EVCR, &val, 1); in micron_quad_enable()
920 dev_err(nor->dev, "error %d reading EVCR\n", ret); in micron_quad_enable()
924 write_enable(nor); in micron_quad_enable()
927 nor->cmd_buf[0] = val & ~EVCR_QUAD_EN_MICRON; in micron_quad_enable()
928 ret = nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1, 0); in micron_quad_enable()
930 dev_err(nor->dev, "error while writing EVCR register\n"); in micron_quad_enable()
934 ret = spi_nor_wait_till_ready(nor); in micron_quad_enable()
939 ret = nor->read_reg(nor, SPINOR_OP_RD_EVCR, &val, 1); in micron_quad_enable()
941 dev_err(nor->dev, "error %d reading EVCR\n", ret); in micron_quad_enable()
945 dev_err(nor->dev, "Micron EVCR Quad bit not clear\n"); in micron_quad_enable()
952 static int set_quad_mode(struct spi_nor *nor, struct flash_info *info) in set_quad_mode() argument
958 status = macronix_quad_enable(nor); in set_quad_mode()
960 dev_err(nor->dev, "Macronix quad-read not enabled\n"); in set_quad_mode()
965 status = micron_quad_enable(nor); in set_quad_mode()
967 dev_err(nor->dev, "Micron quad-read not enabled\n"); in set_quad_mode()
972 status = spansion_quad_enable(nor); in set_quad_mode()
974 dev_err(nor->dev, "Spansion quad-read not enabled\n"); in set_quad_mode()
981 static int spi_nor_check(struct spi_nor *nor) in spi_nor_check() argument
983 if (!nor->dev || !nor->read || !nor->write || in spi_nor_check()
984 !nor->read_reg || !nor->write_reg || !nor->erase) { in spi_nor_check()
992 int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) in spi_nor_scan() argument
996 struct device *dev = nor->dev; in spi_nor_scan()
997 struct mtd_info *mtd = nor->mtd; in spi_nor_scan()
1002 ret = spi_nor_check(nor); in spi_nor_scan()
1008 id = spi_nor_read_id(nor); in spi_nor_scan()
1023 jid = spi_nor_read_id(nor); in spi_nor_scan()
1041 mutex_init(&nor->lock); in spi_nor_scan()
1051 write_enable(nor); in spi_nor_scan()
1052 write_sr(nor, 0); in spi_nor_scan()
1066 nor->flash_lock = stm_lock; in spi_nor_scan()
1067 nor->flash_unlock = stm_unlock; in spi_nor_scan()
1070 if (nor->flash_lock && nor->flash_unlock) { in spi_nor_scan()
1082 nor->flags |= SNOR_F_USE_FSR; in spi_nor_scan()
1087 nor->erase_opcode = SPINOR_OP_BE_4K; in spi_nor_scan()
1090 nor->erase_opcode = SPINOR_OP_BE_4K_PMC; in spi_nor_scan()
1095 nor->erase_opcode = SPINOR_OP_SE; in spi_nor_scan()
1103 nor->page_size = info->page_size; in spi_nor_scan()
1104 mtd->writebufsize = nor->page_size; in spi_nor_scan()
1109 nor->flash_read = SPI_NOR_FAST; in spi_nor_scan()
1111 nor->flash_read = SPI_NOR_NORMAL; in spi_nor_scan()
1114 nor->flash_read = SPI_NOR_FAST; in spi_nor_scan()
1119 nor->flash_read = SPI_NOR_NORMAL; in spi_nor_scan()
1123 ret = set_quad_mode(nor, info); in spi_nor_scan()
1128 nor->flash_read = SPI_NOR_QUAD; in spi_nor_scan()
1130 nor->flash_read = SPI_NOR_DUAL; in spi_nor_scan()
1134 switch (nor->flash_read) { in spi_nor_scan()
1136 nor->read_opcode = SPINOR_OP_READ_1_1_4; in spi_nor_scan()
1139 nor->read_opcode = SPINOR_OP_READ_1_1_2; in spi_nor_scan()
1142 nor->read_opcode = SPINOR_OP_READ_FAST; in spi_nor_scan()
1145 nor->read_opcode = SPINOR_OP_READ; in spi_nor_scan()
1152 nor->program_opcode = SPINOR_OP_PP; in spi_nor_scan()
1155 nor->addr_width = info->addr_width; in spi_nor_scan()
1158 nor->addr_width = 4; in spi_nor_scan()
1161 switch (nor->flash_read) { in spi_nor_scan()
1163 nor->read_opcode = SPINOR_OP_READ4_1_1_4; in spi_nor_scan()
1166 nor->read_opcode = SPINOR_OP_READ4_1_1_2; in spi_nor_scan()
1169 nor->read_opcode = SPINOR_OP_READ4_FAST; in spi_nor_scan()
1172 nor->read_opcode = SPINOR_OP_READ4; in spi_nor_scan()
1175 nor->program_opcode = SPINOR_OP_PP_4B; in spi_nor_scan()
1177 nor->erase_opcode = SPINOR_OP_SE_4B; in spi_nor_scan()
1180 set_4byte(nor, info, 1); in spi_nor_scan()
1182 nor->addr_width = 3; in spi_nor_scan()
1185 nor->read_dummy = spi_nor_read_dummy_cycles(nor); in spi_nor_scan()