Lines Matching refs:priv
104 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_get_ethtool_stats() local
110 mutex_lock(&priv->stats_mutex); in bcm_sf2_sw_get_ethtool_stats()
119 val = core_readq(priv, offset); in bcm_sf2_sw_get_ethtool_stats()
121 val = core_readl(priv, offset); in bcm_sf2_sw_get_ethtool_stats()
126 mutex_unlock(&priv->stats_mutex); in bcm_sf2_sw_get_ethtool_stats()
141 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_imp_vlan_setup() local
149 for (i = 0; i < priv->hw_params.num_ports; i++) { in bcm_sf2_imp_vlan_setup()
153 reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(i)); in bcm_sf2_imp_vlan_setup()
155 core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(i)); in bcm_sf2_imp_vlan_setup()
161 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_imp_setup() local
165 reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL); in bcm_sf2_imp_setup()
167 core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL); in bcm_sf2_imp_setup()
170 reg = core_readl(priv, CORE_IMP_CTL); in bcm_sf2_imp_setup()
173 core_writel(priv, reg, CORE_IMP_CTL); in bcm_sf2_imp_setup()
176 core_writel(priv, SW_FWDG_EN, CORE_SWMODE); in bcm_sf2_imp_setup()
179 reg = core_readl(priv, CORE_SWITCH_CTRL); in bcm_sf2_imp_setup()
181 core_writel(priv, reg, CORE_SWITCH_CTRL); in bcm_sf2_imp_setup()
200 reg = core_readl(priv, CORE_BRCM_HDR_CTRL); in bcm_sf2_imp_setup()
202 core_writel(priv, reg, CORE_BRCM_HDR_CTRL); in bcm_sf2_imp_setup()
207 reg = core_readl(priv, CORE_BRCM_HDR_RX_DIS); in bcm_sf2_imp_setup()
209 core_writel(priv, reg, CORE_BRCM_HDR_RX_DIS); in bcm_sf2_imp_setup()
214 reg = core_readl(priv, CORE_BRCM_HDR_TX_DIS); in bcm_sf2_imp_setup()
216 core_writel(priv, reg, CORE_BRCM_HDR_TX_DIS); in bcm_sf2_imp_setup()
219 reg = core_readl(priv, CORE_STS_OVERRIDE_IMP); in bcm_sf2_imp_setup()
221 core_writel(priv, reg, CORE_STS_OVERRIDE_IMP); in bcm_sf2_imp_setup()
226 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_eee_enable_set() local
229 reg = core_readl(priv, CORE_EEE_EN_CTRL); in bcm_sf2_eee_enable_set()
234 core_writel(priv, reg, CORE_EEE_EN_CTRL); in bcm_sf2_eee_enable_set()
239 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_gphy_enable_set() local
242 reg = reg_readl(priv, REG_SPHY_CNTRL); in bcm_sf2_gphy_enable_set()
246 reg_writel(priv, reg, REG_SPHY_CNTRL); in bcm_sf2_gphy_enable_set()
248 reg = reg_readl(priv, REG_SPHY_CNTRL); in bcm_sf2_gphy_enable_set()
252 reg_writel(priv, reg, REG_SPHY_CNTRL); in bcm_sf2_gphy_enable_set()
256 reg_writel(priv, reg, REG_SPHY_CNTRL); in bcm_sf2_gphy_enable_set()
260 reg = reg_readl(priv, REG_LED_CNTRL(0)); in bcm_sf2_gphy_enable_set()
262 reg_writel(priv, reg, REG_LED_CNTRL(0)); in bcm_sf2_gphy_enable_set()
269 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_port_setup() local
274 reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL); in bcm_sf2_port_setup()
276 core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL); in bcm_sf2_port_setup()
279 core_writel(priv, 0, CORE_G_PCTL_PORT(port)); in bcm_sf2_port_setup()
282 if (port == 0 && priv->hw_params.num_gphy == 1) { in bcm_sf2_port_setup()
301 intrl2_1_mask_clear(priv, P_IRQ_MASK(P7_IRQ_OFF)); in bcm_sf2_port_setup()
307 reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(port)); in bcm_sf2_port_setup()
310 reg |= priv->port_sts[port].vlan_ctl_mask; in bcm_sf2_port_setup()
311 core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(port)); in bcm_sf2_port_setup()
316 if (priv->port_sts[port].eee.eee_enabled) in bcm_sf2_port_setup()
325 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_port_disable() local
328 if (priv->wol_ports_mask & (1 << port)) in bcm_sf2_port_disable()
332 intrl2_1_mask_set(priv, P_IRQ_MASK(P7_IRQ_OFF)); in bcm_sf2_port_disable()
333 intrl2_1_writel(priv, P_IRQ_MASK(P7_IRQ_OFF), INTRL2_CPU_CLEAR); in bcm_sf2_port_disable()
336 if (port == 0 && priv->hw_params.num_gphy == 1) in bcm_sf2_port_disable()
344 reg = core_readl(priv, off); in bcm_sf2_port_disable()
346 core_writel(priv, reg, off); in bcm_sf2_port_disable()
349 reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL); in bcm_sf2_port_disable()
351 core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL); in bcm_sf2_port_disable()
359 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_eee_init() local
360 struct ethtool_eee *p = &priv->port_sts[port].eee; in bcm_sf2_eee_init()
377 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_get_eee() local
378 struct ethtool_eee *p = &priv->port_sts[port].eee; in bcm_sf2_sw_get_eee()
381 reg = core_readl(priv, CORE_EEE_LPI_INDICATE); in bcm_sf2_sw_get_eee()
392 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_set_eee() local
393 struct ethtool_eee *p = &priv->port_sts[port].eee; in bcm_sf2_sw_set_eee()
413 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_fast_age_port() local
417 core_writel(priv, port, CORE_FAST_AGE_PORT); in bcm_sf2_sw_fast_age_port()
419 reg = core_readl(priv, CORE_FAST_AGE_CTRL); in bcm_sf2_sw_fast_age_port()
421 core_writel(priv, reg, CORE_FAST_AGE_CTRL); in bcm_sf2_sw_fast_age_port()
424 reg = core_readl(priv, CORE_FAST_AGE_CTRL); in bcm_sf2_sw_fast_age_port()
434 core_writel(priv, 0, CORE_FAST_AGE_CTRL); in bcm_sf2_sw_fast_age_port()
442 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_br_join() local
446 p_ctl = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(port)); in bcm_sf2_sw_br_join()
448 for (i = 0; i < priv->hw_params.num_ports; i++) { in bcm_sf2_sw_br_join()
455 reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(i)); in bcm_sf2_sw_br_join()
457 core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(i)); in bcm_sf2_sw_br_join()
458 priv->port_sts[i].vlan_ctl_mask = reg; in bcm_sf2_sw_br_join()
466 core_writel(priv, p_ctl, CORE_PORT_VLAN_CTL_PORT(port)); in bcm_sf2_sw_br_join()
467 priv->port_sts[port].vlan_ctl_mask = p_ctl; in bcm_sf2_sw_br_join()
475 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_br_leave() local
479 p_ctl = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(port)); in bcm_sf2_sw_br_leave()
481 for (i = 0; i < priv->hw_params.num_ports; i++) { in bcm_sf2_sw_br_leave()
486 reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(i)); in bcm_sf2_sw_br_leave()
488 core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(i)); in bcm_sf2_sw_br_leave()
489 priv->port_sts[port].vlan_ctl_mask = reg; in bcm_sf2_sw_br_leave()
496 core_writel(priv, p_ctl, CORE_PORT_VLAN_CTL_PORT(port)); in bcm_sf2_sw_br_leave()
497 priv->port_sts[port].vlan_ctl_mask = p_ctl; in bcm_sf2_sw_br_leave()
505 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_br_set_stp_state() local
510 reg = core_readl(priv, CORE_G_PCTL_PORT(port)); in bcm_sf2_sw_br_set_stp_state()
549 reg = core_readl(priv, CORE_G_PCTL_PORT(port)); in bcm_sf2_sw_br_set_stp_state()
552 core_writel(priv, reg, CORE_G_PCTL_PORT(port)); in bcm_sf2_sw_br_set_stp_state()
559 struct bcm_sf2_priv *priv = dev_id; in bcm_sf2_switch_0_isr() local
561 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) & in bcm_sf2_switch_0_isr()
562 ~priv->irq0_mask; in bcm_sf2_switch_0_isr()
563 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); in bcm_sf2_switch_0_isr()
570 struct bcm_sf2_priv *priv = dev_id; in bcm_sf2_switch_1_isr() local
572 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) & in bcm_sf2_switch_1_isr()
573 ~priv->irq1_mask; in bcm_sf2_switch_1_isr()
574 intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR); in bcm_sf2_switch_1_isr()
576 if (priv->irq1_stat & P_LINK_UP_IRQ(P7_IRQ_OFF)) in bcm_sf2_switch_1_isr()
577 priv->port_sts[7].link = 1; in bcm_sf2_switch_1_isr()
578 if (priv->irq1_stat & P_LINK_DOWN_IRQ(P7_IRQ_OFF)) in bcm_sf2_switch_1_isr()
579 priv->port_sts[7].link = 0; in bcm_sf2_switch_1_isr()
584 static int bcm_sf2_sw_rst(struct bcm_sf2_priv *priv) in bcm_sf2_sw_rst() argument
589 reg = core_readl(priv, CORE_WATCHDOG_CTRL); in bcm_sf2_sw_rst()
591 core_writel(priv, reg, CORE_WATCHDOG_CTRL); in bcm_sf2_sw_rst()
594 reg = core_readl(priv, CORE_WATCHDOG_CTRL); in bcm_sf2_sw_rst()
607 static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv) in bcm_sf2_intr_disable() argument
609 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET); in bcm_sf2_intr_disable()
610 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); in bcm_sf2_intr_disable()
611 intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR); in bcm_sf2_intr_disable()
612 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET); in bcm_sf2_intr_disable()
613 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); in bcm_sf2_intr_disable()
614 intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR); in bcm_sf2_intr_disable()
620 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_setup() local
628 spin_lock_init(&priv->indir_lock); in bcm_sf2_sw_setup()
629 mutex_init(&priv->stats_mutex); in bcm_sf2_sw_setup()
636 priv->irq0 = irq_of_parse_and_map(dn, 0); in bcm_sf2_sw_setup()
637 priv->irq1 = irq_of_parse_and_map(dn, 1); in bcm_sf2_sw_setup()
639 base = &priv->core; in bcm_sf2_sw_setup()
650 ret = bcm_sf2_sw_rst(priv); in bcm_sf2_sw_setup()
657 bcm_sf2_intr_disable(priv); in bcm_sf2_sw_setup()
659 ret = request_irq(priv->irq0, bcm_sf2_switch_0_isr, 0, in bcm_sf2_sw_setup()
660 "switch_0", priv); in bcm_sf2_sw_setup()
666 ret = request_irq(priv->irq1, bcm_sf2_switch_1_isr, 0, in bcm_sf2_sw_setup()
667 "switch_1", priv); in bcm_sf2_sw_setup()
674 reg = core_readl(priv, CORE_GMNCFGCFG); in bcm_sf2_sw_setup()
676 core_writel(priv, reg, CORE_GMNCFGCFG); in bcm_sf2_sw_setup()
678 core_writel(priv, reg, CORE_GMNCFGCFG); in bcm_sf2_sw_setup()
681 priv->hw_params.num_ports = core_readl(priv, CORE_IMP0_PRT_ID) + 1; in bcm_sf2_sw_setup()
682 if (priv->hw_params.num_ports > DSA_MAX_PORTS) in bcm_sf2_sw_setup()
683 priv->hw_params.num_ports = DSA_MAX_PORTS; in bcm_sf2_sw_setup()
687 &priv->hw_params.num_gphy)) in bcm_sf2_sw_setup()
688 priv->hw_params.num_gphy = 1; in bcm_sf2_sw_setup()
691 for (port = 0; port < priv->hw_params.num_ports; port++) { in bcm_sf2_sw_setup()
706 rev = reg_readl(priv, REG_SWITCH_REVISION); in bcm_sf2_sw_setup()
707 priv->hw_params.top_rev = (rev >> SWITCH_TOP_REV_SHIFT) & in bcm_sf2_sw_setup()
709 priv->hw_params.core_rev = (rev & SF2_REV_MASK); in bcm_sf2_sw_setup()
711 rev = reg_readl(priv, REG_PHY_REVISION); in bcm_sf2_sw_setup()
712 priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK; in bcm_sf2_sw_setup()
715 priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff, in bcm_sf2_sw_setup()
716 priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff, in bcm_sf2_sw_setup()
717 priv->core, priv->irq0, priv->irq1); in bcm_sf2_sw_setup()
722 free_irq(priv->irq0, priv); in bcm_sf2_sw_setup()
724 base = &priv->core; in bcm_sf2_sw_setup()
740 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_get_phy_flags() local
747 return priv->hw_params.gphy_rev; in bcm_sf2_sw_get_phy_flags()
753 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_indir_rw() local
757 reg = reg_readl(priv, REG_SWITCH_CNTRL); in bcm_sf2_sw_indir_rw()
759 reg_writel(priv, reg, REG_SWITCH_CNTRL); in bcm_sf2_sw_indir_rw()
764 core_writel(priv, addr, reg); in bcm_sf2_sw_indir_rw()
771 ret = core_readl(priv, reg); in bcm_sf2_sw_indir_rw()
773 core_writel(priv, val, reg); in bcm_sf2_sw_indir_rw()
775 reg = reg_readl(priv, REG_SWITCH_CNTRL); in bcm_sf2_sw_indir_rw()
777 reg_writel(priv, reg, REG_SWITCH_CNTRL); in bcm_sf2_sw_indir_rw()
815 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_adjust_link() local
844 reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); in bcm_sf2_sw_adjust_link()
846 reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); in bcm_sf2_sw_adjust_link()
853 reg = reg_readl(priv, REG_RGMII_CNTRL_P(port)); in bcm_sf2_sw_adjust_link()
868 reg_writel(priv, reg, REG_RGMII_CNTRL_P(port)); in bcm_sf2_sw_adjust_link()
889 core_writel(priv, reg, CORE_STS_OVERRIDE_GMIIP_PORT(port)); in bcm_sf2_sw_adjust_link()
895 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_fixed_link_update() local
899 duplex = core_readl(priv, CORE_DUPSTS); in bcm_sf2_sw_fixed_link_update()
900 pause = core_readl(priv, CORE_PAUSESTS); in bcm_sf2_sw_fixed_link_update()
913 status->link = priv->port_sts[port].link; in bcm_sf2_sw_fixed_link_update()
920 reg = core_readl(priv, CORE_STS_OVERRIDE_GMIIP_PORT(port)); in bcm_sf2_sw_fixed_link_update()
926 core_writel(priv, reg, CORE_STS_OVERRIDE_GMIIP_PORT(port)); in bcm_sf2_sw_fixed_link_update()
940 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_suspend() local
943 bcm_sf2_intr_disable(priv); in bcm_sf2_sw_suspend()
960 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_resume() local
964 ret = bcm_sf2_sw_rst(priv); in bcm_sf2_sw_resume()
970 if (priv->hw_params.num_gphy == 1) in bcm_sf2_sw_resume()
987 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_get_wol() local
1000 if (priv->wol_ports_mask & (1 << port)) in bcm_sf2_sw_get_wol()
1010 struct bcm_sf2_priv *priv = ds_to_priv(ds); in bcm_sf2_sw_set_wol() local
1019 priv->wol_ports_mask |= (1 << port); in bcm_sf2_sw_set_wol()
1021 priv->wol_ports_mask &= ~(1 << port); in bcm_sf2_sw_set_wol()
1027 if (priv->wol_ports_mask && priv->wol_ports_mask != (1 << cpu_port)) in bcm_sf2_sw_set_wol()
1028 priv->wol_ports_mask |= (1 << cpu_port); in bcm_sf2_sw_set_wol()
1030 priv->wol_ports_mask &= ~(1 << cpu_port); in bcm_sf2_sw_set_wol()