Lines Matching refs:ret
32 int ret; in mv88e6xxx_reg_wait_ready() local
36 ret = mdiobus_read(bus, sw_addr, SMI_CMD); in mv88e6xxx_reg_wait_ready()
37 if (ret < 0) in mv88e6xxx_reg_wait_ready()
38 return ret; in mv88e6xxx_reg_wait_ready()
40 if ((ret & SMI_CMD_BUSY) == 0) in mv88e6xxx_reg_wait_ready()
49 int ret; in __mv88e6xxx_reg_read() local
55 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_read()
56 if (ret < 0) in __mv88e6xxx_reg_read()
57 return ret; in __mv88e6xxx_reg_read()
60 ret = mdiobus_write(bus, sw_addr, SMI_CMD, in __mv88e6xxx_reg_read()
62 if (ret < 0) in __mv88e6xxx_reg_read()
63 return ret; in __mv88e6xxx_reg_read()
66 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_read()
67 if (ret < 0) in __mv88e6xxx_reg_read()
68 return ret; in __mv88e6xxx_reg_read()
71 ret = mdiobus_read(bus, sw_addr, SMI_DATA); in __mv88e6xxx_reg_read()
72 if (ret < 0) in __mv88e6xxx_reg_read()
73 return ret; in __mv88e6xxx_reg_read()
75 return ret & 0xffff; in __mv88e6xxx_reg_read()
82 int ret; in _mv88e6xxx_reg_read() local
87 ret = __mv88e6xxx_reg_read(bus, ds->pd->sw_addr, addr, reg); in _mv88e6xxx_reg_read()
88 if (ret < 0) in _mv88e6xxx_reg_read()
89 return ret; in _mv88e6xxx_reg_read()
92 addr, reg, ret); in _mv88e6xxx_reg_read()
94 return ret; in _mv88e6xxx_reg_read()
100 int ret; in mv88e6xxx_reg_read() local
103 ret = _mv88e6xxx_reg_read(ds, addr, reg); in mv88e6xxx_reg_read()
106 return ret; in mv88e6xxx_reg_read()
112 int ret; in __mv88e6xxx_reg_write() local
118 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_write()
119 if (ret < 0) in __mv88e6xxx_reg_write()
120 return ret; in __mv88e6xxx_reg_write()
123 ret = mdiobus_write(bus, sw_addr, SMI_DATA, val); in __mv88e6xxx_reg_write()
124 if (ret < 0) in __mv88e6xxx_reg_write()
125 return ret; in __mv88e6xxx_reg_write()
128 ret = mdiobus_write(bus, sw_addr, SMI_CMD, in __mv88e6xxx_reg_write()
130 if (ret < 0) in __mv88e6xxx_reg_write()
131 return ret; in __mv88e6xxx_reg_write()
134 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_write()
135 if (ret < 0) in __mv88e6xxx_reg_write()
136 return ret; in __mv88e6xxx_reg_write()
159 int ret; in mv88e6xxx_reg_write() local
162 ret = _mv88e6xxx_reg_write(ds, addr, reg, val); in mv88e6xxx_reg_write()
165 return ret; in mv88e6xxx_reg_write()
198 int ret; in mv88e6xxx_set_addr_indirect() local
209 ret = REG_READ(REG_GLOBAL2, GLOBAL2_SWITCH_MAC); in mv88e6xxx_set_addr_indirect()
210 if ((ret & GLOBAL2_SWITCH_MAC_BUSY) == 0) in mv88e6xxx_set_addr_indirect()
240 int ret; in mv88e6xxx_ppu_disable() local
243 ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL); in mv88e6xxx_ppu_disable()
245 ret & ~GLOBAL_CONTROL_PPU_ENABLE); in mv88e6xxx_ppu_disable()
249 ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS); in mv88e6xxx_ppu_disable()
251 if ((ret & GLOBAL_STATUS_PPU_MASK) != in mv88e6xxx_ppu_disable()
261 int ret; in mv88e6xxx_ppu_enable() local
264 ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL); in mv88e6xxx_ppu_enable()
265 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, ret | GLOBAL_CONTROL_PPU_ENABLE); in mv88e6xxx_ppu_enable()
269 ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS); in mv88e6xxx_ppu_enable()
271 if ((ret & GLOBAL_STATUS_PPU_MASK) == in mv88e6xxx_ppu_enable()
303 int ret; in mv88e6xxx_ppu_access_get() local
313 ret = mv88e6xxx_ppu_disable(ds); in mv88e6xxx_ppu_access_get()
314 if (ret < 0) { in mv88e6xxx_ppu_access_get()
316 return ret; in mv88e6xxx_ppu_access_get()
321 ret = 0; in mv88e6xxx_ppu_access_get()
324 return ret; in mv88e6xxx_ppu_access_get()
349 int ret; in mv88e6xxx_phy_read_ppu() local
351 ret = mv88e6xxx_ppu_access_get(ds); in mv88e6xxx_phy_read_ppu()
352 if (ret >= 0) { in mv88e6xxx_phy_read_ppu()
353 ret = mv88e6xxx_reg_read(ds, addr, regnum); in mv88e6xxx_phy_read_ppu()
357 return ret; in mv88e6xxx_phy_read_ppu()
363 int ret; in mv88e6xxx_phy_write_ppu() local
365 ret = mv88e6xxx_ppu_access_get(ds); in mv88e6xxx_phy_write_ppu()
366 if (ret >= 0) { in mv88e6xxx_phy_write_ppu()
367 ret = mv88e6xxx_reg_write(ds, addr, regnum, val); in mv88e6xxx_phy_write_ppu()
371 return ret; in mv88e6xxx_phy_write_ppu()
452 int ret; in mv88e6xxx_stats_wait() local
456 ret = REG_READ(REG_GLOBAL, GLOBAL_STATS_OP); in mv88e6xxx_stats_wait()
457 if ((ret & GLOBAL_STATS_OP_BUSY) == 0) in mv88e6xxx_stats_wait()
466 int ret; in mv88e6xxx_stats_snapshot() local
477 ret = mv88e6xxx_stats_wait(ds); in mv88e6xxx_stats_snapshot()
478 if (ret < 0) in mv88e6xxx_stats_snapshot()
479 return ret; in mv88e6xxx_stats_snapshot()
487 int ret; in mv88e6xxx_stats_read() local
491 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, in mv88e6xxx_stats_read()
494 if (ret < 0) in mv88e6xxx_stats_read()
497 ret = mv88e6xxx_stats_wait(ds); in mv88e6xxx_stats_read()
498 if (ret < 0) in mv88e6xxx_stats_read()
501 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32); in mv88e6xxx_stats_read()
502 if (ret < 0) in mv88e6xxx_stats_read()
505 _val = ret << 16; in mv88e6xxx_stats_read()
507 ret = mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01); in mv88e6xxx_stats_read()
508 if (ret < 0) in mv88e6xxx_stats_read()
511 *val = _val | ret; in mv88e6xxx_stats_read()
587 int ret; in _mv88e6xxx_get_ethtool_stats() local
592 ret = mv88e6xxx_stats_snapshot(ds, port); in _mv88e6xxx_get_ethtool_stats()
593 if (ret < 0) { in _mv88e6xxx_get_ethtool_stats()
605 ret = mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stats()
607 if (ret < 0) in _mv88e6xxx_get_ethtool_stats()
609 low = ret; in _mv88e6xxx_get_ethtool_stats()
611 ret = mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stats()
613 if (ret < 0) in _mv88e6xxx_get_ethtool_stats()
615 high = ret; in _mv88e6xxx_get_ethtool_stats()
679 int ret; in mv88e6xxx_get_regs() local
681 ret = mv88e6xxx_reg_read(ds, REG_PORT(port), i); in mv88e6xxx_get_regs()
682 if (ret >= 0) in mv88e6xxx_get_regs()
683 p[i] = ret; in mv88e6xxx_get_regs()
692 int ret; in mv88e6xxx_get_temp() local
699 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x6); in mv88e6xxx_get_temp()
700 if (ret < 0) in mv88e6xxx_get_temp()
704 ret = _mv88e6xxx_phy_read(ds, 0x0, 0x1a); in mv88e6xxx_get_temp()
705 if (ret < 0) in mv88e6xxx_get_temp()
708 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret | (1 << 5)); in mv88e6xxx_get_temp()
709 if (ret < 0) in mv88e6xxx_get_temp()
717 ret = val; in mv88e6xxx_get_temp()
722 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret & ~(1 << 5)); in mv88e6xxx_get_temp()
723 if (ret < 0) in mv88e6xxx_get_temp()
731 return ret; in mv88e6xxx_get_temp()
740 int ret; in mv88e6xxx_wait() local
742 ret = REG_READ(reg, offset); in mv88e6xxx_wait()
743 if (!(ret & mask)) in mv88e6xxx_wait()
775 int ret; in _mv88e6xxx_wait() local
777 ret = _mv88e6xxx_reg_read(ds, reg, offset); in _mv88e6xxx_wait()
778 if (ret < 0) in _mv88e6xxx_wait()
779 return ret; in _mv88e6xxx_wait()
780 if (!(ret & mask)) in _mv88e6xxx_wait()
799 int ret; in _mv88e6xxx_phy_read_indirect() local
804 ret = mv88e6xxx_phy_wait(ds); in _mv88e6xxx_phy_read_indirect()
805 if (ret < 0) in _mv88e6xxx_phy_read_indirect()
806 return ret; in _mv88e6xxx_phy_read_indirect()
853 int ret; in mv88e6xxx_set_eee() local
857 ret = _mv88e6xxx_phy_read_indirect(ds, port, 16); in mv88e6xxx_set_eee()
858 if (ret < 0) in mv88e6xxx_set_eee()
861 reg = ret & ~0x0300; in mv88e6xxx_set_eee()
867 ret = _mv88e6xxx_phy_write_indirect(ds, port, 16, reg); in mv88e6xxx_set_eee()
871 return ret; in mv88e6xxx_set_eee()
876 int ret; in _mv88e6xxx_atu_cmd() local
878 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x01, fid); in _mv88e6xxx_atu_cmd()
879 if (ret < 0) in _mv88e6xxx_atu_cmd()
880 return ret; in _mv88e6xxx_atu_cmd()
882 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_OP, cmd); in _mv88e6xxx_atu_cmd()
883 if (ret < 0) in _mv88e6xxx_atu_cmd()
884 return ret; in _mv88e6xxx_atu_cmd()
891 int ret; in _mv88e6xxx_flush_fid() local
893 ret = _mv88e6xxx_atu_wait(ds); in _mv88e6xxx_flush_fid()
894 if (ret < 0) in _mv88e6xxx_flush_fid()
895 return ret; in _mv88e6xxx_flush_fid()
903 int reg, ret = 0; in mv88e6xxx_set_port_state() local
910 ret = reg; in mv88e6xxx_set_port_state()
922 ret = _mv88e6xxx_flush_fid(ds, ps->fid[port]); in mv88e6xxx_set_port_state()
923 if (ret) in mv88e6xxx_set_port_state()
927 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL, in mv88e6xxx_set_port_state()
933 return ret; in mv88e6xxx_set_port_state()
958 int ret; in _mv88e6xxx_update_bridge_config() local
967 ret = _mv88e6xxx_update_port_config(ds, port); in _mv88e6xxx_update_bridge_config()
968 if (ret) in _mv88e6xxx_update_bridge_config()
969 return ret; in _mv88e6xxx_update_bridge_config()
980 int ret = 0; in mv88e6xxx_join_bridge() local
1007 ret = _mv88e6xxx_update_bridge_config(ds, fid); in mv88e6xxx_join_bridge()
1012 return ret; in mv88e6xxx_join_bridge()
1019 int ret; in mv88e6xxx_leave_bridge() local
1045 ret = _mv88e6xxx_update_bridge_config(ds, fid); in mv88e6xxx_leave_bridge()
1046 if (!ret) in mv88e6xxx_leave_bridge()
1047 ret = _mv88e6xxx_update_bridge_config(ds, newfid); in mv88e6xxx_leave_bridge()
1051 return ret; in mv88e6xxx_leave_bridge()
1091 int i, ret; in __mv88e6xxx_write_addr() local
1094 ret = _mv88e6xxx_reg_write( in __mv88e6xxx_write_addr()
1097 if (ret < 0) in __mv88e6xxx_write_addr()
1098 return ret; in __mv88e6xxx_write_addr()
1106 int i, ret; in __mv88e6xxx_read_addr() local
1109 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in __mv88e6xxx_read_addr()
1111 if (ret < 0) in __mv88e6xxx_read_addr()
1112 return ret; in __mv88e6xxx_read_addr()
1113 addr[i * 2] = ret >> 8; in __mv88e6xxx_read_addr()
1114 addr[i * 2 + 1] = ret & 0xff; in __mv88e6xxx_read_addr()
1125 int ret; in __mv88e6xxx_port_fdb_cmd() local
1127 ret = _mv88e6xxx_atu_wait(ds); in __mv88e6xxx_port_fdb_cmd()
1128 if (ret < 0) in __mv88e6xxx_port_fdb_cmd()
1129 return ret; in __mv88e6xxx_port_fdb_cmd()
1131 ret = __mv88e6xxx_write_addr(ds, addr); in __mv88e6xxx_port_fdb_cmd()
1132 if (ret < 0) in __mv88e6xxx_port_fdb_cmd()
1133 return ret; in __mv88e6xxx_port_fdb_cmd()
1135 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_DATA, in __mv88e6xxx_port_fdb_cmd()
1137 if (ret) in __mv88e6xxx_port_fdb_cmd()
1138 return ret; in __mv88e6xxx_port_fdb_cmd()
1140 ret = _mv88e6xxx_atu_cmd(ds, fid, GLOBAL_ATU_OP_LOAD_DB); in __mv88e6xxx_port_fdb_cmd()
1142 return ret; in __mv88e6xxx_port_fdb_cmd()
1152 int ret; in mv88e6xxx_port_fdb_add() local
1155 ret = __mv88e6xxx_port_fdb_cmd(ds, port, addr, state); in mv88e6xxx_port_fdb_add()
1158 return ret; in mv88e6xxx_port_fdb_add()
1165 int ret; in mv88e6xxx_port_fdb_del() local
1168 ret = __mv88e6xxx_port_fdb_cmd(ds, port, addr, in mv88e6xxx_port_fdb_del()
1172 return ret; in mv88e6xxx_port_fdb_del()
1180 int ret, state; in __mv88e6xxx_port_getnext() local
1182 ret = _mv88e6xxx_atu_wait(ds); in __mv88e6xxx_port_getnext()
1183 if (ret < 0) in __mv88e6xxx_port_getnext()
1184 return ret; in __mv88e6xxx_port_getnext()
1186 ret = __mv88e6xxx_write_addr(ds, addr); in __mv88e6xxx_port_getnext()
1187 if (ret < 0) in __mv88e6xxx_port_getnext()
1188 return ret; in __mv88e6xxx_port_getnext()
1191 ret = _mv88e6xxx_atu_cmd(ds, fid, GLOBAL_ATU_OP_GET_NEXT_DB); in __mv88e6xxx_port_getnext()
1192 if (ret < 0) in __mv88e6xxx_port_getnext()
1193 return ret; in __mv88e6xxx_port_getnext()
1195 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA); in __mv88e6xxx_port_getnext()
1196 if (ret < 0) in __mv88e6xxx_port_getnext()
1197 return ret; in __mv88e6xxx_port_getnext()
1198 state = ret & GLOBAL_ATU_DATA_STATE_MASK; in __mv88e6xxx_port_getnext()
1201 } while (!(((ret >> 4) & 0xff) & (1 << port))); in __mv88e6xxx_port_getnext()
1203 ret = __mv88e6xxx_read_addr(ds, addr); in __mv88e6xxx_port_getnext()
1204 if (ret < 0) in __mv88e6xxx_port_getnext()
1205 return ret; in __mv88e6xxx_port_getnext()
1219 int ret; in mv88e6xxx_port_fdb_getnext() local
1222 ret = __mv88e6xxx_port_getnext(ds, port, addr, is_static); in mv88e6xxx_port_fdb_getnext()
1225 return ret; in mv88e6xxx_port_fdb_getnext()
1247 int ret, fid; in mv88e6xxx_setup_port_common() local
1254 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_1, 0x0000); in mv88e6xxx_setup_port_common()
1255 if (ret) in mv88e6xxx_setup_port_common()
1270 ret = _mv88e6xxx_update_port_config(ds, port); in mv88e6xxx_setup_port_common()
1271 if (ret) in mv88e6xxx_setup_port_common()
1277 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_DEFAULT_VLAN, in mv88e6xxx_setup_port_common()
1281 return ret; in mv88e6xxx_setup_port_common()
1306 int ret; in mv88e6xxx_switch_reset() local
1311 ret = REG_READ(REG_PORT(i), PORT_CONTROL); in mv88e6xxx_switch_reset()
1312 REG_WRITE(REG_PORT(i), PORT_CONTROL, ret & 0xfffc); in mv88e6xxx_switch_reset()
1330 ret = REG_READ(REG_GLOBAL, 0x00); in mv88e6xxx_switch_reset()
1331 if ((ret & is_reset) == is_reset) in mv88e6xxx_switch_reset()
1344 int ret; in mv88e6xxx_phy_page_read() local
1347 ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); in mv88e6xxx_phy_page_read()
1348 if (ret < 0) in mv88e6xxx_phy_page_read()
1350 ret = _mv88e6xxx_phy_read_indirect(ds, port, reg); in mv88e6xxx_phy_page_read()
1354 return ret; in mv88e6xxx_phy_page_read()
1361 int ret; in mv88e6xxx_phy_page_write() local
1364 ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); in mv88e6xxx_phy_page_write()
1365 if (ret < 0) in mv88e6xxx_phy_page_write()
1368 ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val); in mv88e6xxx_phy_page_write()
1372 return ret; in mv88e6xxx_phy_page_write()
1389 int ret; in mv88e6xxx_phy_read() local
1395 ret = _mv88e6xxx_phy_read(ds, addr, regnum); in mv88e6xxx_phy_read()
1397 return ret; in mv88e6xxx_phy_read()
1405 int ret; in mv88e6xxx_phy_write() local
1411 ret = _mv88e6xxx_phy_write(ds, addr, regnum, val); in mv88e6xxx_phy_write()
1413 return ret; in mv88e6xxx_phy_write()
1421 int ret; in mv88e6xxx_phy_read_indirect() local
1427 ret = _mv88e6xxx_phy_read_indirect(ds, addr, regnum); in mv88e6xxx_phy_read_indirect()
1429 return ret; in mv88e6xxx_phy_read_indirect()
1438 int ret; in mv88e6xxx_phy_write_indirect() local
1444 ret = _mv88e6xxx_phy_write_indirect(ds, addr, regnum, val); in mv88e6xxx_phy_write_indirect()
1446 return ret; in mv88e6xxx_phy_write_indirect()