98 	writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);  in emac_update_speed()
111 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);  in emac_update_duplex()
192 	writel(0, db->membase + EMAC_CTL_REG);  in emac_reset()
194 	writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG);  in emac_reset()
268 	writel(reg_val | EMAC_TX_MODE_ABORTED_FRAME_EN,  in emac_setup()
274 	writel(reg_val | EMAC_MAC_CTL0_RX_FLOW_CTL_EN |  in emac_setup()
283 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);  in emac_setup()
286 	writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG);  in emac_setup()
289 	writel((EMAC_MAC_IPGR_IPG1 << 8) | EMAC_MAC_IPGR_IPG2,  in emac_setup()
293 	writel((EMAC_MAC_CLRT_COLLISION_WINDOW << 8) | EMAC_MAC_CLRT_RM,  in emac_setup()
297 	writel(EMAC_MAX_FRAME_LEN,  in emac_setup()
316 	writel(reg_val | EMAC_RX_CTL_PASS_LEN_OOR_EN |  in emac_set_rx_mode()
332 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);  in emac_powerup()
339 	writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);  in emac_powerup()
345 	writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);  in emac_powerup()
348 	writel(0x0, db->membase + EMAC_RX_FBC_REG);  in emac_powerup()
351 	writel(0, db->membase + EMAC_INT_CTL_REG);  in emac_powerup()
353 	writel(reg_val, db->membase + EMAC_INT_STA_REG);  in emac_powerup()
361 	writel(ndev->dev_addr[0] << 16 | ndev->dev_addr[1] << 8 | ndev->  in emac_powerup()
363 	writel(ndev->dev_addr[3] << 16 | ndev->dev_addr[4] << 8 | ndev->  in emac_powerup()
381 	writel(dev->dev_addr[0] << 16 | dev->dev_addr[1] << 8 | dev->  in emac_set_mac_address()
383 	writel(dev->dev_addr[3] << 16 | dev->dev_addr[4] << 8 | dev->  in emac_set_mac_address()
403 	writel(reg_val | EMAC_CTL_RESET | EMAC_CTL_TX_EN | EMAC_CTL_RX_EN,  in emac_init_device()
409 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_init_device()
454 	writel(channel, db->membase + EMAC_TX_INS_REG);  in emac_start_xmit()
464 		writel(skb->len, db->membase + EMAC_TX_PL0_REG);  in emac_start_xmit()
466 		writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,  in emac_start_xmit()
473 		writel(skb->len, db->membase + EMAC_TX_PL1_REG);  in emac_start_xmit()
475 		writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,  in emac_start_xmit()
550 			writel(reg_val, db->membase + EMAC_RX_CTL_REG);  in emac_rx()
557 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_rx()
571 			writel(reg_val & ~EMAC_CTL_RX_EN,  in emac_rx()
576 			writel(reg_val | (1 << 3),  in emac_rx()
585 			writel(reg_val | EMAC_CTL_RX_EN,  in emac_rx()
589 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_rx()
673 	writel(0, db->membase + EMAC_INT_CTL_REG);  in emac_interrupt()
679 	writel(int_status, db->membase + EMAC_INT_STA_REG);  in emac_interrupt()
702 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_interrupt()
758 	writel(0, db->membase + EMAC_INT_CTL_REG);  in emac_shutdown()
762 	writel(reg_val, db->membase + EMAC_INT_STA_REG);  in emac_shutdown()
767 	writel(reg_val, db->membase + EMAC_CTL_REG);  in emac_shutdown()