436 		XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH, table[i]);  in xgbe_set_rss_lookup_table()
510 		XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0);  in xgbe_disable_tx_flow_control()
537 		XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 1);  in xgbe_enable_tx_flow_control()
539 		XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, PT, 0xffff);  in xgbe_enable_tx_flow_control()
618 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, NIE, 1);  in xgbe_enable_dma_interrupts()
619 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, AIE, 1);  in xgbe_enable_dma_interrupts()
620 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);  in xgbe_enable_dma_interrupts()
628 				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);  in xgbe_enable_dma_interrupts()
636 			XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);  in xgbe_enable_dma_interrupts()
638 				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);  in xgbe_enable_dma_interrupts()
666 	XGMAC_SET_BITS(mac_ier, MAC_IER, TSIE, 1);  in xgbe_enable_mac_interrupts()
755 		XGMAC_SET_BITS(mac_addr_hi, MAC_MACA1HR, AE, 1);  in xgbe_set_mac_reg()
1265 			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_get_rx_tstamp()
1275 	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1);  in xgbe_config_tstamp()
1278 	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1);  in xgbe_config_tstamp()
1281 	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1);  in xgbe_config_tstamp()
1648 		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1650 		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1656 	XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, CONTEXT, 0);  in xgbe_dev_read()
1660 		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1670 		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1693 		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1699 	XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1704 		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1716 			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1725 			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,  in xgbe_dev_read()
1728 			XGMAC_SET_BITS(packet->errors, RX_PACKET_ERRORS,  in xgbe_dev_read()
1759 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);  in xgbe_enable_int()
1762 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 1);  in xgbe_enable_int()
1765 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 1);  in xgbe_enable_int()
1768 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);  in xgbe_enable_int()
1771 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);  in xgbe_enable_int()
1774 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 1);  in xgbe_enable_int()
1777 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);  in xgbe_enable_int()
1778 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);  in xgbe_enable_int()
1781 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);  in xgbe_enable_int()
1804 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);  in xgbe_disable_int()
1807 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 0);  in xgbe_disable_int()
1810 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 0);  in xgbe_disable_int()
1813 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);  in xgbe_disable_int()
1816 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 0);  in xgbe_disable_int()
1819 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 0);  in xgbe_disable_int()
1822 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);  in xgbe_disable_int()
1823 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);  in xgbe_disable_int()
1826 		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 0);  in xgbe_disable_int()
1902 	XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRC, pdata->arcache);  in xgbe_config_dma_cache()
1903 	XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRD, pdata->axdomain);  in xgbe_config_dma_cache()
1904 	XGMAC_SET_BITS(arcache, DMA_AXIARCR, TEC, pdata->arcache);  in xgbe_config_dma_cache()
1905 	XGMAC_SET_BITS(arcache, DMA_AXIARCR, TED, pdata->axdomain);  in xgbe_config_dma_cache()
1906 	XGMAC_SET_BITS(arcache, DMA_AXIARCR, THC, pdata->arcache);  in xgbe_config_dma_cache()
1907 	XGMAC_SET_BITS(arcache, DMA_AXIARCR, THD, pdata->axdomain);  in xgbe_config_dma_cache()
1911 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWC, pdata->awcache);  in xgbe_config_dma_cache()
1912 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWD, pdata->axdomain);  in xgbe_config_dma_cache()
1913 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPC, pdata->awcache);  in xgbe_config_dma_cache()
1914 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPD, pdata->axdomain);  in xgbe_config_dma_cache()
1915 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHC, pdata->awcache);  in xgbe_config_dma_cache()
1916 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHD, pdata->axdomain);  in xgbe_config_dma_cache()
1917 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDC, pdata->awcache);  in xgbe_config_dma_cache()
1918 	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDD, pdata->axdomain);  in xgbe_config_dma_cache()