Lines Matching refs:hw_addr
279 iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL); in atl1_reset_hw()
280 ioread32(hw->hw_addr + REG_MASTER_CTRL); in atl1_reset_hw()
282 iowrite16(1, hw->hw_addr + REG_PHY_ENABLE); in atl1_reset_hw()
283 ioread16(hw->hw_addr + REG_PHY_ENABLE); in atl1_reset_hw()
290 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS); in atl1_reset_hw()
316 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL); in atl1_check_eeprom_exist()
319 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL); in atl1_check_eeprom_exist()
322 value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST); in atl1_check_eeprom_exist()
335 iowrite32(0, hw->hw_addr + REG_VPD_DATA); in atl1_read_eeprom()
337 iowrite32(control, hw->hw_addr + REG_VPD_CAP); in atl1_read_eeprom()
338 ioread32(hw->hw_addr + REG_VPD_CAP); in atl1_read_eeprom()
342 control = ioread32(hw->hw_addr + REG_VPD_CAP); in atl1_read_eeprom()
347 *p_value = ioread32(hw->hw_addr + REG_VPD_DATA); in atl1_read_eeprom()
367 iowrite32(val, hw->hw_addr + REG_MDIO_CTRL); in atl1_read_phy_reg()
368 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_read_phy_reg()
372 val = ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_read_phy_reg()
394 iowrite32(0, hw->hw_addr + REG_SPI_DATA); in atl1_spi_read()
395 iowrite32(addr, hw->hw_addr + REG_SPI_ADDR); in atl1_spi_read()
410 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL); in atl1_spi_read()
413 iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL); in atl1_spi_read()
414 ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL); in atl1_spi_read()
418 value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL); in atl1_spi_read()
426 *buf = ioread32(hw->hw_addr + REG_SPI_DATA); in atl1_spi_read()
519 addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR); in atl1_get_permanent_address()
520 addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4)); in atl1_get_permanent_address()
595 mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2)); in atl1_hash_set()
597 iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2)); in atl1_hash_set()
615 iowrite32(val, hw->hw_addr + REG_MDIO_CTRL); in atl1_write_phy_reg()
616 ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_write_phy_reg()
620 val = ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_write_phy_reg()
693 val = ioread32(hw->hw_addr + REG_MDIO_CTRL); in atl1_phy_reset()
827 hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM); in atl1_init_flash_opcode()
829 hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE); in atl1_init_flash_opcode()
831 hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE); in atl1_init_flash_opcode()
833 hw->hw_addr + REG_SPI_FLASH_OP_RDID); in atl1_init_flash_opcode()
835 hw->hw_addr + REG_SPI_FLASH_OP_WREN); in atl1_init_flash_opcode()
837 hw->hw_addr + REG_SPI_FLASH_OP_RDSR); in atl1_init_flash_opcode()
839 hw->hw_addr + REG_SPI_FLASH_OP_WRSR); in atl1_init_flash_opcode()
841 hw->hw_addr + REG_SPI_FLASH_OP_READ); in atl1_init_flash_opcode()
857 iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE); in atl1_init_hw()
859 iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2)); in atl1_init_hw()
933 iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR); in atl1_set_mac_addr()
936 iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2)); in atl1_set_mac_addr()
1296 iowrite32(value, hw->hw_addr + REG_MAC_CTRL); in atl1_setup_mac_ctrl()
1424 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH); in set_flow_ctrl_old()
1434 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH); in set_flow_ctrl_old()
1442 value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN); in set_flow_ctrl_new()
1451 iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH); in set_flow_ctrl_new()
1454 value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN); in set_flow_ctrl_new()
1463 iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH); in set_flow_ctrl_new()
1478 iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR); in atl1_configure()
1485 iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR); in atl1_configure()
1487 iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4)); in atl1_configure()
1493 hw->hw_addr + REG_DESC_BASE_ADDR_HI); in atl1_configure()
1496 hw->hw_addr + REG_DESC_RFD_ADDR_LO); in atl1_configure()
1498 hw->hw_addr + REG_DESC_RRD_ADDR_LO); in atl1_configure()
1500 hw->hw_addr + REG_DESC_TPD_ADDR_LO); in atl1_configure()
1502 hw->hw_addr + REG_DESC_CMB_ADDR_LO); in atl1_configure()
1504 hw->hw_addr + REG_DESC_SMB_ADDR_LO); in atl1_configure()
1510 iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE); in atl1_configure()
1511 iowrite32(adapter->tpd_ring.count, hw->hw_addr + in atl1_configure()
1515 iowrite32(1, hw->hw_addr + REG_LOAD_PTR); in atl1_configure()
1524 iowrite32(value, hw->hw_addr + REG_MAILBOX); in atl1_configure()
1535 iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG); in atl1_configure()
1545 iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL); in atl1_configure()
1548 iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT); in atl1_configure()
1549 iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL); in atl1_configure()
1552 iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER); in atl1_configure()
1555 iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU); in atl1_configure()
1564 iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM); in atl1_configure()
1587 iowrite32(value, hw->hw_addr + REG_TXQ_CTRL); in atl1_configure()
1594 iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG); in atl1_configure()
1604 iowrite32(value, hw->hw_addr + REG_RXQ_CTRL); in atl1_configure()
1615 iowrite32(value, hw->hw_addr + REG_DMA_CTRL); in atl1_configure()
1622 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH); in atl1_configure()
1624 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER); in atl1_configure()
1625 iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER); in atl1_configure()
1629 iowrite32(value, hw->hw_addr + REG_CSMB_CTRL); in atl1_configure()
1631 value = ioread32(adapter->hw.hw_addr + REG_ISR); in atl1_configure()
1638 iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR); in atl1_configure()
1639 iowrite32(0, adapter->hw.hw_addr + REG_ISR); in atl1_configure()
1652 iowrite32(value, adapter->hw.hw_addr + 0x12FC); in atl1_pcie_patch()
1654 value = ioread32(adapter->hw.hw_addr + 0x1008); in atl1_pcie_patch()
1656 iowrite32(value, adapter->hw.hw_addr + 0x1008); in atl1_pcie_patch()
1669 value = ioread16(adapter->hw.hw_addr + PCI_COMMAND); in atl1_via_workaround()
1672 iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND); in atl1_via_workaround()
1774 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX); in atl1_update_mailbox()
2065 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX); in atl1_intr_rx()
2516 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR); in atl1_intr()
2570 iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR); in atl1_intr()
2821 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL); in atl1_suspend()
2822 ioread32(hw->hw_addr + REG_WOL_CTRL); in atl1_suspend()
2835 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL); in atl1_suspend()
2836 ioread32(hw->hw_addr + REG_MAC_CTRL); in atl1_suspend()
2839 ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC); in atl1_suspend()
2841 iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC); in atl1_suspend()
2842 ioread32(hw->hw_addr + REG_PCIE_PHYMISC); in atl1_suspend()
2845 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL); in atl1_suspend()
2846 ioread32(hw->hw_addr + REG_WOL_CTRL); in atl1_suspend()
2847 iowrite32(0, hw->hw_addr + REG_MAC_CTRL); in atl1_suspend()
2848 ioread32(hw->hw_addr + REG_MAC_CTRL); in atl1_suspend()
2855 iowrite32(0, hw->hw_addr + REG_WOL_CTRL); in atl1_suspend()
2856 ioread32(hw->hw_addr + REG_WOL_CTRL); in atl1_suspend()
2857 ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC); in atl1_suspend()
2859 iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC); in atl1_suspend()
2860 ioread32(hw->hw_addr + REG_PCIE_PHYMISC); in atl1_suspend()
2872 iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL); in atl1_resume()
2991 adapter->hw.hw_addr = pci_iomap(pdev, 0, 0); in atl1_probe()
2992 if (!adapter->hw.hw_addr) { in atl1_probe()
2997 adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr + in atl1_probe()
3042 iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE); in atl1_probe()
3095 pci_iounmap(pdev, adapter->hw.hw_addr); in atl1_probe()
3137 iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE); in atl1_remove()
3139 pci_iounmap(pdev, adapter->hw.hw_addr); in atl1_remove()
3480 regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32))); in atl1_get_regs()