279 	iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);  in atl1_reset_hw()
319 		iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_check_eeprom_exist()
335 	iowrite32(0, hw->hw_addr + REG_VPD_DATA);  in atl1_read_eeprom()
337 	iowrite32(control, hw->hw_addr + REG_VPD_CAP);  in atl1_read_eeprom()
367 	iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);  in atl1_read_phy_reg()
394 	iowrite32(0, hw->hw_addr + REG_SPI_DATA);  in atl1_spi_read()
395 	iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);  in atl1_spi_read()
410 	iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_spi_read()
413 	iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_spi_read()
597 	iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));  in atl1_hash_set()
615 	iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);  in atl1_write_phy_reg()
857 	iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);  in atl1_init_hw()
859 	iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));  in atl1_init_hw()
933 	iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);  in atl1_set_mac_addr()
936 	iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));  in atl1_set_mac_addr()
1296 	iowrite32(value, hw->hw_addr + REG_MAC_CTRL);  in atl1_setup_mac_ctrl()
1424 	iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);  in set_flow_ctrl_old()
1434 	iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);  in set_flow_ctrl_old()
1451 	iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);  in set_flow_ctrl_new()
1463 	iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);  in set_flow_ctrl_new()
1478 	iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);  in atl1_configure()
1485 	iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);  in atl1_configure()
1487 	iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));  in atl1_configure()
1492 	iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),  in atl1_configure()
1495 	iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),  in atl1_configure()
1497 	iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),  in atl1_configure()
1499 	iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),  in atl1_configure()
1501 	iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),  in atl1_configure()
1503 	iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),  in atl1_configure()
1510 	iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);  in atl1_configure()
1511 	iowrite32(adapter->tpd_ring.count, hw->hw_addr +  in atl1_configure()
1515 	iowrite32(1, hw->hw_addr + REG_LOAD_PTR);  in atl1_configure()
1524 	iowrite32(value, hw->hw_addr + REG_MAILBOX);  in atl1_configure()
1535 	iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);  in atl1_configure()
1545 	iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);  in atl1_configure()
1549 	iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);  in atl1_configure()
1555 	iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);  in atl1_configure()
1564 	iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);  in atl1_configure()
1587 	iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);  in atl1_configure()
1594 	iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);  in atl1_configure()
1604 	iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);  in atl1_configure()
1615 	iowrite32(value, hw->hw_addr + REG_DMA_CTRL);  in atl1_configure()
1622 	iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);  in atl1_configure()
1624 	iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);  in atl1_configure()
1625 	iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);  in atl1_configure()
1629 	iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);  in atl1_configure()
1638 	iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);  in atl1_configure()
1639 	iowrite32(0, adapter->hw.hw_addr + REG_ISR);  in atl1_configure()
1652 	iowrite32(value, adapter->hw.hw_addr + 0x12FC);  in atl1_pcie_patch()
1656 	iowrite32(value, adapter->hw.hw_addr + 0x1008);  in atl1_pcie_patch()
1672 	iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);  in atl1_via_workaround()
1774 	iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);  in atl1_update_mailbox()
2065 		iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);  in atl1_intr_rx()
2516 	iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);  in atl1_intr()
2570 	iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);  in atl1_intr()
2821 		iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2835 		iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);  in atl1_suspend()
2841 		iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2845 		iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2847 		iowrite32(0, hw->hw_addr + REG_MAC_CTRL);  in atl1_suspend()
2855 	iowrite32(0, hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2859 	iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2872 	iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);  in atl1_resume()