37 			dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \
53 	void *x = dma_zalloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \
62 	void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \
85 u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode);
93 void bnx2x_send_unload_done(struct bnx2x *bp, bool keep_link);
104 int bnx2x_rss(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
116 void bnx2x__init_func_obj(struct bnx2x *bp);
126 int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp,
134 int bnx2x_setup_leading(struct bnx2x *bp);
145 u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param);
153 int bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode);
160 void bnx2x_link_set(struct bnx2x *bp);
168 void bnx2x_force_link_reset(struct bnx2x *bp);
178 u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes);
188 void bnx2x_drv_pulse(struct bnx2x *bp);
200 void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment,
204 void bnx2x_pf_disable(struct bnx2x *bp);
205 int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val);
212 void bnx2x__link_status_update(struct bnx2x *bp);
219 void bnx2x_link_report(struct bnx2x *bp);
222 void __bnx2x_link_report(struct bnx2x *bp);
231 u16 bnx2x_get_mf_speed(struct bnx2x *bp);
255 int bnx2x_cnic_notify(struct bnx2x *bp, int cmd);
262 void bnx2x_setup_cnic_irq_info(struct bnx2x *bp);
269 void bnx2x_setup_cnic_info(struct bnx2x *bp);
276 void bnx2x_int_enable(struct bnx2x *bp);
287 void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw);
300 void bnx2x_nic_init_cnic(struct bnx2x *bp);
312 void bnx2x_pre_irq_nic_init(struct bnx2x *bp);
325 void bnx2x_post_irq_nic_init(struct bnx2x *bp, u32 load_code);
331 int bnx2x_alloc_mem_cnic(struct bnx2x *bp);
337 int bnx2x_alloc_mem(struct bnx2x *bp);
344 void bnx2x_free_mem_cnic(struct bnx2x *bp);
350 void bnx2x_free_mem(struct bnx2x *bp);
357 void bnx2x_set_num_queues(struct bnx2x *bp);
370 void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link);
378 int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource);
386 int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource);
393 int bnx2x_release_leader_lock(struct bnx2x *bp);
403 int bnx2x_set_eth_mac(struct bnx2x *bp, bool set);
414 void bnx2x_set_rx_mode_inner(struct bnx2x *bp);
417 void bnx2x_set_pf_load(struct bnx2x *bp);
418 bool bnx2x_clear_pf_load(struct bnx2x *bp);
419 bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print);
420 bool bnx2x_reset_is_done(struct bnx2x *bp, int engine);
421 void bnx2x_set_reset_in_progress(struct bnx2x *bp);
422 void bnx2x_set_reset_global(struct bnx2x *bp);
423 void bnx2x_disable_close_the_gate(struct bnx2x *bp);
424 int bnx2x_init_hw_func_cnic(struct bnx2x *bp);
439 void bnx2x_ilt_set_info(struct bnx2x *bp);
447 void bnx2x_ilt_set_info_cnic(struct bnx2x *bp);
454 void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem);
464 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state);
472 void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value);
474 void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl);
477 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link);
480 int bnx2x_nic_load(struct bnx2x *bp, int load_mode);
497 static inline void bnx2x_update_rx_prod(struct bnx2x *bp,  in bnx2x_update_rx_prod()  argument
520 		REG_WR(bp, fp->ustorm_rx_prods_offset + i*4,  in bnx2x_update_rx_prod()
536 int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata);
543 void bnx2x_free_irq(struct bnx2x *bp);
545 void bnx2x_free_fp_mem(struct bnx2x *bp);
546 void bnx2x_init_rx_rings(struct bnx2x *bp);
547 void bnx2x_init_rx_rings_cnic(struct bnx2x *bp);
548 void bnx2x_free_skbs(struct bnx2x *bp);
549 void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw);
550 void bnx2x_netif_start(struct bnx2x *bp);
551 int bnx2x_load_cnic(struct bnx2x *bp);
561 int bnx2x_enable_msix(struct bnx2x *bp);
568 int bnx2x_enable_msi(struct bnx2x *bp);
582 int bnx2x_alloc_mem_bp(struct bnx2x *bp);
589 void bnx2x_free_mem_bp(struct bnx2x *bp);
631 static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id,  in bnx2x_igu_ack_sb_gen()  argument
645 	REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags);  in bnx2x_igu_ack_sb_gen()
652 static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id,  in bnx2x_hc_ack_sb()  argument
655 	u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 +  in bnx2x_hc_ack_sb()
666 	REG_WR(bp, hc_addr, (*(u32 *)&igu_ack));  in bnx2x_hc_ack_sb()
673 static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm,  in bnx2x_ack_sb()  argument
676 	if (bp->common.int_block == INT_BLOCK_HC)  in bnx2x_ack_sb()
677 		bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update);  in bnx2x_ack_sb()
681 		if (CHIP_INT_MODE_IS_BC(bp))  in bnx2x_ack_sb()
683 		else if (igu_sb_id != bp->igu_dsb_id)  in bnx2x_ack_sb()
689 		bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update);  in bnx2x_ack_sb()
693 static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp)  in bnx2x_hc_ack_int()  argument
695 	u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 +  in bnx2x_hc_ack_int()
697 	u32 result = REG_RD(bp, hc_addr);  in bnx2x_hc_ack_int()
703 static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp)  in bnx2x_igu_ack_int()  argument
706 	u32 result = REG_RD(bp, igu_addr);  in bnx2x_igu_ack_int()
715 static inline u16 bnx2x_ack_int(struct bnx2x *bp)  in bnx2x_ack_int()  argument
718 	if (bp->common.int_block == INT_BLOCK_HC)  in bnx2x_ack_int()
719 		return bnx2x_hc_ack_int(bp);  in bnx2x_ack_int()
721 		return bnx2x_igu_ack_int(bp);  in bnx2x_ack_int()
731 static inline u16 bnx2x_tx_avail(struct bnx2x *bp,  in bnx2x_tx_avail()  argument
790 static inline void bnx2x_tx_disable(struct bnx2x *bp)  in bnx2x_tx_disable()  argument
792 	netif_tx_disable(bp->dev);  in bnx2x_tx_disable()
793 	netif_carrier_off(bp->dev);  in bnx2x_tx_disable()
796 static inline void bnx2x_free_rx_sge(struct bnx2x *bp,  in bnx2x_free_rx_sge()  argument
807 	dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping),  in bnx2x_free_rx_sge()
816 static inline void bnx2x_del_all_napi_cnic(struct bnx2x *bp)  in bnx2x_del_all_napi_cnic()  argument
820 	for_each_rx_queue_cnic(bp, i) {  in bnx2x_del_all_napi_cnic()
821 		napi_hash_del(&bnx2x_fp(bp, i, napi));  in bnx2x_del_all_napi_cnic()
822 		netif_napi_del(&bnx2x_fp(bp, i, napi));  in bnx2x_del_all_napi_cnic()
826 static inline void bnx2x_del_all_napi(struct bnx2x *bp)  in bnx2x_del_all_napi()  argument
830 	for_each_eth_queue(bp, i) {  in bnx2x_del_all_napi()
831 		napi_hash_del(&bnx2x_fp(bp, i, napi));  in bnx2x_del_all_napi()
832 		netif_napi_del(&bnx2x_fp(bp, i, napi));  in bnx2x_del_all_napi()
836 int bnx2x_set_int_mode(struct bnx2x *bp);
838 static inline void bnx2x_disable_msi(struct bnx2x *bp)  in bnx2x_disable_msi()  argument
840 	if (bp->flags & USING_MSIX_FLAG) {  in bnx2x_disable_msi()
841 		pci_disable_msix(bp->pdev);  in bnx2x_disable_msi()
842 		bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG);  in bnx2x_disable_msi()
843 	} else if (bp->flags & USING_MSI_FLAG) {  in bnx2x_disable_msi()
844 		pci_disable_msi(bp->pdev);  in bnx2x_disable_msi()
845 		bp->flags &= ~USING_MSI_FLAG;  in bnx2x_disable_msi()
897 static inline int func_by_vn(struct bnx2x *bp, int vn)  in func_by_vn()  argument
899 	return 2 * vn + BP_PORT(bp);  in func_by_vn()
902 static inline int bnx2x_config_rss_eth(struct bnx2x *bp, bool config_hash)  in bnx2x_config_rss_eth()  argument
904 	return bnx2x_rss(bp, &bp->rss_conf_obj, config_hash, true);  in bnx2x_config_rss_eth()
914 static inline int bnx2x_func_start(struct bnx2x *bp)  in bnx2x_func_start()  argument
923 	func_params.f_obj = &bp->func_obj;  in bnx2x_func_start()
927 	start_params->mf_mode = bp->mf_mode;  in bnx2x_func_start()
928 	start_params->sd_vlan_tag = bp->mf_ov;  in bnx2x_func_start()
930 	if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp))  in bnx2x_func_start()
939 	if (IS_MF_UFP(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) {  in bnx2x_func_start()
945 	return bnx2x_func_state_change(bp, &func_params);  in bnx2x_func_start()
967 static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp,  in bnx2x_free_rx_sge_range()  argument
976 		bnx2x_free_rx_sge(bp, fp, i);  in bnx2x_free_rx_sge_range()
1001 	struct bnx2x *bp = fp->bp;  in bnx2x_stats_id()  local
1002 	if (!CHIP_IS_E1x(bp)) {  in bnx2x_stats_id()
1005 			return bp->cnic_base_cl_id + (bp->pf_num >> 1);  in bnx2x_stats_id()
1008 	return fp->cl_id + BP_PORT(bp) * FP_SB_MAX_E1x;  in bnx2x_stats_id()
1014 	struct bnx2x *bp = fp->bp;  in bnx2x_init_vlan_mac_fp_objs()  local
1017 	bnx2x_init_mac_obj(bp, &bnx2x_sp_obj(bp, fp).mac_obj, fp->cl_id,  in bnx2x_init_vlan_mac_fp_objs()
1018 			   fp->cid, BP_FUNC(bp), bnx2x_sp(bp, mac_rdata),  in bnx2x_init_vlan_mac_fp_objs()
1019 			   bnx2x_sp_mapping(bp, mac_rdata),  in bnx2x_init_vlan_mac_fp_objs()
1021 			   &bp->sp_state, obj_type,  in bnx2x_init_vlan_mac_fp_objs()
1022 			   &bp->macs_pool);  in bnx2x_init_vlan_mac_fp_objs()
1033 static inline u8 bnx2x_get_path_func_num(struct bnx2x *bp)  in bnx2x_get_path_func_num()  argument
1038 	if (CHIP_IS_E1(bp))  in bnx2x_get_path_func_num()
1044 	if (CHIP_REV_IS_SLOW(bp)) {  in bnx2x_get_path_func_num()
1045 		if (IS_MF(bp))  in bnx2x_get_path_func_num()
1052 				MF_CFG_RD(bp,  in bnx2x_get_path_func_num()
1053 					  func_mf_config[BP_PORT(bp) + 2 * i].  in bnx2x_get_path_func_num()
1065 static inline void bnx2x_init_bp_objs(struct bnx2x *bp)  in bnx2x_init_bp_objs()  argument
1068 	bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj);  in bnx2x_init_bp_objs()
1071 	bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid,  in bnx2x_init_bp_objs()
1072 			     BP_FUNC(bp), BP_FUNC(bp),  in bnx2x_init_bp_objs()
1073 			     bnx2x_sp(bp, mcast_rdata),  in bnx2x_init_bp_objs()
1074 			     bnx2x_sp_mapping(bp, mcast_rdata),  in bnx2x_init_bp_objs()
1075 			     BNX2X_FILTER_MCAST_PENDING, &bp->sp_state,  in bnx2x_init_bp_objs()
1079 	bnx2x_init_mac_credit_pool(bp, &bp->macs_pool, BP_FUNC(bp),  in bnx2x_init_bp_objs()
1080 				   bnx2x_get_path_func_num(bp));  in bnx2x_init_bp_objs()
1082 	bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool, BP_ABS_FUNC(bp)>>1,  in bnx2x_init_bp_objs()
1083 				    bnx2x_get_path_func_num(bp));  in bnx2x_init_bp_objs()
1086 	bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id,  in bnx2x_init_bp_objs()
1087 				  bp->fp->cid, BP_FUNC(bp), BP_FUNC(bp),  in bnx2x_init_bp_objs()
1088 				  bnx2x_sp(bp, rss_rdata),  in bnx2x_init_bp_objs()
1089 				  bnx2x_sp_mapping(bp, rss_rdata),  in bnx2x_init_bp_objs()
1090 				  BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state,  in bnx2x_init_bp_objs()
1096 	if (CHIP_IS_E1x(fp->bp))  in bnx2x_fp_qzone_id()
1097 		return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H;  in bnx2x_fp_qzone_id()
1102 static inline void bnx2x_init_txdata(struct bnx2x *bp,  in bnx2x_init_txdata()  argument
1111 	txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size;  in bnx2x_init_txdata()
1117 static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx)  in bnx2x_cnic_eth_cl_id()  argument
1119 	return bp->cnic_base_cl_id + cl_idx +  in bnx2x_cnic_eth_cl_id()
1120 		(bp->pf_num >> 1) * BNX2X_MAX_CNIC_ETH_CL_ID_IDX;  in bnx2x_cnic_eth_cl_id()
1123 static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp)  in bnx2x_cnic_fw_sb_id()  argument
1126 	return bp->base_fw_ndsb;  in bnx2x_cnic_fw_sb_id()
1129 static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp)  in bnx2x_cnic_igu_sb_id()  argument
1131 	return bp->igu_base_sb;  in bnx2x_cnic_igu_sb_id()
1134 static inline int bnx2x_clean_tx_queue(struct bnx2x *bp,  in bnx2x_clean_tx_queue()  argument
1158 int bnx2x_get_link_cfg_idx(struct bnx2x *bp);
1160 static inline void __storm_memset_struct(struct bnx2x *bp,  in __storm_memset_struct()  argument
1165 		REG_WR(bp, addr + (i * 4), data[i]);  in __storm_memset_struct()
1174 static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp, unsigned long mask)  in bnx2x_wait_sp_comp()  argument
1180 		netif_addr_lock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1181 		if (!(bp->sp_state & mask)) {  in bnx2x_wait_sp_comp()
1182 			netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1185 		netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1192 	netif_addr_lock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1193 	if (bp->sp_state & mask) {  in bnx2x_wait_sp_comp()
1195 			  bp->sp_state, mask);  in bnx2x_wait_sp_comp()
1196 		netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1199 	netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1211 void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,
1214 void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id,
1216 void bnx2x_acquire_phy_lock(struct bnx2x *bp);
1217 void bnx2x_release_phy_lock(struct bnx2x *bp);
1226 static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg)  in bnx2x_extract_max_cfg()  argument
1257 void bnx2x_get_iscsi_info(struct bnx2x *bp);
1265 static inline void bnx2x_link_sync_notify(struct bnx2x *bp)  in bnx2x_link_sync_notify()  argument
1271 	for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) {  in bnx2x_link_sync_notify()
1272 		if (vn == BP_VN(bp))  in bnx2x_link_sync_notify()
1275 		func = func_by_vn(bp, vn);  in bnx2x_link_sync_notify()
1276 		REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 +  in bnx2x_link_sync_notify()
1289 static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set)  in bnx2x_update_drv_flags()  argument
1291 	if (SHMEM2_HAS(bp, drv_flags)) {  in bnx2x_update_drv_flags()
1293 		bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS);  in bnx2x_update_drv_flags()
1294 		drv_flags = SHMEM2_RD(bp, drv_flags);  in bnx2x_update_drv_flags()
1301 		SHMEM2_WR(bp, drv_flags, drv_flags);  in bnx2x_update_drv_flags()
1303 		bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS);  in bnx2x_update_drv_flags()
1317 void bnx2x_fill_fw_str(struct bnx2x *bp, char *buf, size_t buf_len);
1319 int bnx2x_drain_tx_queues(struct bnx2x *bp);
1320 void bnx2x_squeeze_objects(struct bnx2x *bp);