Lines Matching refs:U64_HI
1659 U64_HI(r->rdata_mapping), in bnx2x_execute_vlan_mac()
2289 U64_HI(p->rdata_mapping), in bnx2x_set_rx_mode_e2()
2994 raw->cid, U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e2()
3478 U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e1()
4103 U64_HI(r->rdata_mapping), in bnx2x_setup_rss()
4377 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_tx_data()
4437 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_rx_data()
4441 cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_init_rx_data()
4445 cpu_to_le32(U64_HI(params->rcq_map)); in bnx2x_q_fill_init_rx_data()
4590 U64_HI(data_mapping), in bnx2x_q_send_setup_e1x()
4617 U64_HI(data_mapping), in bnx2x_q_send_setup_e2()
4660 U64_HI(data_mapping), in bnx2x_q_send_setup_tx_only()
4766 o->cids[cid_index], U64_HI(data_mapping), in bnx2x_q_send_update()
4824 data->sge_page_base_hi = cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_update_tpa_data()
4865 U64_HI(data_mapping), in bnx2x_q_send_update_tpa()
5701 U64_HI(data_mapping), in bnx2x_func_send_start()
5773 U64_HI(data_mapping), in bnx2x_func_send_switch_update()
5811 U64_HI(data_mapping), in bnx2x_func_send_afex_update()
5850 U64_HI(*p_rdata), U64_LO(*p_rdata), in bnx2x_func_send_afex_viflists()
5895 U64_HI(data_mapping), in bnx2x_func_send_tx_start()
5922 cpu_to_le32(U64_HI(set_timesync_params->offset_delta)); in bnx2x_func_send_set_timesync()
5931 U64_HI(data_mapping), in bnx2x_func_send_set_timesync()