14331 	u32 nvcfg1;  in tg3_get_nvram_info()  local
14333 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_nvram_info()
14334 	if (nvcfg1 & NVRAM_CFG1_FLASHIF_ENAB) {  in tg3_get_nvram_info()
14337 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_nvram_info()
14338 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_nvram_info()
14343 		switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {  in tg3_get_nvram_info()
14409 	u32 nvcfg1;  in tg3_get_5752_nvram_info()  local
14411 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5752_nvram_info()
14414 	if (nvcfg1 & (1 << 27))  in tg3_get_5752_nvram_info()
14417 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5752_nvram_info()
14438 		tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5752_nvram_info()
14443 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5752_nvram_info()
14444 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5752_nvram_info()
14450 	u32 nvcfg1, protect = 0;  in tg3_get_5755_nvram_info()  local
14452 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5755_nvram_info()
14455 	if (nvcfg1 & (1 << 27)) {  in tg3_get_5755_nvram_info()
14460 	nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5755_nvram_info()
14461 	switch (nvcfg1) {  in tg3_get_5755_nvram_info()
14470 		if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 ||  in tg3_get_5755_nvram_info()
14471 		    nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5)  in tg3_get_5755_nvram_info()
14474 		else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2)  in tg3_get_5755_nvram_info()
14488 		if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10)  in tg3_get_5755_nvram_info()
14492 		else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20)  in tg3_get_5755_nvram_info()
14506 	u32 nvcfg1;  in tg3_get_5787_nvram_info()  local
14508 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5787_nvram_info()
14510 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5787_nvram_info()
14519 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5787_nvram_info()
14520 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5787_nvram_info()
14544 	u32 nvcfg1, protect = 0;  in tg3_get_5761_nvram_info()  local
14546 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5761_nvram_info()
14549 	if (nvcfg1 & (1 << 27)) {  in tg3_get_5761_nvram_info()
14554 	nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5761_nvram_info()
14555 	switch (nvcfg1) {  in tg3_get_5761_nvram_info()
14588 		switch (nvcfg1) {  in tg3_get_5761_nvram_info()
14626 	u32 nvcfg1;  in tg3_get_57780_nvram_info()  local
14628 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_57780_nvram_info()
14630 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14637 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_57780_nvram_info()
14638 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_57780_nvram_info()
14651 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14674 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_57780_nvram_info()
14691 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_57780_nvram_info()
14699 	u32 nvcfg1;  in tg3_get_5717_nvram_info()  local
14701 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5717_nvram_info()
14703 	switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14710 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5717_nvram_info()
14711 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5717_nvram_info()
14724 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14751 		switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {  in tg3_get_5717_nvram_info()
14770 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5717_nvram_info()
14777 	u32 nvcfg1, nvmpinstrp;  in tg3_get_5720_nvram_info()  local
14779 	nvcfg1 = tr32(NVRAM_CFG1);  in tg3_get_5720_nvram_info()
14780 	nvmpinstrp = nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK;  in tg3_get_5720_nvram_info()
14783 		if (!(nvcfg1 & NVRAM_CFG1_5762VENDOR_MASK)) {  in tg3_get_5720_nvram_info()
14810 		nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;  in tg3_get_5720_nvram_info()
14811 		tw32(NVRAM_CFG1, nvcfg1);  in tg3_get_5720_nvram_info()
14906 	tg3_nvram_get_pagesize(tp, nvcfg1);  in tg3_get_5720_nvram_info()