Lines Matching refs:tg3_asic_rev
630 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_write_mem()
655 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_read_mem()
683 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock_init()
719 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock()
738 if (tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_ape_lock()
779 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
798 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
1492 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_start()
1601 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_init()
1822 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_poll_fw()
2023 tg3_asic_rev(tp) != ASIC_REV_5785) in tg3_adjust_link()
2050 if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_adjust_link()
2240 if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable) in tg3_phy_toggle_apd()
2430 (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_phy_eee_enable()
2431 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_eee_enable()
2637 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2652 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_phy_reset()
2653 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_phy_reset()
2654 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_phy_reset()
2662 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_phy_reset()
2760 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2793 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2794 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2803 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2804 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2817 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_pwrsrc_switch_to_vmain()
2818 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_pwrsrc_switch_to_vmain()
2819 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_pwrsrc_switch_to_vmain()
2842 tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_die_with_vmain()
2843 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_pwrsrc_die_with_vmain()
2866 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_switch_to_vaux()
2867 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_pwrsrc_switch_to_vaux()
2899 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_pwrsrc_switch_to_vaux()
2971 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_frob_aux_power()
2972 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_frob_aux_power()
2973 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_frob_aux_power()
3022 switch (tg3_asic_rev(tp)) { in tg3_phy_power_bug()
3047 switch (tg3_asic_rev(tp)) { in tg3_phy_led_bug()
3067 if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_power_down_phy()
3079 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_phy()
3506 if (tg3_asic_rev(tp) != ASIC_REV_5752 && in tg3_nvram_write_block_buffered()
3640 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_halt_cpu()
3714 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3719 if (tg3_asic_rev(tp) != ASIC_REV_57766) { in tg3_load_firmware_cpu()
3919 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_load_tso_firmware()
3980 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in __tg3_set_mac_addr()
3981 tg3_asic_rev(tp) == ASIC_REV_5704) { in __tg3_set_mac_addr()
4098 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4146 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_power_down_prepare()
4179 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4180 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_power_down_prepare()
4191 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4196 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4197 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4219 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4220 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4372 switch (tg3_asic_rev(tp)) { in tg3_phy_autoneg_cfg()
4450 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_phy_copper_begin()
4751 if (tg3_asic_rev(tp) != ASIC_REV_5717) in tg3_setup_eee()
4790 if ((tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_setup_copper_phy()
4791 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_setup_copper_phy()
4792 tg3_asic_rev(tp) == ASIC_REV_5705) && in tg3_setup_copper_phy()
4852 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_setup_copper_phy()
4853 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_setup_copper_phy()
5020 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_setup_copper_phy()
5051 if (tg3_asic_rev(tp) == ASIC_REV_5700 && in tg3_setup_copper_phy()
5814 if ((tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_setup_fiber_mii_phy()
5815 tg3_asic_rev(tp) == ASIC_REV_5720) && in tg3_setup_fiber_mii_phy()
5866 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
5935 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
6089 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_setup_phy()
6090 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_setup_phy()
7649 if (tg3_asic_rev(tp) == ASIC_REV_5762 && mss) { in tg3_4g_tso_overflow_test()
7792 if (tg3_asic_rev(tp) != ASIC_REV_5701) in tigon3_dma_hwbug_workaround()
7990 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_start_xmit()
8171 tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_mac_loopback()
8230 tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_phy_lpbk_set()
8254 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_phy_lpbk_set()
8997 switch (tg3_asic_rev(tp)) { in tg3_override_clk()
9018 switch (tg3_asic_rev(tp)) { in tg3_restore_clk()
9063 if (tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_chip_reset()
9102 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_chip_reset()
9112 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9124 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_chip_reset()
9243 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_chip_reset()
9268 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9491 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_tx_rcbs_disable()
9533 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_rx_ret_rcbs_disable()
9534 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_rx_ret_rcbs_disable()
9644 tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_setup_rxbd_thresholds()
9645 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_setup_rxbd_thresholds()
9648 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_setup_rxbd_thresholds()
9649 tg3_asic_rev(tp) == ASIC_REV_5787) in tg3_setup_rxbd_thresholds()
9827 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_lso_rd_dma_workaround_bit()
9890 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_reset_hw()
10015 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_reset_hw()
10016 tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_reset_hw()
10019 } else if (tg3_asic_rev(tp) != ASIC_REV_5784 && in tg3_reset_hw()
10020 tg3_asic_rev(tp) != ASIC_REV_5761) { in tg3_reset_hw()
10060 } else if (tg3_asic_rev(tp) != ASIC_REV_5705) { in tg3_reset_hw()
10062 if (tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_reset_hw()
10100 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_reset_hw()
10102 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_reset_hw()
10103 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_reset_hw()
10170 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10212 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10213 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10233 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_reset_hw()
10236 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10237 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10238 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10243 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10246 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_reset_hw()
10257 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10271 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10272 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10275 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10276 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10279 if (tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_reset_hw()
10280 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10281 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10282 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_reset_hw()
10286 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10293 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10304 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10305 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10306 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10309 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10392 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_reset_hw()
10410 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_reset_hw()
10414 if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_reset_hw()
10449 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10465 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_reset_hw()
10476 if (tg3_asic_rev(tp) == ASIC_REV_5703) { in tg3_reset_hw()
10479 } else if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_reset_hw()
10490 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10491 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_reset_hw()
10508 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_reset_hw()
10537 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10553 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_reset_hw()
10556 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10557 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10581 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10606 if ((tg3_asic_rev(tp) == ASIC_REV_5704) && in tg3_reset_hw()
10628 if (tg3_asic_rev(tp) == ASIC_REV_5704 && in tg3_reset_hw()
10635 tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_reset_hw()
10883 if (tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_periodic_fetch_stats()
10884 tg3_asic_rev(tp) != ASIC_REV_5762 && in tg3_periodic_fetch_stats()
10936 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_timer()
11069 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_timer_init()
11667 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_open()
11745 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_calc_crc_errors()
11746 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_calc_crc_errors()
13321 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_test_memory()
13325 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_test_memory()
13437 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_run_loopback()
13623 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_test_loopback()
14228 if (tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_change_mtu()
14341 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_nvram_info()
14782 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
14849 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14896 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
14910 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
14945 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_nvram_init()
14946 tg3_asic_rev(tp) != ASIC_REV_5701) { in tg3_nvram_init()
14959 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_nvram_init()
14961 else if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_nvram_init()
14963 else if (tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_nvram_init()
14964 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_nvram_init()
14965 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_nvram_init()
14967 else if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_nvram_init()
14969 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_nvram_init()
14971 else if (tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_nvram_init()
14974 else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_nvram_init()
14975 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_nvram_init()
14977 else if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_nvram_init()
14978 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_nvram_init()
15091 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_eeprom_hw_cfg()
15119 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_eeprom_hw_cfg()
15120 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_eeprom_hw_cfg()
15121 tg3_asic_rev(tp) != ASIC_REV_5703 && in tg3_get_eeprom_hw_cfg()
15125 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_get_eeprom_hw_cfg()
15128 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_eeprom_hw_cfg()
15129 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_eeprom_hw_cfg()
15130 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_eeprom_hw_cfg()
15178 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15179 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_get_eeprom_hw_cfg()
15192 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_eeprom_hw_cfg()
15211 if ((tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15212 tg3_asic_rev(tp) == ASIC_REV_5701) && in tg3_get_eeprom_hw_cfg()
15260 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_eeprom_hw_cfg()
15269 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_eeprom_hw_cfg()
15504 (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_probe()
15505 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_phy_probe()
15506 tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_phy_probe()
15507 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_phy_probe()
15508 (tg3_asic_rev(tp) == ASIC_REV_5717 && in tg3_phy_probe()
15510 (tg3_asic_rev(tp) == ASIC_REV_57765 && in tg3_phy_probe()
15634 if (tg3_asic_rev(tp) == ASIC_REV_5717) { in tg3_read_vpd()
15642 } else if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_read_vpd()
15653 } else if (tg3_asic_rev(tp) == ASIC_REV_57765) { in tg3_read_vpd()
15668 } else if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_read_vpd()
15679 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_read_vpd()
15920 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_read_otp_ver()
16026 if (tg3_asic_rev(tp) == ASIC_REV_USE_PROD_ID_REG) { in tg3_detect_asic_rev()
16072 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_detect_asic_rev()
16073 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_detect_asic_rev()
16074 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_detect_asic_rev()
16077 if (tg3_asic_rev(tp) == ASIC_REV_57765 || in tg3_detect_asic_rev()
16078 tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_detect_asic_rev()
16082 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_detect_asic_rev()
16086 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_detect_asic_rev()
16087 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_detect_asic_rev()
16088 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_detect_asic_rev()
16089 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_detect_asic_rev()
16090 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_detect_asic_rev()
16091 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_detect_asic_rev()
16095 if (tg3_asic_rev(tp) == ASIC_REV_5780 || in tg3_detect_asic_rev()
16096 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_detect_asic_rev()
16099 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_detect_asic_rev()
16100 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_detect_asic_rev()
16101 tg3_asic_rev(tp) == ASIC_REV_5906 || in tg3_detect_asic_rev()
16106 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_detect_asic_rev()
16116 if ((tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_10_100_only_device()
16122 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_10_100_only_device()
16224 if (tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_get_invariants()
16284 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16285 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_get_invariants()
16294 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16299 if (tg3_asic_rev(tp) == ASIC_REV_5750 && in tg3_get_invariants()
16302 } else if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_invariants()
16303 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_invariants()
16307 if (tg3_asic_rev(tp) == ASIC_REV_5705) in tg3_get_invariants()
16332 if (tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_get_invariants()
16341 (tg3_asic_rev(tp) == ASIC_REV_5714 && in tg3_get_invariants()
16347 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16363 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16364 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_invariants()
16369 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16372 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_get_invariants()
16375 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16376 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16377 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16378 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16400 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16404 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16405 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_get_invariants()
16412 } else if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_get_invariants()
16445 if (tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_get_invariants()
16514 else if (tg3_asic_rev(tp) == ASIC_REV_5701 || in tg3_get_invariants()
16548 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16557 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16558 tg3_asic_rev(tp) == ASIC_REV_5701))) in tg3_get_invariants()
16570 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16578 } else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16579 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16580 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_get_invariants()
16585 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_get_invariants()
16632 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16639 else if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_get_invariants()
16642 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16643 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_get_invariants()
16657 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16671 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16680 if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16684 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16685 (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16700 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_invariants()
16701 tg3_asic_rev(tp) != ASIC_REV_57780 && in tg3_get_invariants()
16703 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16704 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_get_invariants()
16705 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16706 tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_get_invariants()
16716 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_invariants()
16734 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16735 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_get_invariants()
16742 if (tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_get_invariants()
16743 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_get_invariants()
16752 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16753 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16800 if (tg3_asic_rev(tp) == ASIC_REV_57766 && in tg3_get_invariants()
16807 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16813 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_get_invariants()
16846 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16856 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16866 tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16883 if (tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16900 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_invariants()
16901 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_get_invariants()
16902 tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_get_invariants()
16957 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_device_address()
16970 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_device_address()
17038 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_calc_dma_bndry()
17039 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_calc_dma_bndry()
17277 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_test_dma()
17278 tg3_asic_rev(tp) == ASIC_REV_5750) in tg3_test_dma()
17283 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17284 tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_test_dma()
17293 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17298 if (tg3_asic_rev(tp) == ASIC_REV_5703) in tg3_test_dma()
17305 } else if (tg3_asic_rev(tp) == ASIC_REV_5780) { in tg3_test_dma()
17308 } else if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_test_dma()
17318 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17319 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17322 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_test_dma()
17323 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_test_dma()
17343 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_test_dma()
17344 tg3_asic_rev(tp) != ASIC_REV_5701) in tg3_test_dma()
17449 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_init_bufmgr_config()
17779 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_init_one()
17780 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_init_one()
17782 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_init_one()
17783 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_init_one()
17796 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_init_one()
17885 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_init_one()
17886 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_init_one()
17887 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_init_one()