Lines Matching refs:tg3_flag
88 #define tg3_flag(tp, flag) \ macro
129 (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500)
136 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
140 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
211 #define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3)
212 #define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1)
568 if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) in _tw32_flush()
588 if (tg3_flag(tp, FLUSH_POSTED_WRITES) || in tw32_mailbox_flush()
589 (!tg3_flag(tp, MBOX_WRITE_REORDER) && in tw32_mailbox_flush()
590 !tg3_flag(tp, ICH_WORKAROUND))) in tw32_mailbox_flush()
598 if (tg3_flag(tp, TXD_MBOX_HWBUG)) in tg3_write32_tx_mbox()
600 if (tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_write32_tx_mbox()
601 tg3_flag(tp, FLUSH_POSTED_WRITES)) in tg3_write32_tx_mbox()
635 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_write_mem()
662 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_read_mem()
714 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_lock()
774 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_unlock()
849 if (!tg3_flag(tp, APE_HAS_NCSI)) in tg3_ape_scratchpad_read()
939 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_driver_state_change()
968 tg3_flag(tp, WOL_ENABLE)) { in tg3_ape_driver_state_change()
1013 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_enable_ints()
1020 if (!tg3_flag(tp, TAGGED_STATUS) && in tg3_enable_ints()
1036 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_has_work()
1069 if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) in tg3_int_reenable()
1079 if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) in tg3_switch_clocks()
1090 if (tg3_flag(tp, 5705_PLUS)) { in tg3_switch_clocks()
1440 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_config_5785()
1453 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1454 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1456 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1471 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1472 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1477 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1491 if (tg3_flag(tp, MDIOBUS_INITED) && in tg3_mdio_start()
1502 if (tg3_flag(tp, 5717_PLUS)) { in tg3_mdio_init()
1514 } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { in tg3_mdio_init()
1526 if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) in tg3_mdio_init()
1581 if (tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_init()
1583 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_init()
1585 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_init()
1609 if (tg3_flag(tp, MDIOBUS_INITED)) { in tg3_mdio_fini()
1700 if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) in tg3_ump_link_report()
1720 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_stop_fw()
1739 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_pre_reset()
1765 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_post_reset()
1786 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_write_sig_legacy()
1814 if (tg3_flag(tp, NO_FWARE_REPORTED)) in tg3_poll_fw()
1817 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_poll_fw()
1841 if (!tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1857 if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1970 if (tg3_flag(tp, USE_PHYLIB)) in tg3_setup_flow_control()
1975 if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_setup_flow_control()
2226 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_apd()
2227 (tg3_flag(tp, 5717_PLUS) && in tg3_phy_toggle_apd()
2257 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_automdix()
2432 tg3_flag(tp, 57765_CLASS)) && in tg3_phy_eee_enable()
2624 if (tg3_flag(tp, ENABLE_ASF)) in tg3_warn_mgmt_link_flap()
2692 if (tg3_flag(tp, 5717_PLUS) && in tg3_phy_reset()
2742 } else if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2754 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2814 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vmain()
2841 if (!tg3_flag(tp, IS_NIC) || in tg3_pwrsrc_die_with_vmain()
2863 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vaux()
2946 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) in tg3_frob_aux_power_5717()
2968 if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) in tg3_frob_aux_power()
2975 tg3_flag(tp, WOL_ENABLE) != 0 : 0); in tg3_frob_aux_power()
2988 if (tg3_flag(tp_peer, INIT_COMPLETE)) in tg3_frob_aux_power()
2991 if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || in tg3_frob_aux_power()
2992 tg3_flag(tp_peer, ENABLE_ASF)) in tg3_frob_aux_power()
2997 if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || in tg3_frob_aux_power()
2998 tg3_flag(tp, ENABLE_ASF)) in tg3_frob_aux_power()
3136 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_lock()
3159 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_unlock()
3170 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_enable_nvram_access()
3180 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_disable_nvram_access()
3250 if (tg3_flag(tp, NVRAM) && in tg3_nvram_phys_addr()
3251 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_phys_addr()
3252 tg3_flag(tp, FLASH) && in tg3_nvram_phys_addr()
3253 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_phys_addr()
3265 if (tg3_flag(tp, NVRAM) && in tg3_nvram_logical_addr()
3266 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_logical_addr()
3267 tg3_flag(tp, FLASH) && in tg3_nvram_logical_addr()
3268 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_logical_addr()
3288 if (!tg3_flag(tp, NVRAM)) in tg3_nvram_read()
3502 !tg3_flag(tp, FLASH) || in tg3_nvram_write_block_buffered()
3503 !tg3_flag(tp, 57765_PLUS)) in tg3_nvram_write_block_buffered()
3507 !tg3_flag(tp, 5755_PLUS) && in tg3_nvram_write_block_buffered()
3517 if (!tg3_flag(tp, FLASH)) { in tg3_nvram_write_block_buffered()
3534 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3540 if (!tg3_flag(tp, NVRAM)) { in tg3_nvram_write_block()
3550 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) in tg3_nvram_write_block()
3556 if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { in tg3_nvram_write_block()
3571 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3638 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3653 if (tg3_flag(tp, IS_SSB_CORE)) in tg3_halt_cpu()
3666 if (tg3_flag(tp, NVRAM)) in tg3_halt_cpu()
3707 if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { in tg3_load_firmware_cpu()
3714 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3863 if (!tg3_flag(tp, NO_NVRAM)) in tg3_load_57766_firmware()
3906 if (!tg3_flag(tp, FW_TSO)) in tg3_load_tso_firmware()
4033 if (tg3_flag(tp, CLKREQ_BUG)) in tg3_power_down_prepare()
4042 tg3_flag(tp, WOL_ENABLE); in tg3_power_down_prepare()
4044 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_power_down_prepare()
4065 if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { in tg3_power_down_prepare()
4066 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_power_down_prepare()
4103 } else if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4114 if (tg3_flag(tp, WOL_CAP)) in tg3_power_down_prepare()
4147 u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? in tg3_power_down_prepare()
4158 if (!tg3_flag(tp, 5750_PLUS)) in tg3_power_down_prepare()
4162 if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && in tg3_power_down_prepare()
4163 (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) in tg3_power_down_prepare()
4166 if (tg3_flag(tp, ENABLE_APE)) in tg3_power_down_prepare()
4178 if (!tg3_flag(tp, WOL_SPEED_100MB) && in tg3_power_down_prepare()
4189 } else if (tg3_flag(tp, 5780_CLASS) || in tg3_power_down_prepare()
4190 tg3_flag(tp, CPMU_PRESENT) || in tg3_power_down_prepare()
4193 } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { in tg3_power_down_prepare()
4202 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4216 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4233 if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) in tg3_power_down_prepare()
4239 if ((!tg3_flag(tp, IS_SSB_CORE)) && in tg3_power_down_prepare()
4246 if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4265 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); in tg3_power_down()
4410 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_phy_copper_begin()
4754 if (tg3_flag(tp, ENABLE_APE)) in tg3_setup_eee()
4805 !tg3_flag(tp, INIT_COMPLETE)) in tg3_setup_copper_phy()
4969 if (tg3_flag(tp, ROBOSWITCH)) { in tg3_setup_copper_phy()
4999 if (tg3_flag(tp, RGMII_MODE)) { in tg3_setup_copper_phy()
5043 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_setup_copper_phy()
5054 (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
5066 if (tg3_flag(tp, CLKREQ_BUG)) { in tg3_setup_copper_phy()
5448 if (tg3_flag(tp, INIT_COMPLETE) && in tg3_init_bcm8002()
5715 if (!tg3_flag(tp, HW_AUTONEG) && in tg3_setup_fiber_phy()
5717 tg3_flag(tp, INIT_COMPLETE)) { in tg3_setup_fiber_phy()
5749 if (tg3_flag(tp, HW_AUTONEG)) in tg3_setup_fiber_phy()
5971 } else if (!tg3_flag(tp, 5780_CLASS)) { in tg3_setup_fiber_mii_phy()
6103 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_setup_phy()
6112 if (tg3_flag(tp, ASPM_WORKAROUND)) { in tg3_setup_phy()
6153 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_get_ts_info()
6337 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_init()
6349 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_resume()
6358 if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) in tg3_ptp_fini()
6402 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_dump_legacy_regs()
6414 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_dump_legacy_regs()
6426 if (tg3_flag(tp, NVRAM)) in tg3_dump_legacy_regs()
6439 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_dump_state()
6494 BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_tx_recover()
6527 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx()
6962 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_rx()
7000 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_poll_link()
7007 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_poll_link()
7154 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_work()
7168 if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { in tg3_poll_work()
7221 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_msix()
7276 if (tg3_flag(tp, ERROR_PROCESSED)) in tg3_process_error()
7320 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll()
7326 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_poll()
7506 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt()
7555 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt_tagged()
7662 if (tg3_flag(tp, 40BIT_DMA_BUG)) in tg3_40bit_overflow_test()
7687 if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) in tg3_tx_frag_set()
7907 if (tg3_flag(tp, ENABLE_TSS)) in tg3_start_xmit()
7955 tg3_flag(tp, TSO_BUG)) { in tg3_start_xmit()
7972 if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
7973 tg3_flag(tp, HW_TSO_2) || in tg3_start_xmit()
7974 tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
7982 if (tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
7987 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_start_xmit()
7989 else if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
8018 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_start_xmit()
8028 tg3_flag(tp, TX_TSTAMP_EN)) { in tg3_start_xmit()
8045 if (tg3_flag(tp, 5701_DMA_BUG)) in tg3_start_xmit()
8055 if (!tg3_flag(tp, HW_TSO_1) && in tg3_start_xmit()
8056 !tg3_flag(tp, HW_TSO_2) && in tg3_start_xmit()
8057 !tg3_flag(tp, HW_TSO_3)) in tg3_start_xmit()
8159 if (!tg3_flag(tp, 5705_PLUS)) in tg3_mac_loopback()
8169 if (tg3_flag(tp, 5705_PLUS) || in tg3_mac_loopback()
8241 tg3_flag(tp, 5780_CLASS)) { in tg3_phy_lpbk_set()
8303 if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) in tg3_fix_features()
8330 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_rx_prodring_free()
8346 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_free()
8383 if (tg3_flag(tp, 5780_CLASS) && in tg3_rx_prodring_alloc()
8419 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_rx_prodring_alloc()
8424 if (!tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_rx_prodring_alloc()
8496 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_init()
8619 if (tg3_flag(tp, ENABLE_TSS)) in tg3_mem_tx_acquire()
8672 if (tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8685 if (!i && tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8759 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_alloc_consistent()
8808 if (tg3_flag(tp, 5705_PLUS)) { in tg3_stop_block()
8944 tg3_flag(tp, PCIX_MODE)) in tg3_restore_pci_state()
8947 if (tg3_flag(tp, ENABLE_APE)) in tg3_restore_pci_state()
8955 if (!tg3_flag(tp, PCI_EXPRESS)) { in tg3_restore_pci_state()
8963 if (tg3_flag(tp, PCIX_MODE)) { in tg3_restore_pci_state()
8973 if (tg3_flag(tp, 5780_CLASS)) { in tg3_restore_pci_state()
8978 if (tg3_flag(tp, USING_MSI)) { in tg3_restore_pci_state()
9064 tg3_flag(tp, 5755_PLUS)) in tg3_chip_reset()
9110 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_chip_reset()
9113 !tg3_flag(tp, 57765_PLUS) && in tg3_chip_reset()
9138 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9171 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { in tg3_chip_reset()
9193 if (!tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9211 if (tg3_flag(tp, 5780_CLASS)) in tg3_chip_reset()
9220 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_chip_reset()
9266 if (tg3_flag(tp, PCI_EXPRESS) && in tg3_chip_reset()
9269 !tg3_flag(tp, 57765_PLUS)) { in tg3_chip_reset()
9291 if (tg3_flag(tp, 5750_PLUS)) in tg3_chip_reset()
9353 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_set_mac_addr()
9389 if (!tg3_flag(tp, 5705_PLUS)) in tg3_set_bdinfo()
9400 if (!tg3_flag(tp, ENABLE_TSS)) { in tg3_coal_tx_init()
9433 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_coal_rx_init()
9467 if (!tg3_flag(tp, 5705_PLUS)) { in __tg3_set_coalesce()
9486 if (!tg3_flag(tp, 5705_PLUS)) in tg3_tx_rcbs_disable()
9488 else if (tg3_flag(tp, 5717_PLUS)) in tg3_tx_rcbs_disable()
9490 else if (tg3_flag(tp, 57765_CLASS) || in tg3_tx_rcbs_disable()
9508 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx_rcbs_init()
9529 if (tg3_flag(tp, 5717_PLUS)) in tg3_rx_ret_rcbs_disable()
9531 else if (!tg3_flag(tp, 5705_PLUS)) in tg3_rx_ret_rcbs_disable()
9535 tg3_flag(tp, 57765_CLASS)) in tg3_rx_ret_rcbs_disable()
9552 if (tg3_flag(tp, ENABLE_RSS)) in tg3_rx_ret_rcbs_init()
9585 if (tg3_flag(tp, SUPPORT_MSIX)) { in tg3_rings_reset()
9589 if (tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9597 if (!tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9607 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_rings_reset()
9642 if (!tg3_flag(tp, 5750_PLUS) || in tg3_setup_rxbd_thresholds()
9643 tg3_flag(tp, 5780_CLASS) || in tg3_setup_rxbd_thresholds()
9646 tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9660 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9663 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_setup_rxbd_thresholds()
9673 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9722 if (!tg3_flag(tp, ENABLE_ASF)) in __tg3_set_rx_mode()
9790 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_rss_check_indir_tbl()
9846 if (tg3_flag(tp, INIT_COMPLETE)) in tg3_reset_hw()
9905 if (tg3_flag(tp, L1PLLPD_EN)) { in tg3_reset_hw()
9919 if (tg3_flag(tp, 57765_CLASS)) { in tg3_reset_hw()
9969 if (!tg3_flag(tp, CPMU_PRESENT)) { in tg3_reset_hw()
9970 if (!tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
9976 tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
9982 if (tg3_flag(tp, ENABLE_APE)) { in tg3_reset_hw()
10009 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10014 if (!tg3_flag(tp, 57765_CLASS) && in tg3_reset_hw()
10046 if (tg3_flag(tp, PTP_CAPABLE)) in tg3_reset_hw()
10058 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10068 } else if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10144 if (!tg3_flag(tp, 5717_PLUS)) in tg3_reset_hw()
10149 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10157 (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { in tg3_reset_hw()
10159 if (tg3_flag(tp, JUMBO_RING_ENABLE)) { in tg3_reset_hw()
10168 if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || in tg3_reset_hw()
10169 tg3_flag(tp, 57765_CLASS) || in tg3_reset_hw()
10178 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10193 tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; in tg3_reset_hw()
10245 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10249 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10254 if (tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10265 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10266 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10267 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10270 if (tg3_flag(tp, 57765_PLUS) || in tg3_reset_hw()
10283 tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10321 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10326 tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10349 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10375 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10388 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10390 if (!tg3_flag(tp, 5705_PLUS) && in tg3_reset_hw()
10403 if (!tg3_flag(tp, IS_NIC)) { in tg3_reset_hw()
10421 if (tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_reset_hw()
10428 if (tg3_flag(tp, USING_MSIX)) { in tg3_reset_hw()
10433 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_reset_hw()
10438 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10451 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10456 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10462 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10471 if (tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10505 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10517 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_reset_hw()
10521 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10522 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10523 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10526 if (tg3_flag(tp, ENABLE_TSS)) in tg3_reset_hw()
10544 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10552 if (tg3_flag(tp, 5755_PLUS) || in tg3_reset_hw()
10566 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_reset_hw()
10578 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10584 if (tg3_flag(tp, ENABLE_RSS)) in tg3_reset_hw()
10622 if (tg3_flag(tp, 57765_CLASS)) in tg3_reset_hw()
10645 if (!tg3_flag(tp, USE_PHYLIB)) { in tg3_reset_hw()
10674 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) in tg3_reset_hw()
10678 if (tg3_flag(tp, ENABLE_ASF)) in tg3_reset_hw()
10716 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10856 if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && in tg3_periodic_fetch_stats()
10931 if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) { in tg3_timer()
10937 tg3_flag(tp, 57765_CLASS)) in tg3_timer()
10940 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_timer()
10945 if (!tg3_flag(tp, TAGGED_STATUS)) { in tg3_timer()
10967 if (tg3_flag(tp, 5705_PLUS)) in tg3_timer()
10973 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_timer()
10988 } else if (tg3_flag(tp, POLL_SERDES)) { in tg3_timer()
11013 tg3_flag(tp, 5780_CLASS)) { in tg3_timer()
11015 } else if (tg3_flag(tp, POLL_CPMU_LINK)) { in tg3_timer()
11045 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_timer()
11068 if (tg3_flag(tp, TAGGED_STATUS) && in tg3_timer_init()
11070 !tg3_flag(tp, 57765_CLASS)) in tg3_timer_init()
11147 if (tg3_flag(tp, TX_RECOVERY_PENDING)) { in tg3_reset_task()
11197 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_request_irq()
11199 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_request_irq()
11204 if (tg3_flag(tp, TAGGED_STATUS)) in tg3_request_irq()
11230 if (tg3_flag(tp, 57765_PLUS)) { in tg3_test_interrupt()
11258 if (tg3_flag(tp, 57765_PLUS) && in tg3_test_interrupt()
11276 if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { in tg3_test_interrupt()
11294 if (!tg3_flag(tp, USING_MSI)) in tg3_test_msi()
11455 if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && in tg3_ints_init()
11456 !tg3_flag(tp, TAGGED_STATUS)) { in tg3_ints_init()
11465 if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) in tg3_ints_init()
11467 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) in tg3_ints_init()
11470 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11472 if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) in tg3_ints_init()
11474 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_ints_init()
11479 if (!tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11494 if (tg3_flag(tp, USING_MSIX)) in tg3_ints_fini()
11496 else if (tg3_flag(tp, USING_MSI)) in tg3_ints_fini()
11557 if (test_irq && tg3_flag(tp, USING_MSI)) { in tg3_start()
11569 if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { in tg3_start()
11681 } else if (!tg3_flag(tp, TSO_CAPABLE)) { in tg3_open()
11945 if (tg3_flag(tp, NO_NVRAM)) in tg3_get_eeprom()
11955 if (tg3_flag(tp, CPMU_PRESENT)) { in tg3_get_eeprom()
12036 if (tg3_flag(tp, NO_NVRAM) || in tg3_set_eeprom()
12088 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_get_settings()
12115 if (tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_get_settings()
12155 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_settings()
12255 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12260 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12273 !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) in tg3_set_wol()
12311 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_nway_reset()
12339 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12347 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12364 (tg3_flag(tp, TSO_BUG) && in tg3_set_ringparam()
12378 if (tg3_flag(tp, MAX_RXPEND_64) && in tg3_set_ringparam()
12382 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_set_ringparam()
12407 epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); in tg3_get_pauseparam()
12428 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_pauseparam()
12544 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxnfc()
12573 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxfh_indir_size()
12614 if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) in tg3_set_rxfh()
12657 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_set_channels()
12747 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) in tg3_vpd_readblock()
12832 if (tg3_flag(tp, NO_NVRAM)) in tg3_test_nvram()
13182 if (tg3_flag(tp, 5705_PLUS)) { in tg3_test_registers()
13184 if (tg3_flag(tp, 5750_PLUS)) in tg3_test_registers()
13195 if (tg3_flag(tp, IS_5788) && in tg3_test_registers()
13318 if (tg3_flag(tp, 5717_PLUS)) in tg3_test_memory()
13320 else if (tg3_flag(tp, 57765_CLASS) || in tg3_test_memory()
13323 else if (tg3_flag(tp, 5755_PLUS)) in tg3_test_memory()
13327 else if (tg3_flag(tp, 5705_PLUS)) in tg3_test_memory()
13380 if (tg3_flag(tp, ENABLE_RSS)) in tg3_run_loopback()
13382 if (tg3_flag(tp, ENABLE_TSS)) in tg3_run_loopback()
13419 if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13420 tg3_flag(tp, HW_TSO_2) || in tg3_run_loopback()
13421 tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13429 if (tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13434 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_run_loopback()
13436 else if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13448 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_run_loopback()
13609 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_test_loopback()
13624 !tg3_flag(tp, CPMU_PRESENT)) { in tg3_test_loopback()
13630 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13638 !tg3_flag(tp, USE_PHYLIB)) { in tg3_test_loopback()
13652 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13655 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13671 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13675 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13733 if (!tg3_flag(tp, 5705_PLUS)) in tg3_self_test()
13789 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_set()
13876 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_get()
13880 stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? in tg3_hwtstamp_get()
13938 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_ioctl()
14011 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_set_coalesce()
14183 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14190 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14300 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) in tg3_get_nvram_size()
14342 tg3_flag(tp, 5780_CLASS)) { in tg3_get_nvram_info()
14437 if (tg3_flag(tp, FLASH)) { in tg3_get_5752_nvram_info()
14925 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_nvram_init()
14972 tg3_flag(tp, 57765_CLASS)) in tg3_nvram_init()
15150 if (!tg3_flag(tp, 5705_PLUS)) in tg3_get_eeprom_hw_cfg()
15156 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15191 if (tg3_flag(tp, 5717_PLUS) || in tg3_get_eeprom_hw_cfg()
15233 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15238 tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15245 if (tg3_flag(tp, WOL_CAP) && in tg3_get_eeprom_hw_cfg()
15259 if ((tg3_flag(tp, 57765_PLUS) || in tg3_get_eeprom_hw_cfg()
15265 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_get_eeprom_hw_cfg()
15270 !tg3_flag(tp, 57765_PLUS) && in tg3_get_eeprom_hw_cfg()
15290 if (tg3_flag(tp, WOL_CAP)) in tg3_get_eeprom_hw_cfg()
15292 tg3_flag(tp, WOL_ENABLE)); in tg3_get_eeprom_hw_cfg()
15418 if (tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15435 if (!tg3_flag(tp, ENABLE_ASF) && in tg3_phy_probe()
15441 if (tg3_flag(tp, USE_PHYLIB)) in tg3_phy_probe()
15448 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15486 } else if (!tg3_flag(tp, IS_SSB_CORE)) { in tg3_phy_probe()
15527 !tg3_flag(tp, ENABLE_APE) && in tg3_phy_probe()
15528 !tg3_flag(tp, ENABLE_ASF)) { in tg3_phy_probe()
15841 if (!tg3_flag(tp, 5705_PLUS)) in tg3_read_mgmtfw_ver()
15899 if (tg3_flag(tp, APE_HAS_NCSI)) in tg3_read_dash_ver()
15949 if (tg3_flag(tp, NO_NVRAM)) { in tg3_read_fw_ver()
15965 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_read_fw_ver()
15966 if (tg3_flag(tp, ENABLE_APE)) { in tg3_read_fw_ver()
15980 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_rx_ret_ring_size()
15982 else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) in tg3_rx_ret_ring_size()
16081 if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || in tg3_detect_asic_rev()
16092 tg3_flag(tp, 57765_PLUS)) in tg3_detect_asic_rev()
16102 tg3_flag(tp, 5755_PLUS) || in tg3_detect_asic_rev()
16103 tg3_flag(tp, 5780_CLASS)) in tg3_detect_asic_rev()
16107 tg3_flag(tp, 5750_PLUS)) in tg3_detect_asic_rev()
16262 if (tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16291 else if (tg3_flag(tp, 57765_PLUS)) in tg3_get_invariants()
16293 else if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16296 else if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16314 if (tg3_flag(tp, HW_TSO_1) || in tg3_get_invariants()
16315 tg3_flag(tp, HW_TSO_2) || in tg3_get_invariants()
16316 tg3_flag(tp, HW_TSO_3) || in tg3_get_invariants()
16317 tg3_flag(tp, FW_TSO)) { in tg3_get_invariants()
16337 if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16346 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16351 if (tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16368 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16381 if (tg3_flag(tp, 57765_PLUS) && in tg3_get_invariants()
16385 if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16386 tg3_flag(tp, 5780_CLASS) || in tg3_get_invariants()
16387 tg3_flag(tp, USE_JUMBO_BDFLAG)) in tg3_get_invariants()
16418 } else if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16419 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16438 !tg3_flag(tp, PCI_EXPRESS)) in tg3_get_invariants()
16466 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16512 if (tg3_flag(tp, PCIX_TARGET_HWBUG)) in tg3_get_invariants()
16515 (tg3_flag(tp, PCI_EXPRESS) && in tg3_get_invariants()
16527 if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { in tg3_get_invariants()
16529 if (tg3_flag(tp, MBOX_WRITE_REORDER)) in tg3_get_invariants()
16533 if (tg3_flag(tp, ICH_WORKAROUND)) { in tg3_get_invariants()
16556 (tg3_flag(tp, PCIX_MODE) && in tg3_get_invariants()
16571 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16572 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16592 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_get_invariants()
16607 if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { in tg3_get_invariants()
16613 if (tg3_flag(tp, ENABLE_APE)) { in tg3_get_invariants()
16633 tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_get_invariants()
16644 tg3_flag(tp, 57765_CLASS)) in tg3_get_invariants()
16651 if (tg3_flag(tp, IS_NIC)) in tg3_get_invariants()
16667 if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) in tg3_get_invariants()
16698 if (tg3_flag(tp, 5705_PLUS) && in tg3_get_invariants()
16702 !tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16723 if (tg3_flag(tp, CPMU_PRESENT)) in tg3_get_invariants()
16775 !tg3_flag(tp, PCIX_TARGET_HWBUG)) { in tg3_get_invariants()
16801 !tg3_flag(tp, NO_NVRAM)) in tg3_get_invariants()
16812 if (!tg3_flag(tp, IS_5788) && in tg3_get_invariants()
16815 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_get_invariants()
16825 if (tg3_flag(tp, ENABLE_APE)) in tg3_get_invariants()
16878 if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) in tg3_get_invariants()
16884 tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16905 if (tg3_flag(tp, ASPM_WORKAROUND)) in tg3_get_invariants()
16950 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_get_device_address()
16958 tg3_flag(tp, 5780_CLASS)) { in tg3_get_device_address()
16965 } else if (tg3_flag(tp, 5717_PLUS)) { in tg3_get_device_address()
16990 if (!tg3_flag(tp, NO_NVRAM) && in tg3_get_device_address()
17040 !tg3_flag(tp, PCI_EXPRESS)) in tg3_calc_dma_bndry()
17053 if (tg3_flag(tp, 57765_PLUS)) { in tg3_calc_dma_bndry()
17072 if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17097 } else if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17270 if (tg3_flag(tp, 57765_PLUS)) in tg3_test_dma()
17273 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_test_dma()
17276 } else if (!tg3_flag(tp, PCIX_MODE)) { in tg3_test_dma()
17292 if (tg3_flag(tp, 40BIT_DMA_BUG) && in tg3_test_dma()
17315 if (tg3_flag(tp, ONE_DMA_AT_ONCE)) in tg3_test_dma()
17428 if (tg3_flag(tp, 57765_PLUS)) { in tg3_init_bufmgr_config()
17442 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_bufmgr_config()
17516 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_bus_string()
17519 } else if (tg3_flag(tp, PCIX_MODE)) { in tg3_bus_string()
17538 if (tg3_flag(tp, PCI_HIGH_SPEED)) in tg3_bus_string()
17543 if (tg3_flag(tp, PCI_32BIT)) in tg3_bus_string()
17574 if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_coal()
17721 if (tg3_flag(tp, IS_5788)) in tg3_init_one()
17723 else if (tg3_flag(tp, 40BIT_DMA_BUG)) { in tg3_init_one()
17762 if (tg3_flag(tp, 5755_PLUS)) in tg3_init_one()
17770 if ((tg3_flag(tp, HW_TSO_1) || in tg3_init_one()
17771 tg3_flag(tp, HW_TSO_2) || in tg3_init_one()
17772 tg3_flag(tp, HW_TSO_3)) && in tg3_init_one()
17775 if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { in tg3_init_one()
17778 if (tg3_flag(tp, HW_TSO_3) || in tg3_init_one()
17797 !tg3_flag(tp, CPMU_PRESENT)) in tg3_init_one()
17805 !tg3_flag(tp, TSO_CAPABLE) && in tg3_init_one()
17841 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_init_one()
17900 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_init_one()
17939 tg3_flag(tp, USE_LINKCHG_REG) != 0, in tg3_init_one()
17941 tg3_flag(tp, ENABLE_ASF) != 0, in tg3_init_one()
17942 tg3_flag(tp, TSO_CAPABLE) != 0); in tg3_init_one()
17989 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_remove_one()