Lines Matching refs:dw32
19 #define dw32(reg, val) iowrite32(val, ioaddr + (reg)) macro
428 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230); in rio_open()
442 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16); in rio_open()
449 dw32(RmonStatMask, 0x0007ffff); in rio_open()
456 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10); in rio_open()
460 dw32(VLANTag, 0x8100 << 16 | np->vlan); in rio_open()
463 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging); in rio_open()
473 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable); in rio_open()
595 dw32(RFDListPtr0, np->rx_ring_dma); in alloc_list()
596 dw32(RFDListPtr1, 0); in alloc_list()
646 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000); in start_xmit()
648 dw32(CountDown, 10000); in start_xmit()
659 dw32(TFDListPtr0, np->tx_ring_dma + in start_xmit()
661 dw32(TFDListPtr1, 0); in start_xmit()
703 dw32(CountDown, 100); in rio_interrupt()
787 dw32(TFDListPtr0, np->tx_ring_dma + in tx_error()
789 dw32(TFDListPtr1, 0); in tx_error()
815 dw32(MACCtrl, dr16(MACCtrl) | TxEnable); in tx_error()
1148 dw32(HashTable0, hash_table[0]); in set_multicast()
1149 dw32(HashTable1, hash_table[1]); in set_multicast()
1698 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable); in rio_close()