95 	iowrite32(addr, priv->base + FTGMAC100_OFFSET_RXR_BADR);  in ftgmac100_set_rx_ring_base()
102 	iowrite32(size, priv->base + FTGMAC100_OFFSET_RBSR);  in ftgmac100_set_rx_buffer_size()
108 	iowrite32(addr, priv->base + FTGMAC100_OFFSET_NPTXR_BADR);  in ftgmac100_set_normal_prio_tx_ring_base()
113 	iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD);  in ftgmac100_txdma_normal_prio_start_polling()
122 	iowrite32(FTGMAC100_MACCR_SW_RST, priv->base + FTGMAC100_OFFSET_MACCR);  in ftgmac100_reset_hw()
142 	iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR);  in ftgmac100_set_mac()
143 	iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR);  in ftgmac100_set_mac()
158 	iowrite32(FTGMAC100_APTC_RXPOLL_CNT(1), priv->base + FTGMAC100_OFFSET_APTC);  in ftgmac100_init_hw()
190 	iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);  in ftgmac100_start_hw()
195 	iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR);  in ftgmac100_stop_hw()
822 	iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);  in ftgmac100_adjust_link()
832 	iowrite32(ier, priv->base + FTGMAC100_OFFSET_IER);  in ftgmac100_adjust_link()
888 	iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);  in ftgmac100_mdiobus_read()
927 	iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA);  in ftgmac100_mdiobus_write()
928 	iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR);  in ftgmac100_mdiobus_write()
987 		iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);  in ftgmac100_interrupt()
1006 	iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR);  in ftgmac100_poll()
1062 		iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTGMAC100_OFFSET_IER);  in ftgmac100_poll()
1106 	iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTGMAC100_OFFSET_IER);  in ftgmac100_open()
1122 	iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);  in ftgmac100_stop()