42 #define ipg_w32(val32, reg)	iowrite32((val32), ioaddr + (reg))  macro
397 	ipg_w32(mode, ASIC_CTRL);  in ipg_set_led_mode()
423 	ipg_w32(ipg_r32(ASIC_CTRL) | resetflags, ASIC_CTRL);  in ipg_reset()
564 	ipg_w32(mac_ctrl_val, MAC_CTRL);  in ipg_config_autoneg()
631 	ipg_w32(hashtable[0], HASHTABLE_0);  in ipg_nic_set_multicast_list()
632 	ipg_w32(hashtable[1], HASHTABLE_1);  in ipg_nic_set_multicast_list()
670 	ipg_w32((origmacctrl & (IPG_MC_RX_DISABLE | IPG_MC_TX_DISABLE)) &  in ipg_io_config()
676 	ipg_w32((origmacctrl & IPG_MC_IFS_96BIT) & IPG_MC_RSVD_MASK, MAC_CTRL);  in ipg_io_config()
712 	ipg_w32(IPG_MC_RSVD_MASK & restoremacctrl, MAC_CTRL);  in ipg_io_config()
715 	ipg_w32(IPG_RZ_ALL, RMON_STATISTICS_MASK);  in ipg_io_config()
718 	ipg_w32(IPG_SM_MACCONTROLFRAMESXMTD | IPG_SM_MACCONTROLFRAMESRCVD |  in ipg_io_config()
807 	ipg_w32((u32) sp->rxd_map, RFD_LIST_PTR_0);  in init_rfdlist()
808 	ipg_w32(0x00000000, RFD_LIST_PTR_1);  in init_rfdlist()
842 	ipg_w32((u32) sp->txd_map, TFD_LIST_PTR_0);  in init_tfdlist()
843 	ipg_w32(0x00000000, TFD_LIST_PTR_1);  in init_tfdlist()
915 	ipg_w32((ipg_r32(MAC_CTRL) | IPG_MC_TX_ENABLE) & IPG_MC_RSVD_MASK,  in ipg_tx_timeout()
960 			ipg_w32((ipg_r32(MAC_CTRL) | IPG_MC_TX_ENABLE) &  in ipg_nic_txcleanup()
967 			ipg_w32((ipg_r32(MAC_CTRL) | IPG_MC_TX_ENABLE) &  in ipg_nic_txcleanup()
986 			ipg_w32((ipg_r32(MAC_CTRL) | IPG_MC_TX_ENABLE) &  in ipg_nic_txcleanup()
1362 		ipg_w32(ipg_r32(ASIC_CTRL) | IPG_AC_INT_REQUEST, ASIC_CTRL);  in ipg_nic_rx_jumbo()
1492 		ipg_w32(ipg_r32(ASIC_CTRL) | IPG_AC_INT_REQUEST, ASIC_CTRL);  in ipg_nic_rx()
1787 	ipg_w32((ipg_r32(MAC_CTRL) | IPG_MC_RX_ENABLE | IPG_MC_TX_ENABLE) &  in ipg_nic_open()
1939 	ipg_w32(IPG_DC_TX_DMA_POLL_NOW, DMA_CTRL);  in ipg_nic_hard_start_xmit()