196 	u16 phy_reg = 0;  in e1000_phy_is_accessible_pchlan()  local
203 		ret_val = e1e_rphy_locked(hw, MII_PHYSID1, &phy_reg);  in e1000_phy_is_accessible_pchlan()
204 		if (ret_val || (phy_reg == 0xFFFF))  in e1000_phy_is_accessible_pchlan()
206 		phy_id = (u32)(phy_reg << 16);  in e1000_phy_is_accessible_pchlan()
208 		ret_val = e1e_rphy_locked(hw, MII_PHYSID2, &phy_reg);  in e1000_phy_is_accessible_pchlan()
209 		if (ret_val || (phy_reg == 0xFFFF)) {  in e1000_phy_is_accessible_pchlan()
213 		phy_id |= (u32)(phy_reg & PHY_REVISION_MASK);  in e1000_phy_is_accessible_pchlan()
222 		hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);  in e1000_phy_is_accessible_pchlan()
243 		e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_phy_is_accessible_pchlan()
244 		phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;  in e1000_phy_is_accessible_pchlan()
245 		e1e_wphy_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_phy_is_accessible_pchlan()
1093 	u16 phy_reg;  in e1000_enable_ulp_lpt_lp()  local
1140 						       &phy_reg);  in e1000_enable_ulp_lpt_lp()
1143 		phy_reg |= HV_OEM_BITS_LPLU | HV_OEM_BITS_GBE_DIS;  in e1000_enable_ulp_lpt_lp()
1145 							phy_reg);  in e1000_enable_ulp_lpt_lp()
1151 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1154 	phy_reg |= CV_SMB_CTRL_FORCE_SMBUS;  in e1000_enable_ulp_lpt_lp()
1155 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_enable_ulp_lpt_lp()
1165 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1168 	phy_reg |= (I218_ULP_CONFIG1_RESET_TO_SMBUS |  in e1000_enable_ulp_lpt_lp()
1172 			phy_reg |= I218_ULP_CONFIG1_WOL_HOST;  in e1000_enable_ulp_lpt_lp()
1174 		phy_reg |= I218_ULP_CONFIG1_STICKY_ULP;  in e1000_enable_ulp_lpt_lp()
1176 		phy_reg |= I218_ULP_CONFIG1_INBAND_EXIT;  in e1000_enable_ulp_lpt_lp()
1178 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1186 	phy_reg |= I218_ULP_CONFIG1_START;  in e1000_enable_ulp_lpt_lp()
1187 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1218 	u16 phy_reg;  in e1000_disable_ulp_lpt_lp()  local
1272 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1284 						       &phy_reg);  in e1000_disable_ulp_lpt_lp()
1288 	phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;  in e1000_disable_ulp_lpt_lp()
1289 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1299 	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1302 	phy_reg |= HV_PM_CTRL_K1_ENABLE;  in e1000_disable_ulp_lpt_lp()
1303 	e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1306 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1309 	phy_reg &= ~(I218_ULP_CONFIG1_IND |  in e1000_disable_ulp_lpt_lp()
1315 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1318 	phy_reg |= I218_ULP_CONFIG1_START;  in e1000_disable_ulp_lpt_lp()
1319 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1355 	u16 phy_reg;  in e1000_check_for_copper_link_ich8lan()  local
1480 		e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);  in e1000_check_for_copper_link_ich8lan()
1481 		phy_reg &= ~HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK;  in e1000_check_for_copper_link_ich8lan()
1484 			phy_reg |= (1 << HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT);  in e1000_check_for_copper_link_ich8lan()
1486 		e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);  in e1000_check_for_copper_link_ich8lan()
2391 	u16 i, phy_reg = 0;  in e1000_copy_rx_addrs_to_phy_ich8lan()  local
2397 	ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2417 	e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2432 	u16 phy_reg, data;  in e1000_lv_jumbo_workaround_ich8lan()  local
2440 	e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);  in e1000_lv_jumbo_workaround_ich8lan()
2441 	ret_val = e1e_wphy(hw, PHY_REG(769, 20), phy_reg | (1 << 14));  in e1000_lv_jumbo_workaround_ich8lan()
2588 	return e1e_wphy(hw, PHY_REG(769, 20), phy_reg & ~(1 << 14));  in e1000_lv_jumbo_workaround_ich8lan()
5183 		u16 phy_reg, device_id = hw->adapter->pdev->device;  in e1000_suspend_workarounds_ich8lan()  local
5223 						I217_LPI_GPIO_CTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5224 				phy_reg |= I217_LPI_GPIO_CTRL_AUTO_EN_LPI;  in e1000_suspend_workarounds_ich8lan()
5226 						I217_LPI_GPIO_CTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5239 			e1e_rphy_locked(hw, I217_PROXY_CTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5240 			phy_reg |= I217_PROXY_CTRL_AUTO_DISABLE;  in e1000_suspend_workarounds_ich8lan()
5241 			e1e_wphy_locked(hw, I217_PROXY_CTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5246 			e1e_rphy_locked(hw, I217_SxCTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5247 			phy_reg |= I217_SxCTRL_ENABLE_LPI_RESET;  in e1000_suspend_workarounds_ich8lan()
5248 			e1e_wphy_locked(hw, I217_SxCTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5251 			e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5252 			phy_reg &= ~I217_MEMPWR_DISABLE_SMB_RELEASE;  in e1000_suspend_workarounds_ich8lan()
5253 			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5259 		e1e_rphy_locked(hw, I217_CGFREG, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5260 		phy_reg |= I217_CGFREG_ENABLE_MTA_RESET;  in e1000_suspend_workarounds_ich8lan()
5261 		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5316 		u16 phy_reg;  in e1000_resume_workarounds_pchlan()  local
5325 		e1e_rphy_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg);  in e1000_resume_workarounds_pchlan()
5326 		phy_reg &= ~I217_LPI_GPIO_CTRL_AUTO_EN_LPI;  in e1000_resume_workarounds_pchlan()
5327 		e1e_wphy_locked(hw, I217_LPI_GPIO_CTRL, phy_reg);  in e1000_resume_workarounds_pchlan()
5333 			ret_val = e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg);  in e1000_resume_workarounds_pchlan()
5336 			phy_reg |= I217_MEMPWR_DISABLE_SMB_RELEASE;  in e1000_resume_workarounds_pchlan()
5337 			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);  in e1000_resume_workarounds_pchlan()
5343 		ret_val = e1e_rphy_locked(hw, I217_CGFREG, &phy_reg);  in e1000_resume_workarounds_pchlan()
5346 		phy_reg &= ~I217_CGFREG_ENABLE_MTA_RESET;  in e1000_resume_workarounds_pchlan()
5347 		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);  in e1000_resume_workarounds_pchlan()