Lines Matching refs:wr32
721 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg()
923 wr32(hw, I40E_PFGEN_CTRL, in i40e_pf_reset()
988 wr32(hw, I40E_PFINT_ICR0_ENA, 0); in i40e_clear_hw()
991 wr32(hw, I40E_PFINT_DYN_CTLN(i), val); in i40e_clear_hw()
995 wr32(hw, I40E_PFINT_LNKLST0, val); in i40e_clear_hw()
997 wr32(hw, I40E_PFINT_LNKLSTN(i), val); in i40e_clear_hw()
1000 wr32(hw, I40E_VPINT_LNKLST0(i), val); in i40e_clear_hw()
1002 wr32(hw, I40E_VPINT_LNKLSTN(i), val); in i40e_clear_hw()
1019 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()
1025 wr32(hw, I40E_QINT_TQCTL(i), 0); in i40e_clear_hw()
1026 wr32(hw, I40E_QTX_ENA(i), 0); in i40e_clear_hw()
1027 wr32(hw, I40E_QINT_RQCTL(i), 0); in i40e_clear_hw()
1028 wr32(hw, I40E_QRX_ENA(i), 0); in i40e_clear_hw()
1054 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK))); in i40e_clear_pxe_mode()
1056 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK)); in i40e_clear_pxe_mode()
1194 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val); in i40e_led_set()
1381 wr32(hw, I40E_GLLAN_RCTL_0, 0x1); in i40e_aq_clear_pxe_mode()
3340 wr32(hw, I40E_PFQF_CTL_0, val); in i40e_set_filter_control()