53 		hw->aq.asq.tail = I40E_VF_ATQT1;  in i40e_adminq_init_regs()
54 		hw->aq.asq.head = I40E_VF_ATQH1;  in i40e_adminq_init_regs()
55 		hw->aq.asq.len  = I40E_VF_ATQLEN1;  in i40e_adminq_init_regs()
56 		hw->aq.asq.bal  = I40E_VF_ATQBAL1;  in i40e_adminq_init_regs()
57 		hw->aq.asq.bah  = I40E_VF_ATQBAH1;  in i40e_adminq_init_regs()
64 		hw->aq.asq.tail = I40E_PF_ATQT;  in i40e_adminq_init_regs()
65 		hw->aq.asq.head = I40E_PF_ATQH;  in i40e_adminq_init_regs()
66 		hw->aq.asq.len  = I40E_PF_ATQLEN;  in i40e_adminq_init_regs()
67 		hw->aq.asq.bal  = I40E_PF_ATQBAL;  in i40e_adminq_init_regs()
68 		hw->aq.asq.bah  = I40E_PF_ATQBAH;  in i40e_adminq_init_regs()
85 	ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,  in i40e_alloc_adminq_asq_ring()
93 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf,  in i40e_alloc_adminq_asq_ring()
97 		i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_alloc_adminq_asq_ring()
130 	i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_free_adminq_asq()
223 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head,  in i40e_alloc_asq_bufs()
227 	hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va;  in i40e_alloc_asq_bufs()
231 		bi = &hw->aq.asq.r.asq_bi[i];  in i40e_alloc_asq_bufs()
246 		i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);  in i40e_alloc_asq_bufs()
247 	i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);  in i40e_alloc_asq_bufs()
281 		if (hw->aq.asq.r.asq_bi[i].pa)  in i40e_free_asq_bufs()
282 			i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);  in i40e_free_asq_bufs()
285 	i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf);  in i40e_free_asq_bufs()
288 	i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_free_asq_bufs()
291 	i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);  in i40e_free_asq_bufs()
306 	wr32(hw, hw->aq.asq.head, 0);  in i40e_config_asq_regs()
307 	wr32(hw, hw->aq.asq.tail, 0);  in i40e_config_asq_regs()
310 	wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |  in i40e_config_asq_regs()
312 	wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa));  in i40e_config_asq_regs()
313 	wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa));  in i40e_config_asq_regs()
316 	reg = rd32(hw, hw->aq.asq.bal);  in i40e_config_asq_regs()
317 	if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa))  in i40e_config_asq_regs()
372 	if (hw->aq.asq.count > 0) {  in i40e_init_asq()
385 	hw->aq.asq.next_to_use = 0;  in i40e_init_asq()
386 	hw->aq.asq.next_to_clean = 0;  in i40e_init_asq()
387 	hw->aq.asq.count = hw->aq.num_asq_entries;  in i40e_init_asq()
483 	if (hw->aq.asq.count == 0)  in i40e_shutdown_asq()
487 	wr32(hw, hw->aq.asq.head, 0);  in i40e_shutdown_asq()
488 	wr32(hw, hw->aq.asq.tail, 0);  in i40e_shutdown_asq()
489 	wr32(hw, hw->aq.asq.len, 0);  in i40e_shutdown_asq()
490 	wr32(hw, hw->aq.asq.bal, 0);  in i40e_shutdown_asq()
491 	wr32(hw, hw->aq.asq.bah, 0);  in i40e_shutdown_asq()
496 	hw->aq.asq.count = 0; /* to indicate uninitialized queue */  in i40e_shutdown_asq()
621 	struct i40e_adminq_ring *asq = &(hw->aq.asq);  in i40e_clean_asq()  local
623 	u16 ntc = asq->next_to_clean;  in i40e_clean_asq()
627 	desc = I40E_ADMINQ_DESC(*asq, ntc);  in i40e_clean_asq()
628 	details = I40E_ADMINQ_DETAILS(*asq, ntc);  in i40e_clean_asq()
629 	while (rd32(hw, hw->aq.asq.head) != ntc) {  in i40e_clean_asq()
632 			   rd32(hw, hw->aq.asq.head));  in i40e_clean_asq()
644 		if (ntc == asq->count)  in i40e_clean_asq()
646 		desc = I40E_ADMINQ_DESC(*asq, ntc);  in i40e_clean_asq()
647 		details = I40E_ADMINQ_DETAILS(*asq, ntc);  in i40e_clean_asq()
650 	asq->next_to_clean = ntc;  in i40e_clean_asq()
652 	return I40E_DESC_UNUSED(asq);  in i40e_clean_asq()
667 	return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;  in i40evf_asq_done()
696 	val = rd32(hw, hw->aq.asq.head);  in i40evf_asq_send_command()
704 	if (hw->aq.asq.count == 0) {  in i40evf_asq_send_command()
711 	details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use);  in i40evf_asq_send_command()
768 	desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use);  in i40evf_asq_send_command()
775 		dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]);  in i40evf_asq_send_command()
793 	(hw->aq.asq.next_to_use)++;  in i40evf_asq_send_command()
794 	if (hw->aq.asq.next_to_use == hw->aq.asq.count)  in i40evf_asq_send_command()
795 		hw->aq.asq.next_to_use = 0;  in i40evf_asq_send_command()
797 		wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use);  in i40evf_asq_send_command()
970 	hw->aq.asq.next_to_use = 0;  in i40evf_resume_aq()
971 	hw->aq.asq.next_to_clean = 0;  in i40evf_resume_aq()