Lines Matching refs:wr32
598 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_data()
623 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_clk()
897 wr32(E1000_CTRL_EXT, tmp); in igb_configure_msix()
914 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE | in igb_configure_msix()
922 wr32(E1000_IVAR_MISC, tmp); in igb_configure_msix()
1154 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_set_interrupt_capability()
1485 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1486 wr32(E1000_EIMC, adapter->eims_enable_mask); in igb_irq_disable()
1488 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1491 wr32(E1000_IAM, 0); in igb_irq_disable()
1492 wr32(E1000_IMC, ~0); in igb_irq_disable()
1516 wr32(E1000_EIAC, regval | adapter->eims_enable_mask); in igb_irq_enable()
1518 wr32(E1000_EIAM, regval | adapter->eims_enable_mask); in igb_irq_enable()
1519 wr32(E1000_EIMS, adapter->eims_enable_mask); in igb_irq_enable()
1521 wr32(E1000_MBVFIMR, 0xFF); in igb_irq_enable()
1524 wr32(E1000_IMS, ims); in igb_irq_enable()
1526 wr32(E1000_IMS, IMS_ENABLE_MASK | in igb_irq_enable()
1528 wr32(E1000_IAM, IMS_ENABLE_MASK | in igb_irq_enable()
1570 wr32(E1000_CTRL_EXT, in igb_release_hw_control()
1589 wr32(E1000_CTRL_EXT, in igb_get_hw_control()
1679 wr32(E1000_CONNSW, connsw); in igb_check_swap_media()
1687 wr32(E1000_CONNSW, connsw); in igb_check_swap_media()
1718 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_check_swap_media()
1752 wr32(E1000_CTRL_EXT, reg_data); in igb_up()
1782 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN); in igb_down()
1791 wr32(E1000_TCTL, tctl); in igb_down()
1857 wr32(E1000_CONNSW, connsw); in igb_enable_mas()
1903 wr32(E1000_PBA, pba); in igb_reset()
1944 wr32(E1000_PBA, pba); in igb_reset()
1974 wr32(E1000_VFRE, 0); in igb_reset()
1975 wr32(E1000_VFTE, 0); in igb_reset()
1980 wr32(E1000_WUC, 0); in igb_reset()
2035 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE); in igb_reset()
2446 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT); in igb_probe()
2447 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT); in igb_probe()
2700 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_disable_sriov()
2816 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE); in igb_remove()
3101 wr32(E1000_CTRL_EXT, reg_data); in __igb_open()
3247 wr32(E1000_TXDCTL(0), 0); in igb_setup_tctl()
3260 wr32(E1000_TCTL, tctl); in igb_setup_tctl()
3279 wr32(E1000_TXDCTL(reg_idx), 0); in igb_configure_tx_ring()
3283 wr32(E1000_TDLEN(reg_idx), in igb_configure_tx_ring()
3285 wr32(E1000_TDBAL(reg_idx), in igb_configure_tx_ring()
3287 wr32(E1000_TDBAH(reg_idx), tdba >> 32); in igb_configure_tx_ring()
3290 wr32(E1000_TDH(reg_idx), 0); in igb_configure_tx_ring()
3298 wr32(E1000_TXDCTL(reg_idx), txdctl); in igb_configure_tx_ring()
3393 wr32(E1000_RSSRK(j), rss_key[j]); in igb_setup_mrqc()
3427 wr32(E1000_RXCSUM, rxcsum); in igb_setup_mrqc()
3456 wr32(E1000_VT_CTL, vtctl); in igb_setup_mrqc()
3468 wr32(E1000_MRQC, mrqc); in igb_setup_mrqc()
3501 wr32(E1000_RXDCTL(0), 0); in igb_setup_rctl()
3509 wr32(E1000_QDE, ALL_QUEUES); in igb_setup_rctl()
3529 wr32(E1000_RCTL, rctl); in igb_setup_rctl()
3548 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_vf_rlpml()
3576 wr32(E1000_RLPML, max_frame_size); in igb_rlpml_set()
3598 wr32(E1000_DVMOLR(vfn), dvmolr); in igb_set_vmolr()
3616 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_vmolr()
3635 wr32(E1000_RXDCTL(reg_idx), 0); in igb_configure_rx_ring()
3638 wr32(E1000_RDBAL(reg_idx), in igb_configure_rx_ring()
3640 wr32(E1000_RDBAH(reg_idx), rdba >> 32); in igb_configure_rx_ring()
3641 wr32(E1000_RDLEN(reg_idx), in igb_configure_rx_ring()
3646 wr32(E1000_RDH(reg_idx), 0); in igb_configure_rx_ring()
3659 wr32(E1000_SRRCTL(reg_idx), srrctl); in igb_configure_rx_ring()
3670 wr32(E1000_RXDCTL(reg_idx), rxdctl); in igb_configure_rx_ring()
3995 wr32(E1000_RAH(rar_entries), 0); in igb_write_uc_addr_list()
3996 wr32(E1000_RAL(rar_entries), 0); in igb_write_uc_addr_list()
4060 wr32(E1000_RCTL, rctl); in igb_set_rx_mode()
4072 wr32(E1000_VMOLR(vfn), vmolr); in igb_set_rx_mode()
4391 wr32(E1000_EICS, eics); in igb_watchdog_task()
4393 wr32(E1000_ICS, E1000_ICS_RXDMT0); in igb_watchdog_task()
5127 wr32(E1000_EICS, in igb_tx_timeout()
5241 wr32(E1000_RQDPC(i), 0); in igb_update_stats()
5426 wr32(E1000_TRGTTIML0, ts.tv_nsec); in igb_tsync_interrupt()
5427 wr32(E1000_TRGTTIMH0, ts.tv_sec); in igb_tsync_interrupt()
5430 wr32(E1000_TSAUXC, tsauxc); in igb_tsync_interrupt()
5440 wr32(E1000_TRGTTIML1, ts.tv_nsec); in igb_tsync_interrupt()
5441 wr32(E1000_TRGTTIMH1, ts.tv_sec); in igb_tsync_interrupt()
5444 wr32(E1000_TSAUXC, tsauxc); in igb_tsync_interrupt()
5471 wr32(E1000_TSICR, ack); in igb_tsync_interrupt()
5508 wr32(E1000_EIMS, adapter->eims_other); in igb_msix_other()
5564 wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl); in igb_update_tx_dca()
5584 wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl); in igb_update_rx_dca()
5615 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2); in igb_setup_dca()
5651 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE); in __igb_notify_dca()
5730 wr32(E1000_VMOLR(vf), vmolr); in igb_set_vf_promisc()
5788 wr32(E1000_VMOLR(i), vmolr); in igb_restore_vf_multicasts()
5815 wr32(E1000_VLVF(i), reg); in igb_clear_vf_vfta()
5866 wr32(E1000_VLVF(i), reg); in igb_vlvf_set()
5880 wr32(E1000_VMOLR(vf), reg); in igb_vlvf_set()
5894 wr32(E1000_VLVF(i), reg); in igb_vlvf_set()
5909 wr32(E1000_VMOLR(vf), reg); in igb_vlvf_set()
5921 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT)); in igb_set_vmvir()
5923 wr32(E1000_VMVIR(vf), 0); in igb_set_vmvir()
6086 wr32(E1000_VFTE, reg | (1 << vf)); in igb_vf_reset_msg()
6088 wr32(E1000_VFRE, reg | (1 << vf)); in igb_vf_reset_msg()
6358 wr32(E1000_EIMS, q_vector->eims_value); in igb_ring_irq_enable()
7231 wr32(E1000_CTRL, ctrl); in igb_vlan_mode()
7236 wr32(E1000_RCTL, rctl); in igb_vlan_mode()
7241 wr32(E1000_CTRL, ctrl); in igb_vlan_mode()
7391 wr32(E1000_RCTL, rctl); in __igb_shutdown()
7400 wr32(E1000_CTRL, ctrl); in __igb_shutdown()
7405 wr32(E1000_WUC, E1000_WUC_PME_EN); in __igb_shutdown()
7406 wr32(E1000_WUFC, wufc); in __igb_shutdown()
7408 wr32(E1000_WUC, 0); in __igb_shutdown()
7409 wr32(E1000_WUFC, 0); in __igb_shutdown()
7488 wr32(E1000_WUS, ~0); in igb_resume()
7635 wr32(E1000_EIMC, q_vector->eims_value); in igb_netpoll()
7698 wr32(E1000_WUS, ~0); in igb_io_slot_reset()
7762 wr32(E1000_RAL(index), rar_low); in igb_rar_set_qsel()
7764 wr32(E1000_RAH(index), rar_high); in igb_rar_set_qsel()
7835 wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */ in igb_set_vf_rate_limit()
7839 wr32(E1000_RTTBCNRM, 0x14); in igb_set_vf_rate_limit()
7840 wr32(E1000_RTTBCNRC, bcnrc_val); in igb_set_vf_rate_limit()
7919 wr32(reg_offset, reg_val); in igb_ndo_set_vf_spoofchk()
7958 wr32(E1000_DTXCTL, reg); in igb_vmm_control()
7964 wr32(E1000_RPLOLR, reg); in igb_vmm_control()
7993 wr32(E1000_DMCTXTH, 0); in igb_init_dmac()
8006 wr32(E1000_FCRTC, reg); in igb_init_dmac()
8029 wr32(E1000_DMACR, reg); in igb_init_dmac()
8034 wr32(E1000_DMCRTRH, 0); in igb_init_dmac()
8038 wr32(E1000_DMCTLX, reg); in igb_init_dmac()
8043 wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE - in igb_init_dmac()
8051 wr32(E1000_PCIEMISC, reg); in igb_init_dmac()
8056 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION); in igb_init_dmac()
8057 wr32(E1000_DMACR, 0); in igb_init_dmac()