Lines Matching refs:caps
176 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { in mlx4_check_port_params()
177 for (i = 0; i < dev->caps.num_ports - 1; i++) { in mlx4_check_port_params()
185 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_check_port_params()
186 if (!(port_type[i] & dev->caps.supported_type[i+1])) { in mlx4_check_port_params()
199 for (i = 1; i <= dev->caps.num_ports; ++i) in mlx4_set_port_mask()
200 dev->caps.port_mask[i] = dev->caps.port_type[i]; in mlx4_set_port_mask()
212 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) { in mlx4_query_func()
228 struct mlx4_caps *dev_cap = &dev->caps; in mlx4_enable_cqe_eqe_stride()
264 dev->caps.vl_cap[port] = port_cap->max_vl; in _mlx4_dev_port()
265 dev->caps.ib_mtu_cap[port] = port_cap->ib_mtu; in _mlx4_dev_port()
271 dev->caps.gid_table_len[port] = port_cap->max_gids; in _mlx4_dev_port()
272 dev->caps.pkey_table_len[port] = port_cap->max_pkeys; in _mlx4_dev_port()
273 dev->caps.port_width_cap[port] = port_cap->max_port_width; in _mlx4_dev_port()
274 dev->caps.eth_mtu_cap[port] = port_cap->eth_mtu; in _mlx4_dev_port()
275 dev->caps.def_mac[port] = port_cap->def_mac; in _mlx4_dev_port()
276 dev->caps.supported_type[port] = port_cap->supported_port_types; in _mlx4_dev_port()
277 dev->caps.suggested_type[port] = port_cap->suggested_type; in _mlx4_dev_port()
278 dev->caps.default_sense[port] = port_cap->default_sense; in _mlx4_dev_port()
279 dev->caps.trans_type[port] = port_cap->trans_type; in _mlx4_dev_port()
280 dev->caps.vendor_oui[port] = port_cap->vendor_oui; in _mlx4_dev_port()
281 dev->caps.wavelength[port] = port_cap->wavelength; in _mlx4_dev_port()
282 dev->caps.trans_code[port] = port_cap->trans_code; in _mlx4_dev_port()
302 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)) in mlx4_enable_ignore_fcs()
307 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; in mlx4_enable_ignore_fcs()
311 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)) { in mlx4_enable_ignore_fcs()
314 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; in mlx4_enable_ignore_fcs()
351 dev->caps.num_ports = dev_cap->num_ports; in mlx4_dev_cap()
352 dev->caps.num_sys_eqs = dev_cap->num_sys_eqs; in mlx4_dev_cap()
354 dev->caps.num_sys_eqs : in mlx4_dev_cap()
356 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
364 dev->caps.uar_page_size = PAGE_SIZE; in mlx4_dev_cap()
365 dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; in mlx4_dev_cap()
366 dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; in mlx4_dev_cap()
367 dev->caps.bf_reg_size = dev_cap->bf_reg_size; in mlx4_dev_cap()
368 dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page; in mlx4_dev_cap()
369 dev->caps.max_sq_sg = dev_cap->max_sq_sg; in mlx4_dev_cap()
370 dev->caps.max_rq_sg = dev_cap->max_rq_sg; in mlx4_dev_cap()
371 dev->caps.max_wqes = dev_cap->max_qp_sz; in mlx4_dev_cap()
372 dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp; in mlx4_dev_cap()
373 dev->caps.max_srq_wqes = dev_cap->max_srq_sz; in mlx4_dev_cap()
374 dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1; in mlx4_dev_cap()
375 dev->caps.reserved_srqs = dev_cap->reserved_srqs; in mlx4_dev_cap()
376 dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; in mlx4_dev_cap()
377 dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; in mlx4_dev_cap()
383 dev->caps.max_cqes = dev_cap->max_cq_sz - 1; in mlx4_dev_cap()
384 dev->caps.reserved_cqs = dev_cap->reserved_cqs; in mlx4_dev_cap()
385 dev->caps.reserved_eqs = dev_cap->reserved_eqs; in mlx4_dev_cap()
386 dev->caps.reserved_mtts = dev_cap->reserved_mtts; in mlx4_dev_cap()
387 dev->caps.reserved_mrws = dev_cap->reserved_mrws; in mlx4_dev_cap()
390 dev->caps.reserved_uars = max_t(int, 128, dev_cap->reserved_uars); in mlx4_dev_cap()
391 dev->caps.reserved_pds = dev_cap->reserved_pds; in mlx4_dev_cap()
392 dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? in mlx4_dev_cap()
394 dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? in mlx4_dev_cap()
396 dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz; in mlx4_dev_cap()
398 dev->caps.max_msg_sz = dev_cap->max_msg_sz; in mlx4_dev_cap()
399 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); in mlx4_dev_cap()
400 dev->caps.flags = dev_cap->flags; in mlx4_dev_cap()
401 dev->caps.flags2 = dev_cap->flags2; in mlx4_dev_cap()
402 dev->caps.bmme_flags = dev_cap->bmme_flags; in mlx4_dev_cap()
403 dev->caps.reserved_lkey = dev_cap->reserved_lkey; in mlx4_dev_cap()
404 dev->caps.stat_rate_support = dev_cap->stat_rate_support; in mlx4_dev_cap()
405 dev->caps.max_gso_sz = dev_cap->max_gso_sz; in mlx4_dev_cap()
406 dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz; in mlx4_dev_cap()
410 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; in mlx4_dev_cap()
413 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; in mlx4_dev_cap()
416 dev->caps.log_num_macs = MLX4_MIN_LOG_NUM_MAC; in mlx4_dev_cap()
417 dev->caps.log_num_vlans = MLX4_MIN_LOG_NUM_VLANS; in mlx4_dev_cap()
419 dev->caps.log_num_macs = log_num_mac; in mlx4_dev_cap()
420 dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; in mlx4_dev_cap()
423 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
424 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE; in mlx4_dev_cap()
425 if (dev->caps.supported_type[i]) { in mlx4_dev_cap()
427 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) in mlx4_dev_cap()
428 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; in mlx4_dev_cap()
430 else if (dev->caps.supported_type[i] == in mlx4_dev_cap()
432 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; in mlx4_dev_cap()
438 dev->caps.port_type[i] = dev->caps.suggested_type[i] ? in mlx4_dev_cap()
441 dev->caps.port_type[i] = port_type_array[i - 1]; in mlx4_dev_cap()
451 ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) && in mlx4_dev_cap()
452 (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && in mlx4_dev_cap()
453 (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)); in mlx4_dev_cap()
460 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) { in mlx4_dev_cap()
462 dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO; in mlx4_dev_cap()
465 dev->caps.port_type[i] = sensed_port; in mlx4_dev_cap()
467 dev->caps.possible_type[i] = dev->caps.port_type[i]; in mlx4_dev_cap()
470 if (dev->caps.log_num_macs > dev_cap->port_cap[i].log_max_macs) { in mlx4_dev_cap()
471 dev->caps.log_num_macs = dev_cap->port_cap[i].log_max_macs; in mlx4_dev_cap()
473 i, 1 << dev->caps.log_num_macs); in mlx4_dev_cap()
475 if (dev->caps.log_num_vlans > dev_cap->port_cap[i].log_max_vlans) { in mlx4_dev_cap()
476 dev->caps.log_num_vlans = dev_cap->port_cap[i].log_max_vlans; in mlx4_dev_cap()
478 i, 1 << dev->caps.log_num_vlans); in mlx4_dev_cap()
482 dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters); in mlx4_dev_cap()
484 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps; in mlx4_dev_cap()
485 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] = in mlx4_dev_cap()
486 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] = in mlx4_dev_cap()
487 (1 << dev->caps.log_num_macs) * in mlx4_dev_cap()
488 (1 << dev->caps.log_num_vlans) * in mlx4_dev_cap()
489 dev->caps.num_ports; in mlx4_dev_cap()
490 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; in mlx4_dev_cap()
493 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) in mlx4_dev_cap()
494 dev->caps.dmfs_high_rate_qpn_base = dev_cap->dmfs_high_rate_qpn_base; in mlx4_dev_cap()
496 dev->caps.dmfs_high_rate_qpn_base = in mlx4_dev_cap()
497 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_dev_cap()
500 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) { in mlx4_dev_cap()
501 dev->caps.dmfs_high_rate_qpn_range = dev_cap->dmfs_high_rate_qpn_range; in mlx4_dev_cap()
502 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DEFAULT; in mlx4_dev_cap()
503 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_FS_A0; in mlx4_dev_cap()
505 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_NOT_SUPPORTED; in mlx4_dev_cap()
506 dev->caps.dmfs_high_rate_qpn_base = in mlx4_dev_cap()
507 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_dev_cap()
508 dev->caps.dmfs_high_rate_qpn_range = MLX4_A0_STEERING_TABLE_SIZE; in mlx4_dev_cap()
511 dev->caps.rl_caps = dev_cap->rl_caps; in mlx4_dev_cap()
513 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_RSS_RAW_ETH] = in mlx4_dev_cap()
514 dev->caps.dmfs_high_rate_qpn_range; in mlx4_dev_cap()
516 dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + in mlx4_dev_cap()
517 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + in mlx4_dev_cap()
518 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + in mlx4_dev_cap()
519 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; in mlx4_dev_cap()
521 dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0; in mlx4_dev_cap()
527 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE; in mlx4_dev_cap()
528 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE; in mlx4_dev_cap()
540 if ((dev->caps.flags & in mlx4_dev_cap()
543 dev->caps.function_caps |= MLX4_FUNC_CAP_64B_EQE_CQE; in mlx4_dev_cap()
547 dev->caps.alloc_res_qp_mask = in mlx4_dev_cap()
548 (dev->caps.bf_reg_size ? MLX4_RESERVE_ETH_BF_QP : 0) | in mlx4_dev_cap()
551 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) && in mlx4_dev_cap()
552 dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) { in mlx4_dev_cap()
555 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_ETS_CFG; in mlx4_dev_cap()
559 dev->caps.alloc_res_qp_mask = 0; in mlx4_dev_cap()
734 dev->caps.steering_mode = hca_param->steering_mode; in slave_adjust_steering_mode()
735 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { in slave_adjust_steering_mode()
736 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; in slave_adjust_steering_mode()
737 dev->caps.fs_log_max_ucast_qp_range_size = in slave_adjust_steering_mode()
740 dev->caps.num_qp_per_mgm = in slave_adjust_steering_mode()
744 mlx4_steering_mode_str(dev->caps.steering_mode)); in slave_adjust_steering_mode()
773 dev->caps.hca_core_clock = hca_param.hca_core_clock; in mlx4_slave_cap()
776 dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp; in mlx4_slave_cap()
787 page_size = ~dev->caps.page_size_cap + 1; in mlx4_slave_cap()
796 dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12); in mlx4_slave_cap()
799 if (dev->caps.uar_page_size != PAGE_SIZE) { in mlx4_slave_cap()
801 dev->caps.uar_page_size, PAGE_SIZE); in mlx4_slave_cap()
820 dev->caps.num_ports = func_cap.num_ports; in mlx4_slave_cap()
826 dev->caps.num_qps = 1 << hca_param.log_num_qps; in mlx4_slave_cap()
827 dev->caps.num_srqs = 1 << hca_param.log_num_srqs; in mlx4_slave_cap()
828 dev->caps.num_cqs = 1 << hca_param.log_num_cqs; in mlx4_slave_cap()
829 dev->caps.num_mpts = 1 << hca_param.log_mpt_sz; in mlx4_slave_cap()
830 dev->caps.num_eqs = func_cap.max_eq; in mlx4_slave_cap()
831 dev->caps.reserved_eqs = func_cap.reserved_eq; in mlx4_slave_cap()
832 dev->caps.reserved_lkey = func_cap.reserved_lkey; in mlx4_slave_cap()
833 dev->caps.num_pds = MLX4_NUM_PDS; in mlx4_slave_cap()
834 dev->caps.num_mgms = 0; in mlx4_slave_cap()
835 dev->caps.num_amgms = 0; in mlx4_slave_cap()
837 if (dev->caps.num_ports > MLX4_MAX_PORTS) { in mlx4_slave_cap()
839 dev->caps.num_ports, MLX4_MAX_PORTS); in mlx4_slave_cap()
843 dev->caps.qp0_qkey = kcalloc(dev->caps.num_ports, sizeof(u32), GFP_KERNEL); in mlx4_slave_cap()
844 dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
845 dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
846 dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
847 dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); in mlx4_slave_cap()
849 if (!dev->caps.qp0_tunnel || !dev->caps.qp0_proxy || in mlx4_slave_cap()
850 !dev->caps.qp1_tunnel || !dev->caps.qp1_proxy || in mlx4_slave_cap()
851 !dev->caps.qp0_qkey) { in mlx4_slave_cap()
856 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_slave_cap()
863 dev->caps.qp0_qkey[i - 1] = func_cap.qp0_qkey; in mlx4_slave_cap()
864 dev->caps.qp0_tunnel[i - 1] = func_cap.qp0_tunnel_qpn; in mlx4_slave_cap()
865 dev->caps.qp0_proxy[i - 1] = func_cap.qp0_proxy_qpn; in mlx4_slave_cap()
866 dev->caps.qp1_tunnel[i - 1] = func_cap.qp1_tunnel_qpn; in mlx4_slave_cap()
867 dev->caps.qp1_proxy[i - 1] = func_cap.qp1_proxy_qpn; in mlx4_slave_cap()
868 dev->caps.port_mask[i] = dev->caps.port_type[i]; in mlx4_slave_cap()
869 dev->caps.phys_port_id[i] = func_cap.phys_port_id; in mlx4_slave_cap()
871 &dev->caps.gid_table_len[i], in mlx4_slave_cap()
872 &dev->caps.pkey_table_len[i])) in mlx4_slave_cap()
876 if (dev->caps.uar_page_size * (dev->caps.num_uars - in mlx4_slave_cap()
877 dev->caps.reserved_uars) > in mlx4_slave_cap()
881 dev->caps.uar_page_size * dev->caps.num_uars, in mlx4_slave_cap()
888 dev->caps.eqe_size = 64; in mlx4_slave_cap()
889 dev->caps.eqe_factor = 1; in mlx4_slave_cap()
891 dev->caps.eqe_size = 32; in mlx4_slave_cap()
892 dev->caps.eqe_factor = 0; in mlx4_slave_cap()
896 dev->caps.cqe_size = 64; in mlx4_slave_cap()
897 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_slave_cap()
899 dev->caps.cqe_size = 32; in mlx4_slave_cap()
903 dev->caps.eqe_size = hca_param.eqe_size; in mlx4_slave_cap()
904 dev->caps.eqe_factor = 0; in mlx4_slave_cap()
908 dev->caps.cqe_size = hca_param.cqe_size; in mlx4_slave_cap()
910 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_slave_cap()
913 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_slave_cap()
921 dev->caps.bf_reg_size) in mlx4_slave_cap()
922 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_ETH_BF_QP; in mlx4_slave_cap()
925 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_A0_QP; in mlx4_slave_cap()
930 kfree(dev->caps.qp0_qkey); in mlx4_slave_cap()
931 kfree(dev->caps.qp0_tunnel); in mlx4_slave_cap()
932 kfree(dev->caps.qp0_proxy); in mlx4_slave_cap()
933 kfree(dev->caps.qp1_tunnel); in mlx4_slave_cap()
934 kfree(dev->caps.qp1_proxy); in mlx4_slave_cap()
935 dev->caps.qp0_qkey = NULL; in mlx4_slave_cap()
936 dev->caps.qp0_tunnel = NULL; in mlx4_slave_cap()
937 dev->caps.qp0_proxy = NULL; in mlx4_slave_cap()
938 dev->caps.qp1_tunnel = NULL; in mlx4_slave_cap()
939 dev->caps.qp1_proxy = NULL; in mlx4_slave_cap()
952 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_request_modules()
953 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_IB) in mlx4_request_modules()
955 else if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) in mlx4_request_modules()
961 if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) in mlx4_request_modules()
976 for (port = 0; port < dev->caps.num_ports; port++) { in mlx4_change_port_types()
979 if (port_types[port] != dev->caps.port_type[port + 1]) in mlx4_change_port_types()
984 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_change_port_types()
986 dev->caps.port_type[port] = port_types[port - 1]; in mlx4_change_port_types()
1017 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ? in show_port_type()
1019 if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO) in show_port_type()
1058 mdev->caps.possible_type[info->port] = info->tmp_type; in set_port_type()
1060 for (i = 0; i < mdev->caps.num_ports; i++) { in set_port_type()
1062 mdev->caps.possible_type[i+1]; in set_port_type()
1064 types[i] = mdev->caps.port_type[i+1]; in set_port_type()
1067 if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && in set_port_type()
1068 !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) { in set_port_type()
1069 for (i = 1; i <= mdev->caps.num_ports; i++) { in set_port_type()
1070 if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { in set_port_type()
1071 mdev->caps.possible_type[i] = mdev->caps.port_type[i]; in set_port_type()
1090 for (i = 0; i < mdev->caps.num_ports; i++) in set_port_type()
1144 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) in show_port_ib_mtu()
1148 ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port])); in show_port_ib_mtu()
1162 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) { in set_port_ib_mtu()
1176 mdev->caps.port_ib_mtu[info->port] = ibta_mtu; in set_port_ib_mtu()
1181 for (port = 1; port <= mdev->caps.num_ports; port++) { in set_port_ib_mtu()
1245 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP)) in mlx4_port_map_set()
1327 cmpt_entry_sz, dev->caps.num_qps, in mlx4_init_cmpt_table()
1328 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_cmpt_table()
1337 cmpt_entry_sz, dev->caps.num_srqs, in mlx4_init_cmpt_table()
1338 dev->caps.reserved_srqs, 0, 0); in mlx4_init_cmpt_table()
1346 cmpt_entry_sz, dev->caps.num_cqs, in mlx4_init_cmpt_table()
1347 dev->caps.reserved_cqs, 0, 0); in mlx4_init_cmpt_table()
1429 dev->caps.reserved_mtts = in mlx4_init_icm()
1430 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz, in mlx4_init_icm()
1431 dma_get_cache_alignment()) / dev->caps.mtt_entry_sz; in mlx4_init_icm()
1435 dev->caps.mtt_entry_sz, in mlx4_init_icm()
1436 dev->caps.num_mtts, in mlx4_init_icm()
1437 dev->caps.reserved_mtts, 1, 0); in mlx4_init_icm()
1446 dev->caps.num_mpts, in mlx4_init_icm()
1447 dev->caps.reserved_mrws, 1, 1); in mlx4_init_icm()
1456 dev->caps.num_qps, in mlx4_init_icm()
1457 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1467 dev->caps.num_qps, in mlx4_init_icm()
1468 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1478 dev->caps.num_qps, in mlx4_init_icm()
1479 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1489 dev->caps.num_qps, in mlx4_init_icm()
1490 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1500 dev->caps.num_cqs, in mlx4_init_icm()
1501 dev->caps.reserved_cqs, 0, 0); in mlx4_init_icm()
1510 dev->caps.num_srqs, in mlx4_init_icm()
1511 dev->caps.reserved_srqs, 0, 0); in mlx4_init_icm()
1527 dev->caps.num_mgms + dev->caps.num_amgms, in mlx4_init_icm()
1528 dev->caps.num_mgms + dev->caps.num_amgms, in mlx4_init_icm()
1620 if (!dev->caps.bf_reg_size) in map_bf_area()
1624 (dev->caps.num_uars << PAGE_SHIFT); in map_bf_area()
1626 (dev->caps.num_uars << PAGE_SHIFT); in map_bf_area()
1746 dev->caps.vf_caps |= MLX4_VF_CAP_FLAG_RESET; in mlx4_reset_vf_support()
1823 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_parav_master_pf_caps()
1824 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) in mlx4_parav_master_pf_caps()
1825 dev->caps.gid_table_len[i] = in mlx4_parav_master_pf_caps()
1828 dev->caps.gid_table_len[i] = 1; in mlx4_parav_master_pf_caps()
1829 dev->caps.pkey_table_len[i] = in mlx4_parav_master_pf_caps()
1877 if (dev->caps.dmfs_high_steer_mode == in choose_steering_mode()
1881 dev->caps.dmfs_high_steer_mode = in choose_steering_mode()
1895 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED; in choose_steering_mode()
1896 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; in choose_steering_mode()
1897 dev->caps.fs_log_max_ucast_qp_range_size = in choose_steering_mode()
1900 if (dev->caps.dmfs_high_steer_mode != in choose_steering_mode()
1902 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DISABLE; in choose_steering_mode()
1903 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER && in choose_steering_mode()
1904 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) in choose_steering_mode()
1905 dev->caps.steering_mode = MLX4_STEERING_MODE_B0; in choose_steering_mode()
1907 dev->caps.steering_mode = MLX4_STEERING_MODE_A0; in choose_steering_mode()
1909 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER || in choose_steering_mode()
1910 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) in choose_steering_mode()
1917 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev); in choose_steering_mode()
1920 mlx4_steering_mode_str(dev->caps.steering_mode), in choose_steering_mode()
1928 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED && in choose_tunnel_offload_mode()
1930 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_VXLAN; in choose_tunnel_offload_mode()
1932 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_NONE; in choose_tunnel_offload_mode()
1934 mlx4_dbg(dev, "Tunneling offload mode is: %s\n", (dev->caps.tunnel_offload_mode in choose_tunnel_offload_mode()
1943 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_NOT_SUPPORTED) in mlx4_validate_optimized_steering()
1946 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_validate_optimized_steering()
1950 } else if ((dev->caps.dmfs_high_steer_mode != in mlx4_validate_optimized_steering()
1953 !!(dev->caps.dmfs_high_steer_mode == in mlx4_validate_optimized_steering()
1958 dev->caps.dmfs_high_steer_mode), in mlx4_validate_optimized_steering()
2019 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC && in mlx4_init_hca()
2021 dev->caps.function_caps |= MLX4_FUNC_CAP_DMFS_A0_STATIC; in mlx4_init_hca()
2036 if (dev->caps.steering_mode == in mlx4_init_hca()
2047 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1; in mlx4_init_hca()
2049 init_hca.log_uar_sz = ilog2(dev->caps.num_uars); in mlx4_init_hca()
2052 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || in mlx4_init_hca()
2053 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) in mlx4_init_hca()
2072 dev->caps.num_eqs = dev_cap.max_eqs; in mlx4_init_hca()
2073 dev->caps.reserved_eqs = dev_cap.reserved_eqs; in mlx4_init_hca()
2074 dev->caps.reserved_uars = dev_cap.reserved_uars; in mlx4_init_hca()
2082 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) { in mlx4_init_hca()
2087 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2089 dev->caps.hca_core_clock = in mlx4_init_hca()
2096 if (!dev->caps.hca_core_clock) { in mlx4_init_hca()
2097 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2105 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2110 if (dev->caps.dmfs_high_steer_mode != in mlx4_init_hca()
2115 if (dev->caps.dmfs_high_steer_mode == in mlx4_init_hca()
2117 dev->caps.dmfs_high_rate_qpn_base = in mlx4_init_hca()
2118 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_init_hca()
2119 dev->caps.dmfs_high_rate_qpn_range = in mlx4_init_hca()
2125 dev->caps.dmfs_high_steer_mode)); in mlx4_init_hca()
2160 dev->caps.rx_checksum_flags_port[1] = params.rx_csum_flags_port_1; in mlx4_init_hca()
2161 dev->caps.rx_checksum_flags_port[2] = params.rx_csum_flags_port_2; in mlx4_init_hca()
2173 kfree(dev->caps.qp0_qkey); in mlx4_init_hca()
2174 kfree(dev->caps.qp0_tunnel); in mlx4_init_hca()
2175 kfree(dev->caps.qp0_proxy); in mlx4_init_hca()
2176 kfree(dev->caps.qp1_tunnel); in mlx4_init_hca()
2177 kfree(dev->caps.qp1_proxy); in mlx4_init_hca()
2198 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in mlx4_init_counters_table()
2201 nent = dev->caps.max_counters; in mlx4_init_counters_table()
2214 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in __mlx4_counter_alloc()
2367 priv->eq_table.eq[dev->caps.num_comp_vectors].irq); in mlx4_setup_hca()
2371 priv->eq_table.eq[dev->caps.num_comp_vectors].irq); in mlx4_setup_hca()
2405 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_setup_hca()
2412 dev->caps.ib_port_def_cap[port] = ib_port_default_caps; in mlx4_setup_hca()
2426 dev->caps.port_ib_mtu[port] = IB_MTU_2048; in mlx4_setup_hca()
2428 dev->caps.port_ib_mtu[port] = IB_MTU_4096; in mlx4_setup_hca()
2431 dev->caps.pkey_table_len[port] : -1); in mlx4_setup_hca()
2491 int nreq = dev->caps.num_ports * num_online_cpus() + MSIX_LEGACY_SZ; in mlx4_enable_msi_x()
2493 nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs, in mlx4_enable_msi_x()
2510 dev->caps.num_ports * MIN_MSIX_P_PORT) { in mlx4_enable_msi_x()
2512 dev->caps.comp_pool = 0; in mlx4_enable_msi_x()
2513 dev->caps.num_comp_vectors = nreq - 1; in mlx4_enable_msi_x()
2515 dev->caps.comp_pool = nreq - MSIX_LEGACY_SZ; in mlx4_enable_msi_x()
2516 dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1; in mlx4_enable_msi_x()
2528 dev->caps.num_comp_vectors = 1; in mlx4_enable_msi_x()
2529 dev->caps.comp_pool = 0; in mlx4_enable_msi_x()
2602 int num_entries = dev->caps.num_ports; in mlx4_init_steering()
2622 int num_entries = dev->caps.num_ports; in mlx4_clear_steering()
3003 if (dev->caps.num_ports < 2 && in mlx4_load_one()
3008 dev->caps.num_ports); in mlx4_load_one()
3021 dev->caps.num_ports; in mlx4_load_one()
3060 dev->caps.num_comp_vectors = 1; in mlx4_load_one()
3061 dev->caps.comp_pool = 0; in mlx4_load_one()
3082 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_load_one()
3142 kfree(dev->caps.qp0_qkey); in mlx4_load_one()
3143 kfree(dev->caps.qp0_tunnel); in mlx4_load_one()
3144 kfree(dev->caps.qp0_proxy); in mlx4_load_one()
3145 kfree(dev->caps.qp1_tunnel); in mlx4_load_one()
3146 kfree(dev->caps.qp1_proxy); in mlx4_load_one()
3390 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_unload_one()
3391 dev->persist->curr_port_type[i] = dev->caps.port_type[i + 1]; in mlx4_unload_one()
3392 dev->persist->curr_port_poss_type[i] = dev->caps. in mlx4_unload_one()
3401 for (p = 1; p <= dev->caps.num_ports; p++) { in mlx4_unload_one()
3445 kfree(dev->caps.qp0_qkey); in mlx4_unload_one()
3446 kfree(dev->caps.qp0_tunnel); in mlx4_unload_one()
3447 kfree(dev->caps.qp0_proxy); in mlx4_unload_one()
3448 kfree(dev->caps.qp1_tunnel); in mlx4_unload_one()
3449 kfree(dev->caps.qp1_proxy); in mlx4_unload_one()
3507 for (i = 0; i < dev->caps.num_ports; i++) in restore_current_port_types()
3508 dev->caps.possible_type[i + 1] = poss_types[i]; in restore_current_port_types()