1183 	if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol))  in phy_reset()
1192 		miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in phy_reset()
1459 	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in phy_init()
1467 		if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {  in phy_init()
1519 	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in phy_init()
1523 	if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control))  in phy_init()
3316 	bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in nv_update_linkspeed()
4420 		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in nv_set_settings()
4431 			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);  in nv_set_settings()
4466 		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in nv_set_settings()
4479 			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);  in nv_set_settings()
4540 		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in nv_nway_reset()
4550 			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);  in nv_nway_reset()
4744 		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in nv_set_pauseparam()
4746 		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);  in nv_set_pauseparam()
4775 	miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in nv_set_loopback()
4785 		err = mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol);  in nv_set_loopback()
5359 	mii_rw(dev, np->phyaddr, MII_BMCR,  in nv_open()
5360 	       mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN);  in nv_open()
5560 		mii_rw(dev, np->phyaddr, MII_BMCR,  in nv_close()
5561 		       mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ)|BMCR_PDOWN);  in nv_close()
6060 		mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);  in nv_restore_phy()
6062 		mii_rw(dev, np->phyaddr, MII_BMCR, mii_control);  in nv_restore_phy()