Lines Matching refs:qdev
104 static int ql_sem_spinlock(struct ql3_adapter *qdev, in ql_sem_spinlock() argument
108 qdev->mem_map_registers; in ql_sem_spinlock()
123 static void ql_sem_unlock(struct ql3_adapter *qdev, u32 sem_mask) in ql_sem_unlock() argument
126 qdev->mem_map_registers; in ql_sem_unlock()
131 static int ql_sem_lock(struct ql3_adapter *qdev, u32 sem_mask, u32 sem_bits) in ql_sem_lock() argument
134 qdev->mem_map_registers; in ql_sem_lock()
145 static int ql_wait_for_drvr_lock(struct ql3_adapter *qdev) in ql_wait_for_drvr_lock() argument
150 if (ql_sem_lock(qdev, in ql_wait_for_drvr_lock()
152 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) in ql_wait_for_drvr_lock()
154 netdev_printk(KERN_DEBUG, qdev->ndev, in ql_wait_for_drvr_lock()
161 netdev_err(qdev->ndev, "Timed out waiting for driver lock...\n"); in ql_wait_for_drvr_lock()
165 static void ql_set_register_page(struct ql3_adapter *qdev, u32 page) in ql_set_register_page() argument
168 qdev->mem_map_registers; in ql_set_register_page()
173 qdev->current_page = page; in ql_set_register_page()
176 static u32 ql_read_common_reg_l(struct ql3_adapter *qdev, u32 __iomem *reg) in ql_read_common_reg_l() argument
181 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_read_common_reg_l()
183 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_read_common_reg_l()
188 static u32 ql_read_common_reg(struct ql3_adapter *qdev, u32 __iomem *reg) in ql_read_common_reg() argument
193 static u32 ql_read_page0_reg_l(struct ql3_adapter *qdev, u32 __iomem *reg) in ql_read_page0_reg_l() argument
198 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_read_page0_reg_l()
200 if (qdev->current_page != 0) in ql_read_page0_reg_l()
201 ql_set_register_page(qdev, 0); in ql_read_page0_reg_l()
204 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_read_page0_reg_l()
208 static u32 ql_read_page0_reg(struct ql3_adapter *qdev, u32 __iomem *reg) in ql_read_page0_reg() argument
210 if (qdev->current_page != 0) in ql_read_page0_reg()
211 ql_set_register_page(qdev, 0); in ql_read_page0_reg()
215 static void ql_write_common_reg_l(struct ql3_adapter *qdev, in ql_write_common_reg_l() argument
220 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_write_common_reg_l()
223 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_write_common_reg_l()
226 static void ql_write_common_reg(struct ql3_adapter *qdev, in ql_write_common_reg() argument
233 static void ql_write_nvram_reg(struct ql3_adapter *qdev, in ql_write_nvram_reg() argument
241 static void ql_write_page0_reg(struct ql3_adapter *qdev, in ql_write_page0_reg() argument
244 if (qdev->current_page != 0) in ql_write_page0_reg()
245 ql_set_register_page(qdev, 0); in ql_write_page0_reg()
253 static void ql_write_page1_reg(struct ql3_adapter *qdev, in ql_write_page1_reg() argument
256 if (qdev->current_page != 1) in ql_write_page1_reg()
257 ql_set_register_page(qdev, 1); in ql_write_page1_reg()
265 static void ql_write_page2_reg(struct ql3_adapter *qdev, in ql_write_page2_reg() argument
268 if (qdev->current_page != 2) in ql_write_page2_reg()
269 ql_set_register_page(qdev, 2); in ql_write_page2_reg()
274 static void ql_disable_interrupts(struct ql3_adapter *qdev) in ql_disable_interrupts() argument
277 qdev->mem_map_registers; in ql_disable_interrupts()
279 ql_write_common_reg_l(qdev, &port_regs->CommonRegs.ispInterruptMaskReg, in ql_disable_interrupts()
284 static void ql_enable_interrupts(struct ql3_adapter *qdev) in ql_enable_interrupts() argument
287 qdev->mem_map_registers; in ql_enable_interrupts()
289 ql_write_common_reg_l(qdev, &port_regs->CommonRegs.ispInterruptMaskReg, in ql_enable_interrupts()
294 static void ql_release_to_lrg_buf_free_list(struct ql3_adapter *qdev, in ql_release_to_lrg_buf_free_list() argument
301 if (qdev->lrg_buf_free_tail == NULL) { /* The list is empty */ in ql_release_to_lrg_buf_free_list()
302 qdev->lrg_buf_free_head = qdev->lrg_buf_free_tail = lrg_buf_cb; in ql_release_to_lrg_buf_free_list()
304 qdev->lrg_buf_free_tail->next = lrg_buf_cb; in ql_release_to_lrg_buf_free_list()
305 qdev->lrg_buf_free_tail = lrg_buf_cb; in ql_release_to_lrg_buf_free_list()
309 lrg_buf_cb->skb = netdev_alloc_skb(qdev->ndev, in ql_release_to_lrg_buf_free_list()
310 qdev->lrg_buffer_len); in ql_release_to_lrg_buf_free_list()
312 qdev->lrg_buf_skb_check++; in ql_release_to_lrg_buf_free_list()
319 map = pci_map_single(qdev->pdev, in ql_release_to_lrg_buf_free_list()
321 qdev->lrg_buffer_len - in ql_release_to_lrg_buf_free_list()
324 err = pci_dma_mapping_error(qdev->pdev, map); in ql_release_to_lrg_buf_free_list()
326 netdev_err(qdev->ndev, in ql_release_to_lrg_buf_free_list()
332 qdev->lrg_buf_skb_check++; in ql_release_to_lrg_buf_free_list()
342 qdev->lrg_buffer_len - in ql_release_to_lrg_buf_free_list()
347 qdev->lrg_buf_free_count++; in ql_release_to_lrg_buf_free_list()
351 *qdev) in ql_get_from_lrg_buf_free_list()
353 struct ql_rcv_buf_cb *lrg_buf_cb = qdev->lrg_buf_free_head; in ql_get_from_lrg_buf_free_list()
356 qdev->lrg_buf_free_head = lrg_buf_cb->next; in ql_get_from_lrg_buf_free_list()
357 if (qdev->lrg_buf_free_head == NULL) in ql_get_from_lrg_buf_free_list()
358 qdev->lrg_buf_free_tail = NULL; in ql_get_from_lrg_buf_free_list()
359 qdev->lrg_buf_free_count--; in ql_get_from_lrg_buf_free_list()
368 static void fm93c56a_deselect(struct ql3_adapter *qdev);
369 static void eeprom_readword(struct ql3_adapter *qdev, u32 eepromAddr,
375 static void fm93c56a_select(struct ql3_adapter *qdev) in fm93c56a_select() argument
378 qdev->mem_map_registers; in fm93c56a_select()
381 qdev->eeprom_cmd_data = AUBURN_EEPROM_CS_1; in fm93c56a_select()
382 ql_write_nvram_reg(qdev, spir, ISP_NVRAM_MASK | qdev->eeprom_cmd_data); in fm93c56a_select()
383 ql_write_nvram_reg(qdev, spir, in fm93c56a_select()
384 ((ISP_NVRAM_MASK << 16) | qdev->eeprom_cmd_data)); in fm93c56a_select()
390 static void fm93c56a_cmd(struct ql3_adapter *qdev, u32 cmd, u32 eepromAddr) in fm93c56a_cmd() argument
397 qdev->mem_map_registers; in fm93c56a_cmd()
401 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
402 (ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_cmd()
404 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
405 (ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_cmd()
407 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
408 (ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_cmd()
420 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
422 qdev->eeprom_cmd_data | dataBit)); in fm93c56a_cmd()
425 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
426 (ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_cmd()
428 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
429 (ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_cmd()
445 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
447 qdev->eeprom_cmd_data | dataBit)); in fm93c56a_cmd()
450 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
451 (ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_cmd()
453 ql_write_nvram_reg(qdev, spir, in fm93c56a_cmd()
454 (ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_cmd()
463 static void fm93c56a_deselect(struct ql3_adapter *qdev) in fm93c56a_deselect() argument
466 qdev->mem_map_registers; in fm93c56a_deselect()
469 qdev->eeprom_cmd_data = AUBURN_EEPROM_CS_0; in fm93c56a_deselect()
470 ql_write_nvram_reg(qdev, spir, ISP_NVRAM_MASK | qdev->eeprom_cmd_data); in fm93c56a_deselect()
476 static void fm93c56a_datain(struct ql3_adapter *qdev, unsigned short *value) in fm93c56a_datain() argument
482 qdev->mem_map_registers; in fm93c56a_datain()
488 ql_write_nvram_reg(qdev, spir, in fm93c56a_datain()
489 ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_datain()
491 ql_write_nvram_reg(qdev, spir, in fm93c56a_datain()
492 ISP_NVRAM_MASK | qdev->eeprom_cmd_data | in fm93c56a_datain()
494 dataBit = (ql_read_common_reg(qdev, spir) & in fm93c56a_datain()
504 static void eeprom_readword(struct ql3_adapter *qdev, in eeprom_readword() argument
507 fm93c56a_select(qdev); in eeprom_readword()
508 fm93c56a_cmd(qdev, (int)FM93C56A_READ, eepromAddr); in eeprom_readword()
509 fm93c56a_datain(qdev, value); in eeprom_readword()
510 fm93c56a_deselect(qdev); in eeprom_readword()
521 static int ql_get_nvram_params(struct ql3_adapter *qdev) in ql_get_nvram_params() argument
528 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_get_nvram_params()
530 pEEPROMData = (u16 *)&qdev->nvram_data; in ql_get_nvram_params()
531 qdev->eeprom_cmd_data = 0; in ql_get_nvram_params()
532 if (ql_sem_spinlock(qdev, QL_NVRAM_SEM_MASK, in ql_get_nvram_params()
533 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * in ql_get_nvram_params()
536 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_nvram_params()
541 eeprom_readword(qdev, index, pEEPROMData); in ql_get_nvram_params()
545 ql_sem_unlock(qdev, QL_NVRAM_SEM_MASK); in ql_get_nvram_params()
548 netdev_err(qdev->ndev, "checksum should be zero, is %x!!\n", in ql_get_nvram_params()
550 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_nvram_params()
554 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_nvram_params()
562 static int ql_wait_for_mii_ready(struct ql3_adapter *qdev) in ql_wait_for_mii_ready() argument
565 qdev->mem_map_registers; in ql_wait_for_mii_ready()
570 temp = ql_read_page0_reg(qdev, &port_regs->macMIIStatusReg); in ql_wait_for_mii_ready()
579 static void ql_mii_enable_scan_mode(struct ql3_adapter *qdev) in ql_mii_enable_scan_mode() argument
582 qdev->mem_map_registers; in ql_mii_enable_scan_mode()
585 if (qdev->numPorts > 1) { in ql_mii_enable_scan_mode()
598 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg, in ql_mii_enable_scan_mode()
601 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg, in ql_mii_enable_scan_mode()
606 static u8 ql_mii_disable_scan_mode(struct ql3_adapter *qdev) in ql_mii_disable_scan_mode() argument
610 qdev->mem_map_registers; in ql_mii_disable_scan_mode()
613 if (ql_read_page0_reg(qdev, &port_regs->macMIIMgmtControlReg) & in ql_mii_disable_scan_mode()
626 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg, in ql_mii_disable_scan_mode()
629 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg, in ql_mii_disable_scan_mode()
636 static int ql_mii_write_reg_ex(struct ql3_adapter *qdev, in ql_mii_write_reg_ex() argument
640 qdev->mem_map_registers; in ql_mii_write_reg_ex()
643 scanWasEnabled = ql_mii_disable_scan_mode(qdev); in ql_mii_write_reg_ex()
645 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_write_reg_ex()
646 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_write_reg_ex()
650 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg, in ql_mii_write_reg_ex()
653 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value); in ql_mii_write_reg_ex()
656 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_write_reg_ex()
657 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_write_reg_ex()
662 ql_mii_enable_scan_mode(qdev); in ql_mii_write_reg_ex()
667 static int ql_mii_read_reg_ex(struct ql3_adapter *qdev, u16 regAddr, in ql_mii_read_reg_ex() argument
671 qdev->mem_map_registers; in ql_mii_read_reg_ex()
675 scanWasEnabled = ql_mii_disable_scan_mode(qdev); in ql_mii_read_reg_ex()
677 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_read_reg_ex()
678 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_read_reg_ex()
682 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg, in ql_mii_read_reg_ex()
685 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg, in ql_mii_read_reg_ex()
688 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg, in ql_mii_read_reg_ex()
692 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_read_reg_ex()
693 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_read_reg_ex()
697 temp = ql_read_page0_reg(qdev, &port_regs->macMIIMgmtDataReg); in ql_mii_read_reg_ex()
701 ql_mii_enable_scan_mode(qdev); in ql_mii_read_reg_ex()
706 static int ql_mii_write_reg(struct ql3_adapter *qdev, u16 regAddr, u16 value) in ql_mii_write_reg() argument
709 qdev->mem_map_registers; in ql_mii_write_reg()
711 ql_mii_disable_scan_mode(qdev); in ql_mii_write_reg()
713 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_write_reg()
714 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_write_reg()
718 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg, in ql_mii_write_reg()
719 qdev->PHYAddr | regAddr); in ql_mii_write_reg()
721 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtDataReg, value); in ql_mii_write_reg()
724 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_write_reg()
725 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_write_reg()
729 ql_mii_enable_scan_mode(qdev); in ql_mii_write_reg()
734 static int ql_mii_read_reg(struct ql3_adapter *qdev, u16 regAddr, u16 *value) in ql_mii_read_reg() argument
738 qdev->mem_map_registers; in ql_mii_read_reg()
740 ql_mii_disable_scan_mode(qdev); in ql_mii_read_reg()
742 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_read_reg()
743 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_read_reg()
747 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtAddrReg, in ql_mii_read_reg()
748 qdev->PHYAddr | regAddr); in ql_mii_read_reg()
750 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg, in ql_mii_read_reg()
753 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg, in ql_mii_read_reg()
757 if (ql_wait_for_mii_ready(qdev)) { in ql_mii_read_reg()
758 netif_warn(qdev, link, qdev->ndev, TIMED_OUT_MSG); in ql_mii_read_reg()
762 temp = ql_read_page0_reg(qdev, &port_regs->macMIIMgmtDataReg); in ql_mii_read_reg()
765 ql_mii_enable_scan_mode(qdev); in ql_mii_read_reg()
770 static void ql_petbi_reset(struct ql3_adapter *qdev) in ql_petbi_reset() argument
772 ql_mii_write_reg(qdev, PETBI_CONTROL_REG, PETBI_CTRL_SOFT_RESET); in ql_petbi_reset()
775 static void ql_petbi_start_neg(struct ql3_adapter *qdev) in ql_petbi_start_neg() argument
780 ql_mii_read_reg(qdev, PETBI_TBI_CTRL, ®); in ql_petbi_start_neg()
782 ql_mii_write_reg(qdev, PETBI_TBI_CTRL, reg); in ql_petbi_start_neg()
784 ql_mii_write_reg(qdev, PETBI_NEG_ADVER, in ql_petbi_start_neg()
787 ql_mii_write_reg(qdev, PETBI_CONTROL_REG, in ql_petbi_start_neg()
793 static void ql_petbi_reset_ex(struct ql3_adapter *qdev) in ql_petbi_reset_ex() argument
795 ql_mii_write_reg_ex(qdev, PETBI_CONTROL_REG, PETBI_CTRL_SOFT_RESET, in ql_petbi_reset_ex()
796 PHYAddr[qdev->mac_index]); in ql_petbi_reset_ex()
799 static void ql_petbi_start_neg_ex(struct ql3_adapter *qdev) in ql_petbi_start_neg_ex() argument
804 ql_mii_read_reg_ex(qdev, PETBI_TBI_CTRL, ®, in ql_petbi_start_neg_ex()
805 PHYAddr[qdev->mac_index]); in ql_petbi_start_neg_ex()
807 ql_mii_write_reg_ex(qdev, PETBI_TBI_CTRL, reg, in ql_petbi_start_neg_ex()
808 PHYAddr[qdev->mac_index]); in ql_petbi_start_neg_ex()
810 ql_mii_write_reg_ex(qdev, PETBI_NEG_ADVER, in ql_petbi_start_neg_ex()
812 PHYAddr[qdev->mac_index]); in ql_petbi_start_neg_ex()
814 ql_mii_write_reg_ex(qdev, PETBI_CONTROL_REG, in ql_petbi_start_neg_ex()
817 PHYAddr[qdev->mac_index]); in ql_petbi_start_neg_ex()
820 static void ql_petbi_init(struct ql3_adapter *qdev) in ql_petbi_init() argument
822 ql_petbi_reset(qdev); in ql_petbi_init()
823 ql_petbi_start_neg(qdev); in ql_petbi_init()
826 static void ql_petbi_init_ex(struct ql3_adapter *qdev) in ql_petbi_init_ex() argument
828 ql_petbi_reset_ex(qdev); in ql_petbi_init_ex()
829 ql_petbi_start_neg_ex(qdev); in ql_petbi_init_ex()
832 static int ql_is_petbi_neg_pause(struct ql3_adapter *qdev) in ql_is_petbi_neg_pause() argument
836 if (ql_mii_read_reg(qdev, PETBI_NEG_PARTNER, ®) < 0) in ql_is_petbi_neg_pause()
842 static void phyAgereSpecificInit(struct ql3_adapter *qdev, u32 miiAddr) in phyAgereSpecificInit() argument
844 netdev_info(qdev->ndev, "enabling Agere specific PHY\n"); in phyAgereSpecificInit()
846 ql_mii_write_reg_ex(qdev, 0x00, 0x1940, miiAddr); in phyAgereSpecificInit()
848 ql_mii_write_reg_ex(qdev, 0x12, 0x840e, miiAddr); in phyAgereSpecificInit()
850 ql_mii_write_reg_ex(qdev, 0x10, 0x8805, miiAddr); in phyAgereSpecificInit()
852 ql_mii_write_reg_ex(qdev, 0x11, 0xf03e, miiAddr); in phyAgereSpecificInit()
854 ql_mii_write_reg_ex(qdev, 0x10, 0x8806, miiAddr); in phyAgereSpecificInit()
856 ql_mii_write_reg_ex(qdev, 0x11, 0x003e, miiAddr); in phyAgereSpecificInit()
858 ql_mii_write_reg_ex(qdev, 0x10, 0x8807, miiAddr); in phyAgereSpecificInit()
860 ql_mii_write_reg_ex(qdev, 0x11, 0x1f00, miiAddr); in phyAgereSpecificInit()
862 ql_mii_write_reg_ex(qdev, 0x10, 0x2806, miiAddr); in phyAgereSpecificInit()
864 ql_mii_write_reg_ex(qdev, 0x11, in phyAgereSpecificInit()
865 0x0020 | (PHYAddr[qdev->mac_index] >> 8), miiAddr); in phyAgereSpecificInit()
871 ql_mii_write_reg(qdev, 0x12, 0x840a); in phyAgereSpecificInit()
872 ql_mii_write_reg(qdev, 0x00, 0x1140); in phyAgereSpecificInit()
873 ql_mii_write_reg(qdev, 0x1c, 0xfaf0); in phyAgereSpecificInit()
876 static enum PHY_DEVICE_TYPE getPhyType(struct ql3_adapter *qdev, in getPhyType() argument
899 netdev_info(qdev->ndev, "Phy: %s\n", in getPhyType()
909 static int ql_phy_get_speed(struct ql3_adapter *qdev) in ql_phy_get_speed() argument
913 switch (qdev->phyType) { in ql_phy_get_speed()
915 if (ql_mii_read_reg(qdev, 0x1A, ®) < 0) in ql_phy_get_speed()
922 if (ql_mii_read_reg(qdev, AUX_CONTROL_STATUS, ®) < 0) in ql_phy_get_speed()
940 static int ql_is_full_dup(struct ql3_adapter *qdev) in ql_is_full_dup() argument
944 switch (qdev->phyType) { in ql_is_full_dup()
946 if (ql_mii_read_reg(qdev, 0x1A, ®)) in ql_is_full_dup()
953 if (ql_mii_read_reg(qdev, AUX_CONTROL_STATUS, ®) < 0) in ql_is_full_dup()
960 static int ql_is_phy_neg_pause(struct ql3_adapter *qdev) in ql_is_phy_neg_pause() argument
964 if (ql_mii_read_reg(qdev, PHY_NEG_PARTNER, ®) < 0) in ql_is_phy_neg_pause()
970 static int PHY_Setup(struct ql3_adapter *qdev) in PHY_Setup() argument
979 err = ql_mii_read_reg(qdev, PHY_ID_0_REG, ®1); in PHY_Setup()
981 netdev_err(qdev->ndev, "Could not read from reg PHY_ID_0_REG\n"); in PHY_Setup()
985 err = ql_mii_read_reg(qdev, PHY_ID_1_REG, ®2); in PHY_Setup()
987 netdev_err(qdev->ndev, "Could not read from reg PHY_ID_1_REG\n"); in PHY_Setup()
996 if (qdev->mac_index == 0) in PHY_Setup()
1001 err = ql_mii_read_reg_ex(qdev, PHY_ID_0_REG, ®1, miiAddr); in PHY_Setup()
1003 netdev_err(qdev->ndev, in PHY_Setup()
1008 err = ql_mii_read_reg_ex(qdev, PHY_ID_1_REG, ®2, miiAddr); in PHY_Setup()
1010 netdev_err(qdev->ndev, "Could not read from reg PHY_ID_1_REG after Agere detected\n"); in PHY_Setup()
1020 qdev->phyType = getPhyType(qdev, reg1, reg2); in PHY_Setup()
1022 if ((qdev->phyType == PHY_AGERE_ET1011C) && agereAddrChangeNeeded) { in PHY_Setup()
1024 phyAgereSpecificInit(qdev, miiAddr); in PHY_Setup()
1025 } else if (qdev->phyType == PHY_TYPE_UNKNOWN) { in PHY_Setup()
1026 netdev_err(qdev->ndev, "PHY is unknown\n"); in PHY_Setup()
1036 static void ql_mac_enable(struct ql3_adapter *qdev, u32 enable) in ql_mac_enable() argument
1039 qdev->mem_map_registers; in ql_mac_enable()
1047 if (qdev->mac_index) in ql_mac_enable()
1048 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value); in ql_mac_enable()
1050 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value); in ql_mac_enable()
1056 static void ql_mac_cfg_soft_reset(struct ql3_adapter *qdev, u32 enable) in ql_mac_cfg_soft_reset() argument
1059 qdev->mem_map_registers; in ql_mac_cfg_soft_reset()
1067 if (qdev->mac_index) in ql_mac_cfg_soft_reset()
1068 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value); in ql_mac_cfg_soft_reset()
1070 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value); in ql_mac_cfg_soft_reset()
1076 static void ql_mac_cfg_gig(struct ql3_adapter *qdev, u32 enable) in ql_mac_cfg_gig() argument
1079 qdev->mem_map_registers; in ql_mac_cfg_gig()
1087 if (qdev->mac_index) in ql_mac_cfg_gig()
1088 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value); in ql_mac_cfg_gig()
1090 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value); in ql_mac_cfg_gig()
1096 static void ql_mac_cfg_full_dup(struct ql3_adapter *qdev, u32 enable) in ql_mac_cfg_full_dup() argument
1099 qdev->mem_map_registers; in ql_mac_cfg_full_dup()
1107 if (qdev->mac_index) in ql_mac_cfg_full_dup()
1108 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value); in ql_mac_cfg_full_dup()
1110 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value); in ql_mac_cfg_full_dup()
1116 static void ql_mac_cfg_pause(struct ql3_adapter *qdev, u32 enable) in ql_mac_cfg_pause() argument
1119 qdev->mem_map_registers; in ql_mac_cfg_pause()
1129 if (qdev->mac_index) in ql_mac_cfg_pause()
1130 ql_write_page0_reg(qdev, &port_regs->mac1ConfigReg, value); in ql_mac_cfg_pause()
1132 ql_write_page0_reg(qdev, &port_regs->mac0ConfigReg, value); in ql_mac_cfg_pause()
1138 static int ql_is_fiber(struct ql3_adapter *qdev) in ql_is_fiber() argument
1141 qdev->mem_map_registers; in ql_is_fiber()
1145 switch (qdev->mac_index) { in ql_is_fiber()
1154 temp = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_is_fiber()
1158 static int ql_is_auto_cfg(struct ql3_adapter *qdev) in ql_is_auto_cfg() argument
1161 ql_mii_read_reg(qdev, 0x00, ®); in ql_is_auto_cfg()
1168 static int ql_is_auto_neg_complete(struct ql3_adapter *qdev) in ql_is_auto_neg_complete() argument
1171 qdev->mem_map_registers; in ql_is_auto_neg_complete()
1175 switch (qdev->mac_index) { in ql_is_auto_neg_complete()
1184 temp = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_is_auto_neg_complete()
1186 netif_info(qdev, link, qdev->ndev, "Auto-Negotiate complete\n"); in ql_is_auto_neg_complete()
1189 netif_info(qdev, link, qdev->ndev, "Auto-Negotiate incomplete\n"); in ql_is_auto_neg_complete()
1196 static int ql_is_neg_pause(struct ql3_adapter *qdev) in ql_is_neg_pause() argument
1198 if (ql_is_fiber(qdev)) in ql_is_neg_pause()
1199 return ql_is_petbi_neg_pause(qdev); in ql_is_neg_pause()
1201 return ql_is_phy_neg_pause(qdev); in ql_is_neg_pause()
1204 static int ql_auto_neg_error(struct ql3_adapter *qdev) in ql_auto_neg_error() argument
1207 qdev->mem_map_registers; in ql_auto_neg_error()
1211 switch (qdev->mac_index) { in ql_auto_neg_error()
1219 temp = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_auto_neg_error()
1223 static u32 ql_get_link_speed(struct ql3_adapter *qdev) in ql_get_link_speed() argument
1225 if (ql_is_fiber(qdev)) in ql_get_link_speed()
1228 return ql_phy_get_speed(qdev); in ql_get_link_speed()
1231 static int ql_is_link_full_dup(struct ql3_adapter *qdev) in ql_is_link_full_dup() argument
1233 if (ql_is_fiber(qdev)) in ql_is_link_full_dup()
1236 return ql_is_full_dup(qdev); in ql_is_link_full_dup()
1242 static int ql_link_down_detect(struct ql3_adapter *qdev) in ql_link_down_detect() argument
1245 qdev->mem_map_registers; in ql_link_down_detect()
1249 switch (qdev->mac_index) { in ql_link_down_detect()
1259 ql_read_common_reg(qdev, &port_regs->CommonRegs.ispControlStatus); in ql_link_down_detect()
1266 static int ql_link_down_detect_clear(struct ql3_adapter *qdev) in ql_link_down_detect_clear() argument
1269 qdev->mem_map_registers; in ql_link_down_detect_clear()
1271 switch (qdev->mac_index) { in ql_link_down_detect_clear()
1273 ql_write_common_reg(qdev, in ql_link_down_detect_clear()
1280 ql_write_common_reg(qdev, in ql_link_down_detect_clear()
1296 static int ql_this_adapter_controls_port(struct ql3_adapter *qdev) in ql_this_adapter_controls_port() argument
1299 qdev->mem_map_registers; in ql_this_adapter_controls_port()
1303 switch (qdev->mac_index) { in ql_this_adapter_controls_port()
1314 temp = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_this_adapter_controls_port()
1316 netif_printk(qdev, link, KERN_DEBUG, qdev->ndev, in ql_this_adapter_controls_port()
1321 netif_printk(qdev, link, KERN_DEBUG, qdev->ndev, "link master\n"); in ql_this_adapter_controls_port()
1325 static void ql_phy_reset_ex(struct ql3_adapter *qdev) in ql_phy_reset_ex() argument
1327 ql_mii_write_reg_ex(qdev, CONTROL_REG, PHY_CTRL_SOFT_RESET, in ql_phy_reset_ex()
1328 PHYAddr[qdev->mac_index]); in ql_phy_reset_ex()
1331 static void ql_phy_start_neg_ex(struct ql3_adapter *qdev) in ql_phy_start_neg_ex() argument
1336 if (qdev->phyType == PHY_AGERE_ET1011C) in ql_phy_start_neg_ex()
1337 ql_mii_write_reg(qdev, 0x13, 0x0000); in ql_phy_start_neg_ex()
1340 if (qdev->mac_index == 0) in ql_phy_start_neg_ex()
1342 qdev->nvram_data.macCfg_port0.portConfiguration; in ql_phy_start_neg_ex()
1345 qdev->nvram_data.macCfg_port1.portConfiguration; in ql_phy_start_neg_ex()
1353 ql_mii_read_reg_ex(qdev, PHY_GIG_CONTROL, ®, in ql_phy_start_neg_ex()
1354 PHYAddr[qdev->mac_index]); in ql_phy_start_neg_ex()
1364 ql_mii_write_reg_ex(qdev, PHY_GIG_CONTROL, reg, in ql_phy_start_neg_ex()
1365 PHYAddr[qdev->mac_index]); in ql_phy_start_neg_ex()
1368 ql_mii_read_reg_ex(qdev, PHY_NEG_ADVER, ®, in ql_phy_start_neg_ex()
1369 PHYAddr[qdev->mac_index]); in ql_phy_start_neg_ex()
1394 ql_mii_write_reg_ex(qdev, PHY_NEG_ADVER, reg, in ql_phy_start_neg_ex()
1395 PHYAddr[qdev->mac_index]); in ql_phy_start_neg_ex()
1397 ql_mii_read_reg_ex(qdev, CONTROL_REG, ®, PHYAddr[qdev->mac_index]); in ql_phy_start_neg_ex()
1399 ql_mii_write_reg_ex(qdev, CONTROL_REG, in ql_phy_start_neg_ex()
1401 PHYAddr[qdev->mac_index]); in ql_phy_start_neg_ex()
1404 static void ql_phy_init_ex(struct ql3_adapter *qdev) in ql_phy_init_ex() argument
1406 ql_phy_reset_ex(qdev); in ql_phy_init_ex()
1407 PHY_Setup(qdev); in ql_phy_init_ex()
1408 ql_phy_start_neg_ex(qdev); in ql_phy_init_ex()
1414 static u32 ql_get_link_state(struct ql3_adapter *qdev) in ql_get_link_state() argument
1417 qdev->mem_map_registers; in ql_get_link_state()
1421 switch (qdev->mac_index) { in ql_get_link_state()
1430 temp = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_get_link_state()
1439 static int ql_port_start(struct ql3_adapter *qdev) in ql_port_start() argument
1441 if (ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, in ql_port_start()
1442 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * in ql_port_start()
1444 netdev_err(qdev->ndev, "Could not get hw lock for GIO\n"); in ql_port_start()
1448 if (ql_is_fiber(qdev)) { in ql_port_start()
1449 ql_petbi_init(qdev); in ql_port_start()
1452 ql_phy_init_ex(qdev); in ql_port_start()
1455 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_port_start()
1459 static int ql_finish_auto_neg(struct ql3_adapter *qdev) in ql_finish_auto_neg() argument
1462 if (ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, in ql_finish_auto_neg()
1463 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * in ql_finish_auto_neg()
1467 if (!ql_auto_neg_error(qdev)) { in ql_finish_auto_neg()
1468 if (test_bit(QL_LINK_MASTER, &qdev->flags)) { in ql_finish_auto_neg()
1470 netif_printk(qdev, link, KERN_DEBUG, qdev->ndev, in ql_finish_auto_neg()
1472 ql_mac_cfg_soft_reset(qdev, 1); in ql_finish_auto_neg()
1473 ql_mac_cfg_gig(qdev, in ql_finish_auto_neg()
1475 (qdev) == in ql_finish_auto_neg()
1477 ql_mac_cfg_full_dup(qdev, in ql_finish_auto_neg()
1479 (qdev)); in ql_finish_auto_neg()
1480 ql_mac_cfg_pause(qdev, in ql_finish_auto_neg()
1482 (qdev)); in ql_finish_auto_neg()
1483 ql_mac_cfg_soft_reset(qdev, 0); in ql_finish_auto_neg()
1486 netif_printk(qdev, link, KERN_DEBUG, qdev->ndev, in ql_finish_auto_neg()
1488 ql_mac_enable(qdev, 1); in ql_finish_auto_neg()
1491 qdev->port_link_state = LS_UP; in ql_finish_auto_neg()
1492 netif_start_queue(qdev->ndev); in ql_finish_auto_neg()
1493 netif_carrier_on(qdev->ndev); in ql_finish_auto_neg()
1494 netif_info(qdev, link, qdev->ndev, in ql_finish_auto_neg()
1496 ql_get_link_speed(qdev), in ql_finish_auto_neg()
1497 ql_is_link_full_dup(qdev) ? "full" : "half"); in ql_finish_auto_neg()
1501 if (test_bit(QL_LINK_MASTER, &qdev->flags)) { in ql_finish_auto_neg()
1502 netif_printk(qdev, link, KERN_DEBUG, qdev->ndev, in ql_finish_auto_neg()
1508 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_finish_auto_neg()
1509 if (ql_port_start(qdev)) /* Restart port */ in ql_finish_auto_neg()
1514 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_finish_auto_neg()
1520 struct ql3_adapter *qdev = in ql_link_state_machine_work() local
1526 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_link_state_machine_work()
1528 curr_link_state = ql_get_link_state(qdev); in ql_link_state_machine_work()
1530 if (test_bit(QL_RESET_ACTIVE, &qdev->flags)) { in ql_link_state_machine_work()
1531 netif_info(qdev, link, qdev->ndev, in ql_link_state_machine_work()
1534 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_link_state_machine_work()
1537 mod_timer(&qdev->adapter_timer, jiffies + HZ * 1); in ql_link_state_machine_work()
1542 switch (qdev->port_link_state) { in ql_link_state_machine_work()
1544 if (test_bit(QL_LINK_MASTER, &qdev->flags)) in ql_link_state_machine_work()
1545 ql_port_start(qdev); in ql_link_state_machine_work()
1546 qdev->port_link_state = LS_DOWN; in ql_link_state_machine_work()
1551 netif_info(qdev, link, qdev->ndev, "Link is up\n"); in ql_link_state_machine_work()
1552 if (ql_is_auto_neg_complete(qdev)) in ql_link_state_machine_work()
1553 ql_finish_auto_neg(qdev); in ql_link_state_machine_work()
1555 if (qdev->port_link_state == LS_UP) in ql_link_state_machine_work()
1556 ql_link_down_detect_clear(qdev); in ql_link_state_machine_work()
1558 qdev->port_link_state = LS_UP; in ql_link_state_machine_work()
1568 netif_info(qdev, link, qdev->ndev, "Link is down\n"); in ql_link_state_machine_work()
1569 qdev->port_link_state = LS_DOWN; in ql_link_state_machine_work()
1571 if (ql_link_down_detect(qdev)) in ql_link_state_machine_work()
1572 qdev->port_link_state = LS_DOWN; in ql_link_state_machine_work()
1575 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_link_state_machine_work()
1578 mod_timer(&qdev->adapter_timer, jiffies + HZ * 1); in ql_link_state_machine_work()
1584 static void ql_get_phy_owner(struct ql3_adapter *qdev) in ql_get_phy_owner() argument
1586 if (ql_this_adapter_controls_port(qdev)) in ql_get_phy_owner()
1587 set_bit(QL_LINK_MASTER, &qdev->flags); in ql_get_phy_owner()
1589 clear_bit(QL_LINK_MASTER, &qdev->flags); in ql_get_phy_owner()
1595 static void ql_init_scan_mode(struct ql3_adapter *qdev) in ql_init_scan_mode() argument
1597 ql_mii_enable_scan_mode(qdev); in ql_init_scan_mode()
1599 if (test_bit(QL_LINK_OPTICAL, &qdev->flags)) { in ql_init_scan_mode()
1600 if (ql_this_adapter_controls_port(qdev)) in ql_init_scan_mode()
1601 ql_petbi_init_ex(qdev); in ql_init_scan_mode()
1603 if (ql_this_adapter_controls_port(qdev)) in ql_init_scan_mode()
1604 ql_phy_init_ex(qdev); in ql_init_scan_mode()
1614 static int ql_mii_setup(struct ql3_adapter *qdev) in ql_mii_setup() argument
1618 qdev->mem_map_registers; in ql_mii_setup()
1620 if (ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, in ql_mii_setup()
1621 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * in ql_mii_setup()
1625 if (qdev->device_id == QL3032_DEVICE_ID) in ql_mii_setup()
1626 ql_write_page0_reg(qdev, in ql_mii_setup()
1632 ql_write_page0_reg(qdev, &port_regs->macMIIMgmtControlReg, in ql_mii_setup()
1635 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_mii_setup()
1651 static u32 ql_supported_modes(struct ql3_adapter *qdev) in ql_supported_modes() argument
1653 if (test_bit(QL_LINK_OPTICAL, &qdev->flags)) in ql_supported_modes()
1659 static int ql_get_auto_cfg_status(struct ql3_adapter *qdev) in ql_get_auto_cfg_status() argument
1663 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_get_auto_cfg_status()
1664 if (ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, in ql_get_auto_cfg_status()
1666 (qdev->mac_index) * 2) << 7)) { in ql_get_auto_cfg_status()
1667 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_auto_cfg_status()
1670 status = ql_is_auto_cfg(qdev); in ql_get_auto_cfg_status()
1671 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_get_auto_cfg_status()
1672 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_auto_cfg_status()
1676 static u32 ql_get_speed(struct ql3_adapter *qdev) in ql_get_speed() argument
1680 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_get_speed()
1681 if (ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, in ql_get_speed()
1683 (qdev->mac_index) * 2) << 7)) { in ql_get_speed()
1684 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_speed()
1687 status = ql_get_link_speed(qdev); in ql_get_speed()
1688 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_get_speed()
1689 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_speed()
1693 static int ql_get_full_dup(struct ql3_adapter *qdev) in ql_get_full_dup() argument
1697 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_get_full_dup()
1698 if (ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, in ql_get_full_dup()
1700 (qdev->mac_index) * 2) << 7)) { in ql_get_full_dup()
1701 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_full_dup()
1704 status = ql_is_link_full_dup(qdev); in ql_get_full_dup()
1705 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_get_full_dup()
1706 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_get_full_dup()
1712 struct ql3_adapter *qdev = netdev_priv(ndev); in ql_get_settings() local
1715 ecmd->supported = ql_supported_modes(qdev); in ql_get_settings()
1717 if (test_bit(QL_LINK_OPTICAL, &qdev->flags)) { in ql_get_settings()
1721 ecmd->phy_address = qdev->PHYAddr; in ql_get_settings()
1723 ecmd->advertising = ql_supported_modes(qdev); in ql_get_settings()
1724 ecmd->autoneg = ql_get_auto_cfg_status(qdev); in ql_get_settings()
1725 ethtool_cmd_speed_set(ecmd, ql_get_speed(qdev)); in ql_get_settings()
1726 ecmd->duplex = ql_get_full_dup(qdev); in ql_get_settings()
1733 struct ql3_adapter *qdev = netdev_priv(ndev); in ql_get_drvinfo() local
1737 strlcpy(drvinfo->bus_info, pci_name(qdev->pdev), in ql_get_drvinfo()
1745 struct ql3_adapter *qdev = netdev_priv(ndev); in ql_get_msglevel() local
1746 return qdev->msg_enable; in ql_get_msglevel()
1751 struct ql3_adapter *qdev = netdev_priv(ndev); in ql_set_msglevel() local
1752 qdev->msg_enable = value; in ql_set_msglevel()
1758 struct ql3_adapter *qdev = netdev_priv(ndev); in ql_get_pauseparam() local
1760 qdev->mem_map_registers; in ql_get_pauseparam()
1763 if (qdev->mac_index == 0) in ql_get_pauseparam()
1764 reg = ql_read_page0_reg(qdev, &port_regs->mac0ConfigReg); in ql_get_pauseparam()
1766 reg = ql_read_page0_reg(qdev, &port_regs->mac1ConfigReg); in ql_get_pauseparam()
1768 pause->autoneg = ql_get_auto_cfg_status(qdev); in ql_get_pauseparam()
1782 static int ql_populate_free_queue(struct ql3_adapter *qdev) in ql_populate_free_queue() argument
1784 struct ql_rcv_buf_cb *lrg_buf_cb = qdev->lrg_buf_free_head; in ql_populate_free_queue()
1791 netdev_alloc_skb(qdev->ndev, in ql_populate_free_queue()
1792 qdev->lrg_buffer_len); in ql_populate_free_queue()
1794 netdev_printk(KERN_DEBUG, qdev->ndev, in ql_populate_free_queue()
1803 map = pci_map_single(qdev->pdev, in ql_populate_free_queue()
1805 qdev->lrg_buffer_len - in ql_populate_free_queue()
1809 err = pci_dma_mapping_error(qdev->pdev, map); in ql_populate_free_queue()
1811 netdev_err(qdev->ndev, in ql_populate_free_queue()
1826 qdev->lrg_buffer_len - in ql_populate_free_queue()
1828 --qdev->lrg_buf_skb_check; in ql_populate_free_queue()
1829 if (!qdev->lrg_buf_skb_check) in ql_populate_free_queue()
1841 static void ql_update_small_bufq_prod_index(struct ql3_adapter *qdev) in ql_update_small_bufq_prod_index() argument
1844 qdev->mem_map_registers; in ql_update_small_bufq_prod_index()
1846 if (qdev->small_buf_release_cnt >= 16) { in ql_update_small_bufq_prod_index()
1847 while (qdev->small_buf_release_cnt >= 16) { in ql_update_small_bufq_prod_index()
1848 qdev->small_buf_q_producer_index++; in ql_update_small_bufq_prod_index()
1850 if (qdev->small_buf_q_producer_index == in ql_update_small_bufq_prod_index()
1852 qdev->small_buf_q_producer_index = 0; in ql_update_small_bufq_prod_index()
1853 qdev->small_buf_release_cnt -= 8; in ql_update_small_bufq_prod_index()
1856 writel(qdev->small_buf_q_producer_index, in ql_update_small_bufq_prod_index()
1864 static void ql_update_lrg_bufq_prod_index(struct ql3_adapter *qdev) in ql_update_lrg_bufq_prod_index() argument
1870 qdev->mem_map_registers; in ql_update_lrg_bufq_prod_index()
1872 if ((qdev->lrg_buf_free_count >= 8) && in ql_update_lrg_bufq_prod_index()
1873 (qdev->lrg_buf_release_cnt >= 16)) { in ql_update_lrg_bufq_prod_index()
1875 if (qdev->lrg_buf_skb_check) in ql_update_lrg_bufq_prod_index()
1876 if (!ql_populate_free_queue(qdev)) in ql_update_lrg_bufq_prod_index()
1879 lrg_buf_q_ele = qdev->lrg_buf_next_free; in ql_update_lrg_bufq_prod_index()
1881 while ((qdev->lrg_buf_release_cnt >= 16) && in ql_update_lrg_bufq_prod_index()
1882 (qdev->lrg_buf_free_count >= 8)) { in ql_update_lrg_bufq_prod_index()
1886 ql_get_from_lrg_buf_free_list(qdev); in ql_update_lrg_bufq_prod_index()
1893 qdev->lrg_buf_release_cnt--; in ql_update_lrg_bufq_prod_index()
1896 qdev->lrg_buf_q_producer_index++; in ql_update_lrg_bufq_prod_index()
1898 if (qdev->lrg_buf_q_producer_index == in ql_update_lrg_bufq_prod_index()
1899 qdev->num_lbufq_entries) in ql_update_lrg_bufq_prod_index()
1900 qdev->lrg_buf_q_producer_index = 0; in ql_update_lrg_bufq_prod_index()
1902 if (qdev->lrg_buf_q_producer_index == in ql_update_lrg_bufq_prod_index()
1903 (qdev->num_lbufq_entries - 1)) { in ql_update_lrg_bufq_prod_index()
1904 lrg_buf_q_ele = qdev->lrg_buf_q_virt_addr; in ql_update_lrg_bufq_prod_index()
1908 qdev->lrg_buf_next_free = lrg_buf_q_ele; in ql_update_lrg_bufq_prod_index()
1909 writel(qdev->lrg_buf_q_producer_index, in ql_update_lrg_bufq_prod_index()
1914 static void ql_process_mac_tx_intr(struct ql3_adapter *qdev, in ql_process_mac_tx_intr() argument
1921 netdev_warn(qdev->ndev, in ql_process_mac_tx_intr()
1925 tx_cb = &qdev->tx_buf[mac_rsp->transaction_id]; in ql_process_mac_tx_intr()
1929 netdev_err(qdev->ndev, in ql_process_mac_tx_intr()
1932 qdev->ndev->stats.tx_errors++; in ql_process_mac_tx_intr()
1937 netdev_err(qdev->ndev, "tx_cb->seg_count == 0: %d\n", in ql_process_mac_tx_intr()
1940 qdev->ndev->stats.tx_errors++; in ql_process_mac_tx_intr()
1944 pci_unmap_single(qdev->pdev, in ql_process_mac_tx_intr()
1951 pci_unmap_page(qdev->pdev, in ql_process_mac_tx_intr()
1958 qdev->ndev->stats.tx_packets++; in ql_process_mac_tx_intr()
1959 qdev->ndev->stats.tx_bytes += tx_cb->skb->len; in ql_process_mac_tx_intr()
1966 atomic_inc(&qdev->tx_count); in ql_process_mac_tx_intr()
1969 static void ql_get_sbuf(struct ql3_adapter *qdev) in ql_get_sbuf() argument
1971 if (++qdev->small_buf_index == NUM_SMALL_BUFFERS) in ql_get_sbuf()
1972 qdev->small_buf_index = 0; in ql_get_sbuf()
1973 qdev->small_buf_release_cnt++; in ql_get_sbuf()
1976 static struct ql_rcv_buf_cb *ql_get_lbuf(struct ql3_adapter *qdev) in ql_get_lbuf() argument
1979 lrg_buf_cb = &qdev->lrg_buf[qdev->lrg_buf_index]; in ql_get_lbuf()
1980 qdev->lrg_buf_release_cnt++; in ql_get_lbuf()
1981 if (++qdev->lrg_buf_index == qdev->num_large_buffers) in ql_get_lbuf()
1982 qdev->lrg_buf_index = 0; in ql_get_lbuf()
1998 static void ql_process_mac_rx_intr(struct ql3_adapter *qdev, in ql_process_mac_rx_intr() argument
2009 ql_get_sbuf(qdev); in ql_process_mac_rx_intr()
2011 if (qdev->device_id == QL3022_DEVICE_ID) in ql_process_mac_rx_intr()
2012 lrg_buf_cb1 = ql_get_lbuf(qdev); in ql_process_mac_rx_intr()
2015 lrg_buf_cb2 = ql_get_lbuf(qdev); in ql_process_mac_rx_intr()
2018 qdev->ndev->stats.rx_packets++; in ql_process_mac_rx_intr()
2019 qdev->ndev->stats.rx_bytes += length; in ql_process_mac_rx_intr()
2022 pci_unmap_single(qdev->pdev, in ql_process_mac_rx_intr()
2028 skb->protocol = eth_type_trans(skb, qdev->ndev); in ql_process_mac_rx_intr()
2033 if (qdev->device_id == QL3022_DEVICE_ID) in ql_process_mac_rx_intr()
2034 ql_release_to_lrg_buf_free_list(qdev, lrg_buf_cb1); in ql_process_mac_rx_intr()
2035 ql_release_to_lrg_buf_free_list(qdev, lrg_buf_cb2); in ql_process_mac_rx_intr()
2038 static void ql_process_macip_rx_intr(struct ql3_adapter *qdev, in ql_process_macip_rx_intr() argument
2044 struct net_device *ndev = qdev->ndev; in ql_process_macip_rx_intr()
2052 ql_get_sbuf(qdev); in ql_process_macip_rx_intr()
2054 if (qdev->device_id == QL3022_DEVICE_ID) { in ql_process_macip_rx_intr()
2056 lrg_buf_cb1 = ql_get_lbuf(qdev); in ql_process_macip_rx_intr()
2064 lrg_buf_cb2 = ql_get_lbuf(qdev); in ql_process_macip_rx_intr()
2068 pci_unmap_single(qdev->pdev, in ql_process_macip_rx_intr()
2075 if (qdev->device_id == QL3022_DEVICE_ID) { in ql_process_macip_rx_intr()
2098 skb2->protocol = eth_type_trans(skb2, qdev->ndev); in ql_process_macip_rx_intr()
2105 if (qdev->device_id == QL3022_DEVICE_ID) in ql_process_macip_rx_intr()
2106 ql_release_to_lrg_buf_free_list(qdev, lrg_buf_cb1); in ql_process_macip_rx_intr()
2107 ql_release_to_lrg_buf_free_list(qdev, lrg_buf_cb2); in ql_process_macip_rx_intr()
2110 static int ql_tx_rx_clean(struct ql3_adapter *qdev, in ql_tx_rx_clean() argument
2114 struct net_device *ndev = qdev->ndev; in ql_tx_rx_clean()
2118 while ((le32_to_cpu(*(qdev->prsp_producer_index)) != in ql_tx_rx_clean()
2119 qdev->rsp_consumer_index) && (work_done < work_to_do)) { in ql_tx_rx_clean()
2121 net_rsp = qdev->rsp_current; in ql_tx_rx_clean()
2127 if (qdev->device_id == QL3032_DEVICE_ID) in ql_tx_rx_clean()
2133 ql_process_mac_tx_intr(qdev, (struct ob_mac_iocb_rsp *) in ql_tx_rx_clean()
2140 ql_process_mac_rx_intr(qdev, (struct ib_mac_iocb_rsp *) in ql_tx_rx_clean()
2147 ql_process_macip_rx_intr(qdev, (struct ib_ip_iocb_rsp *) in ql_tx_rx_clean()
2165 qdev->rsp_consumer_index++; in ql_tx_rx_clean()
2167 if (qdev->rsp_consumer_index == NUM_RSP_Q_ENTRIES) { in ql_tx_rx_clean()
2168 qdev->rsp_consumer_index = 0; in ql_tx_rx_clean()
2169 qdev->rsp_current = qdev->rsp_q_virt_addr; in ql_tx_rx_clean()
2171 qdev->rsp_current++; in ql_tx_rx_clean()
2182 struct ql3_adapter *qdev = container_of(napi, struct ql3_adapter, napi); in ql_poll() local
2186 qdev->mem_map_registers; in ql_poll()
2188 ql_tx_rx_clean(qdev, &tx_cleaned, &rx_cleaned, budget); in ql_poll()
2191 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_poll()
2193 ql_update_small_bufq_prod_index(qdev); in ql_poll()
2194 ql_update_lrg_bufq_prod_index(qdev); in ql_poll()
2195 writel(qdev->rsp_consumer_index, in ql_poll()
2197 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_poll()
2199 ql_enable_interrupts(qdev); in ql_poll()
2208 struct ql3_adapter *qdev = netdev_priv(ndev); in ql3xxx_isr() local
2210 qdev->mem_map_registers; in ql3xxx_isr()
2215 value = ql_read_common_reg_l(qdev, in ql3xxx_isr()
2219 spin_lock(&qdev->adapter_lock); in ql3xxx_isr()
2220 netif_stop_queue(qdev->ndev); in ql3xxx_isr()
2221 netif_carrier_off(qdev->ndev); in ql3xxx_isr()
2222 ql_disable_interrupts(qdev); in ql3xxx_isr()
2223 qdev->port_link_state = LS_DOWN; in ql3xxx_isr()
2224 set_bit(QL_RESET_ACTIVE, &qdev->flags) ; in ql3xxx_isr()
2231 ql_read_page0_reg_l(qdev, in ql3xxx_isr()
2236 set_bit(QL_RESET_START, &qdev->flags) ; in ql3xxx_isr()
2241 set_bit(QL_RESET_PER_SCSI, &qdev->flags) ; in ql3xxx_isr()
2246 queue_delayed_work(qdev->workqueue, &qdev->reset_work, 0); in ql3xxx_isr()
2247 spin_unlock(&qdev->adapter_lock); in ql3xxx_isr()
2249 ql_disable_interrupts(qdev); in ql3xxx_isr()
2250 if (likely(napi_schedule_prep(&qdev->napi))) in ql3xxx_isr()
2251 __napi_schedule(&qdev->napi); in ql3xxx_isr()
2265 static int ql_get_seg_count(struct ql3_adapter *qdev, unsigned short frags) in ql_get_seg_count() argument
2267 if (qdev->device_id == QL3022_DEVICE_ID) in ql_get_seg_count()
2305 static int ql_send_map(struct ql3_adapter *qdev, in ql_send_map() argument
2323 map = pci_map_single(qdev->pdev, skb->data, len, PCI_DMA_TODEVICE); in ql_send_map()
2325 err = pci_dma_mapping_error(qdev->pdev, map); in ql_send_map()
2327 netdev_err(qdev->ndev, "PCI mapping failed with error: %d\n", in ql_send_map()
2361 map = pci_map_single(qdev->pdev, oal, in ql_send_map()
2365 err = pci_dma_mapping_error(qdev->pdev, map); in ql_send_map()
2367 netdev_err(qdev->ndev, in ql_send_map()
2385 map = skb_frag_dma_map(&qdev->pdev->dev, frag, 0, skb_frag_size(frag), in ql_send_map()
2388 err = dma_mapping_error(&qdev->pdev->dev, map); in ql_send_map()
2390 netdev_err(qdev->ndev, in ql_send_map()
2427 pci_unmap_single(qdev->pdev, in ql_send_map()
2435 pci_unmap_page(qdev->pdev, in ql_send_map()
2441 pci_unmap_single(qdev->pdev, in ql_send_map()
2464 struct ql3_adapter *qdev = netdev_priv(ndev); in ql3xxx_send() local
2466 qdev->mem_map_registers; in ql3xxx_send()
2471 if (unlikely(atomic_read(&qdev->tx_count) < 2)) in ql3xxx_send()
2474 tx_cb = &qdev->tx_buf[qdev->req_producer_index]; in ql3xxx_send()
2475 tx_cb->seg_count = ql_get_seg_count(qdev, in ql3xxx_send()
2484 mac_iocb_ptr->opcode = qdev->mac_ob_opcode; in ql3xxx_send()
2486 mac_iocb_ptr->flags |= qdev->mb_bit_mask; in ql3xxx_send()
2487 mac_iocb_ptr->transaction_id = qdev->req_producer_index; in ql3xxx_send()
2490 if (qdev->device_id == QL3032_DEVICE_ID && in ql3xxx_send()
2494 if (ql_send_map(qdev, mac_iocb_ptr, tx_cb, skb) != NETDEV_TX_OK) { in ql3xxx_send()
2500 qdev->req_producer_index++; in ql3xxx_send()
2501 if (qdev->req_producer_index == NUM_REQ_Q_ENTRIES) in ql3xxx_send()
2502 qdev->req_producer_index = 0; in ql3xxx_send()
2504 ql_write_common_reg_l(qdev, in ql3xxx_send()
2506 qdev->req_producer_index); in ql3xxx_send()
2508 netif_printk(qdev, tx_queued, KERN_DEBUG, ndev, in ql3xxx_send()
2510 qdev->req_producer_index, skb->len); in ql3xxx_send()
2512 atomic_dec(&qdev->tx_count); in ql3xxx_send()
2516 static int ql_alloc_net_req_rsp_queues(struct ql3_adapter *qdev) in ql_alloc_net_req_rsp_queues() argument
2518 qdev->req_q_size = in ql_alloc_net_req_rsp_queues()
2521 qdev->rsp_q_size = NUM_RSP_Q_ENTRIES * sizeof(struct net_rsp_iocb); in ql_alloc_net_req_rsp_queues()
2528 qdev->req_q_virt_addr = in ql_alloc_net_req_rsp_queues()
2529 pci_alloc_consistent(qdev->pdev, in ql_alloc_net_req_rsp_queues()
2530 (size_t) qdev->req_q_size, in ql_alloc_net_req_rsp_queues()
2531 &qdev->req_q_phy_addr); in ql_alloc_net_req_rsp_queues()
2533 if ((qdev->req_q_virt_addr == NULL) || in ql_alloc_net_req_rsp_queues()
2534 LS_64BITS(qdev->req_q_phy_addr) & (qdev->req_q_size - 1)) { in ql_alloc_net_req_rsp_queues()
2535 netdev_err(qdev->ndev, "reqQ failed\n"); in ql_alloc_net_req_rsp_queues()
2539 qdev->rsp_q_virt_addr = in ql_alloc_net_req_rsp_queues()
2540 pci_alloc_consistent(qdev->pdev, in ql_alloc_net_req_rsp_queues()
2541 (size_t) qdev->rsp_q_size, in ql_alloc_net_req_rsp_queues()
2542 &qdev->rsp_q_phy_addr); in ql_alloc_net_req_rsp_queues()
2544 if ((qdev->rsp_q_virt_addr == NULL) || in ql_alloc_net_req_rsp_queues()
2545 LS_64BITS(qdev->rsp_q_phy_addr) & (qdev->rsp_q_size - 1)) { in ql_alloc_net_req_rsp_queues()
2546 netdev_err(qdev->ndev, "rspQ allocation failed\n"); in ql_alloc_net_req_rsp_queues()
2547 pci_free_consistent(qdev->pdev, (size_t) qdev->req_q_size, in ql_alloc_net_req_rsp_queues()
2548 qdev->req_q_virt_addr, in ql_alloc_net_req_rsp_queues()
2549 qdev->req_q_phy_addr); in ql_alloc_net_req_rsp_queues()
2553 set_bit(QL_ALLOC_REQ_RSP_Q_DONE, &qdev->flags); in ql_alloc_net_req_rsp_queues()
2558 static void ql_free_net_req_rsp_queues(struct ql3_adapter *qdev) in ql_free_net_req_rsp_queues() argument
2560 if (!test_bit(QL_ALLOC_REQ_RSP_Q_DONE, &qdev->flags)) { in ql_free_net_req_rsp_queues()
2561 netdev_info(qdev->ndev, "Already done\n"); in ql_free_net_req_rsp_queues()
2565 pci_free_consistent(qdev->pdev, in ql_free_net_req_rsp_queues()
2566 qdev->req_q_size, in ql_free_net_req_rsp_queues()
2567 qdev->req_q_virt_addr, qdev->req_q_phy_addr); in ql_free_net_req_rsp_queues()
2569 qdev->req_q_virt_addr = NULL; in ql_free_net_req_rsp_queues()
2571 pci_free_consistent(qdev->pdev, in ql_free_net_req_rsp_queues()
2572 qdev->rsp_q_size, in ql_free_net_req_rsp_queues()
2573 qdev->rsp_q_virt_addr, qdev->rsp_q_phy_addr); in ql_free_net_req_rsp_queues()
2575 qdev->rsp_q_virt_addr = NULL; in ql_free_net_req_rsp_queues()
2577 clear_bit(QL_ALLOC_REQ_RSP_Q_DONE, &qdev->flags); in ql_free_net_req_rsp_queues()
2580 static int ql_alloc_buffer_queues(struct ql3_adapter *qdev) in ql_alloc_buffer_queues() argument
2583 qdev->lrg_buf_q_size = in ql_alloc_buffer_queues()
2584 qdev->num_lbufq_entries * sizeof(struct lrg_buf_q_entry); in ql_alloc_buffer_queues()
2585 if (qdev->lrg_buf_q_size < PAGE_SIZE) in ql_alloc_buffer_queues()
2586 qdev->lrg_buf_q_alloc_size = PAGE_SIZE; in ql_alloc_buffer_queues()
2588 qdev->lrg_buf_q_alloc_size = qdev->lrg_buf_q_size * 2; in ql_alloc_buffer_queues()
2590 qdev->lrg_buf = kmalloc_array(qdev->num_large_buffers, in ql_alloc_buffer_queues()
2593 if (qdev->lrg_buf == NULL) in ql_alloc_buffer_queues()
2596 qdev->lrg_buf_q_alloc_virt_addr = in ql_alloc_buffer_queues()
2597 pci_alloc_consistent(qdev->pdev, in ql_alloc_buffer_queues()
2598 qdev->lrg_buf_q_alloc_size, in ql_alloc_buffer_queues()
2599 &qdev->lrg_buf_q_alloc_phy_addr); in ql_alloc_buffer_queues()
2601 if (qdev->lrg_buf_q_alloc_virt_addr == NULL) { in ql_alloc_buffer_queues()
2602 netdev_err(qdev->ndev, "lBufQ failed\n"); in ql_alloc_buffer_queues()
2605 qdev->lrg_buf_q_virt_addr = qdev->lrg_buf_q_alloc_virt_addr; in ql_alloc_buffer_queues()
2606 qdev->lrg_buf_q_phy_addr = qdev->lrg_buf_q_alloc_phy_addr; in ql_alloc_buffer_queues()
2609 qdev->small_buf_q_size = in ql_alloc_buffer_queues()
2611 if (qdev->small_buf_q_size < PAGE_SIZE) in ql_alloc_buffer_queues()
2612 qdev->small_buf_q_alloc_size = PAGE_SIZE; in ql_alloc_buffer_queues()
2614 qdev->small_buf_q_alloc_size = qdev->small_buf_q_size * 2; in ql_alloc_buffer_queues()
2616 qdev->small_buf_q_alloc_virt_addr = in ql_alloc_buffer_queues()
2617 pci_alloc_consistent(qdev->pdev, in ql_alloc_buffer_queues()
2618 qdev->small_buf_q_alloc_size, in ql_alloc_buffer_queues()
2619 &qdev->small_buf_q_alloc_phy_addr); in ql_alloc_buffer_queues()
2621 if (qdev->small_buf_q_alloc_virt_addr == NULL) { in ql_alloc_buffer_queues()
2622 netdev_err(qdev->ndev, "Small Buffer Queue allocation failed\n"); in ql_alloc_buffer_queues()
2623 pci_free_consistent(qdev->pdev, qdev->lrg_buf_q_alloc_size, in ql_alloc_buffer_queues()
2624 qdev->lrg_buf_q_alloc_virt_addr, in ql_alloc_buffer_queues()
2625 qdev->lrg_buf_q_alloc_phy_addr); in ql_alloc_buffer_queues()
2629 qdev->small_buf_q_virt_addr = qdev->small_buf_q_alloc_virt_addr; in ql_alloc_buffer_queues()
2630 qdev->small_buf_q_phy_addr = qdev->small_buf_q_alloc_phy_addr; in ql_alloc_buffer_queues()
2631 set_bit(QL_ALLOC_BUFQS_DONE, &qdev->flags); in ql_alloc_buffer_queues()
2635 static void ql_free_buffer_queues(struct ql3_adapter *qdev) in ql_free_buffer_queues() argument
2637 if (!test_bit(QL_ALLOC_BUFQS_DONE, &qdev->flags)) { in ql_free_buffer_queues()
2638 netdev_info(qdev->ndev, "Already done\n"); in ql_free_buffer_queues()
2641 kfree(qdev->lrg_buf); in ql_free_buffer_queues()
2642 pci_free_consistent(qdev->pdev, in ql_free_buffer_queues()
2643 qdev->lrg_buf_q_alloc_size, in ql_free_buffer_queues()
2644 qdev->lrg_buf_q_alloc_virt_addr, in ql_free_buffer_queues()
2645 qdev->lrg_buf_q_alloc_phy_addr); in ql_free_buffer_queues()
2647 qdev->lrg_buf_q_virt_addr = NULL; in ql_free_buffer_queues()
2649 pci_free_consistent(qdev->pdev, in ql_free_buffer_queues()
2650 qdev->small_buf_q_alloc_size, in ql_free_buffer_queues()
2651 qdev->small_buf_q_alloc_virt_addr, in ql_free_buffer_queues()
2652 qdev->small_buf_q_alloc_phy_addr); in ql_free_buffer_queues()
2654 qdev->small_buf_q_virt_addr = NULL; in ql_free_buffer_queues()
2656 clear_bit(QL_ALLOC_BUFQS_DONE, &qdev->flags); in ql_free_buffer_queues()
2659 static int ql_alloc_small_buffers(struct ql3_adapter *qdev) in ql_alloc_small_buffers() argument
2665 qdev->small_buf_total_size = in ql_alloc_small_buffers()
2669 qdev->small_buf_virt_addr = in ql_alloc_small_buffers()
2670 pci_alloc_consistent(qdev->pdev, in ql_alloc_small_buffers()
2671 qdev->small_buf_total_size, in ql_alloc_small_buffers()
2672 &qdev->small_buf_phy_addr); in ql_alloc_small_buffers()
2674 if (qdev->small_buf_virt_addr == NULL) { in ql_alloc_small_buffers()
2675 netdev_err(qdev->ndev, "Failed to get small buffer memory\n"); in ql_alloc_small_buffers()
2679 qdev->small_buf_phy_addr_low = LS_64BITS(qdev->small_buf_phy_addr); in ql_alloc_small_buffers()
2680 qdev->small_buf_phy_addr_high = MS_64BITS(qdev->small_buf_phy_addr); in ql_alloc_small_buffers()
2682 small_buf_q_entry = qdev->small_buf_q_virt_addr; in ql_alloc_small_buffers()
2687 cpu_to_le32(qdev->small_buf_phy_addr_high); in ql_alloc_small_buffers()
2689 cpu_to_le32(qdev->small_buf_phy_addr_low + in ql_alloc_small_buffers()
2693 qdev->small_buf_index = 0; in ql_alloc_small_buffers()
2694 set_bit(QL_ALLOC_SMALL_BUF_DONE, &qdev->flags); in ql_alloc_small_buffers()
2698 static void ql_free_small_buffers(struct ql3_adapter *qdev) in ql_free_small_buffers() argument
2700 if (!test_bit(QL_ALLOC_SMALL_BUF_DONE, &qdev->flags)) { in ql_free_small_buffers()
2701 netdev_info(qdev->ndev, "Already done\n"); in ql_free_small_buffers()
2704 if (qdev->small_buf_virt_addr != NULL) { in ql_free_small_buffers()
2705 pci_free_consistent(qdev->pdev, in ql_free_small_buffers()
2706 qdev->small_buf_total_size, in ql_free_small_buffers()
2707 qdev->small_buf_virt_addr, in ql_free_small_buffers()
2708 qdev->small_buf_phy_addr); in ql_free_small_buffers()
2710 qdev->small_buf_virt_addr = NULL; in ql_free_small_buffers()
2714 static void ql_free_large_buffers(struct ql3_adapter *qdev) in ql_free_large_buffers() argument
2719 for (i = 0; i < qdev->num_large_buffers; i++) { in ql_free_large_buffers()
2720 lrg_buf_cb = &qdev->lrg_buf[i]; in ql_free_large_buffers()
2723 pci_unmap_single(qdev->pdev, in ql_free_large_buffers()
2734 static void ql_init_large_buffers(struct ql3_adapter *qdev) in ql_init_large_buffers() argument
2738 struct bufq_addr_element *buf_addr_ele = qdev->lrg_buf_q_virt_addr; in ql_init_large_buffers()
2740 for (i = 0; i < qdev->num_large_buffers; i++) { in ql_init_large_buffers()
2741 lrg_buf_cb = &qdev->lrg_buf[i]; in ql_init_large_buffers()
2746 qdev->lrg_buf_index = 0; in ql_init_large_buffers()
2747 qdev->lrg_buf_skb_check = 0; in ql_init_large_buffers()
2750 static int ql_alloc_large_buffers(struct ql3_adapter *qdev) in ql_alloc_large_buffers() argument
2758 for (i = 0; i < qdev->num_large_buffers; i++) { in ql_alloc_large_buffers()
2759 skb = netdev_alloc_skb(qdev->ndev, in ql_alloc_large_buffers()
2760 qdev->lrg_buffer_len); in ql_alloc_large_buffers()
2763 netdev_err(qdev->ndev, in ql_alloc_large_buffers()
2765 qdev->lrg_buffer_len * 2, i); in ql_alloc_large_buffers()
2766 ql_free_large_buffers(qdev); in ql_alloc_large_buffers()
2770 lrg_buf_cb = &qdev->lrg_buf[i]; in ql_alloc_large_buffers()
2779 map = pci_map_single(qdev->pdev, in ql_alloc_large_buffers()
2781 qdev->lrg_buffer_len - in ql_alloc_large_buffers()
2785 err = pci_dma_mapping_error(qdev->pdev, map); in ql_alloc_large_buffers()
2787 netdev_err(qdev->ndev, in ql_alloc_large_buffers()
2790 ql_free_large_buffers(qdev); in ql_alloc_large_buffers()
2796 qdev->lrg_buffer_len - in ql_alloc_large_buffers()
2807 static void ql_free_send_free_list(struct ql3_adapter *qdev) in ql_free_send_free_list() argument
2812 tx_cb = &qdev->tx_buf[0]; in ql_free_send_free_list()
2820 static int ql_create_send_free_list(struct ql3_adapter *qdev) in ql_create_send_free_list() argument
2824 struct ob_mac_iocb_req *req_q_curr = qdev->req_q_virt_addr; in ql_create_send_free_list()
2829 tx_cb = &qdev->tx_buf[i]; in ql_create_send_free_list()
2840 static int ql_alloc_mem_resources(struct ql3_adapter *qdev) in ql_alloc_mem_resources() argument
2842 if (qdev->ndev->mtu == NORMAL_MTU_SIZE) { in ql_alloc_mem_resources()
2843 qdev->num_lbufq_entries = NUM_LBUFQ_ENTRIES; in ql_alloc_mem_resources()
2844 qdev->lrg_buffer_len = NORMAL_MTU_SIZE; in ql_alloc_mem_resources()
2845 } else if (qdev->ndev->mtu == JUMBO_MTU_SIZE) { in ql_alloc_mem_resources()
2849 qdev->num_lbufq_entries = JUMBO_NUM_LBUFQ_ENTRIES; in ql_alloc_mem_resources()
2850 qdev->lrg_buffer_len = JUMBO_MTU_SIZE; in ql_alloc_mem_resources()
2852 netdev_err(qdev->ndev, "Invalid mtu size: %d. Only %d and %d are accepted.\n", in ql_alloc_mem_resources()
2853 qdev->ndev->mtu, NORMAL_MTU_SIZE, JUMBO_MTU_SIZE); in ql_alloc_mem_resources()
2856 qdev->num_large_buffers = in ql_alloc_mem_resources()
2857 qdev->num_lbufq_entries * QL_ADDR_ELE_PER_BUFQ_ENTRY; in ql_alloc_mem_resources()
2858 qdev->lrg_buffer_len += VLAN_ETH_HLEN + VLAN_ID_LEN + QL_HEADER_SPACE; in ql_alloc_mem_resources()
2859 qdev->max_frame_size = in ql_alloc_mem_resources()
2860 (qdev->lrg_buffer_len - QL_HEADER_SPACE) + ETHERNET_CRC_SIZE; in ql_alloc_mem_resources()
2867 qdev->shadow_reg_virt_addr = in ql_alloc_mem_resources()
2868 pci_alloc_consistent(qdev->pdev, in ql_alloc_mem_resources()
2869 PAGE_SIZE, &qdev->shadow_reg_phy_addr); in ql_alloc_mem_resources()
2871 if (qdev->shadow_reg_virt_addr != NULL) { in ql_alloc_mem_resources()
2872 qdev->preq_consumer_index = qdev->shadow_reg_virt_addr; in ql_alloc_mem_resources()
2873 qdev->req_consumer_index_phy_addr_high = in ql_alloc_mem_resources()
2874 MS_64BITS(qdev->shadow_reg_phy_addr); in ql_alloc_mem_resources()
2875 qdev->req_consumer_index_phy_addr_low = in ql_alloc_mem_resources()
2876 LS_64BITS(qdev->shadow_reg_phy_addr); in ql_alloc_mem_resources()
2878 qdev->prsp_producer_index = in ql_alloc_mem_resources()
2879 (__le32 *) (((u8 *) qdev->preq_consumer_index) + 8); in ql_alloc_mem_resources()
2880 qdev->rsp_producer_index_phy_addr_high = in ql_alloc_mem_resources()
2881 qdev->req_consumer_index_phy_addr_high; in ql_alloc_mem_resources()
2882 qdev->rsp_producer_index_phy_addr_low = in ql_alloc_mem_resources()
2883 qdev->req_consumer_index_phy_addr_low + 8; in ql_alloc_mem_resources()
2885 netdev_err(qdev->ndev, "shadowReg Alloc failed\n"); in ql_alloc_mem_resources()
2889 if (ql_alloc_net_req_rsp_queues(qdev) != 0) { in ql_alloc_mem_resources()
2890 netdev_err(qdev->ndev, "ql_alloc_net_req_rsp_queues failed\n"); in ql_alloc_mem_resources()
2894 if (ql_alloc_buffer_queues(qdev) != 0) { in ql_alloc_mem_resources()
2895 netdev_err(qdev->ndev, "ql_alloc_buffer_queues failed\n"); in ql_alloc_mem_resources()
2899 if (ql_alloc_small_buffers(qdev) != 0) { in ql_alloc_mem_resources()
2900 netdev_err(qdev->ndev, "ql_alloc_small_buffers failed\n"); in ql_alloc_mem_resources()
2904 if (ql_alloc_large_buffers(qdev) != 0) { in ql_alloc_mem_resources()
2905 netdev_err(qdev->ndev, "ql_alloc_large_buffers failed\n"); in ql_alloc_mem_resources()
2910 ql_init_large_buffers(qdev); in ql_alloc_mem_resources()
2911 if (ql_create_send_free_list(qdev)) in ql_alloc_mem_resources()
2914 qdev->rsp_current = qdev->rsp_q_virt_addr; in ql_alloc_mem_resources()
2918 ql_free_send_free_list(qdev); in ql_alloc_mem_resources()
2920 ql_free_buffer_queues(qdev); in ql_alloc_mem_resources()
2922 ql_free_net_req_rsp_queues(qdev); in ql_alloc_mem_resources()
2924 pci_free_consistent(qdev->pdev, in ql_alloc_mem_resources()
2926 qdev->shadow_reg_virt_addr, in ql_alloc_mem_resources()
2927 qdev->shadow_reg_phy_addr); in ql_alloc_mem_resources()
2932 static void ql_free_mem_resources(struct ql3_adapter *qdev) in ql_free_mem_resources() argument
2934 ql_free_send_free_list(qdev); in ql_free_mem_resources()
2935 ql_free_large_buffers(qdev); in ql_free_mem_resources()
2936 ql_free_small_buffers(qdev); in ql_free_mem_resources()
2937 ql_free_buffer_queues(qdev); in ql_free_mem_resources()
2938 ql_free_net_req_rsp_queues(qdev); in ql_free_mem_resources()
2939 if (qdev->shadow_reg_virt_addr != NULL) { in ql_free_mem_resources()
2940 pci_free_consistent(qdev->pdev, in ql_free_mem_resources()
2942 qdev->shadow_reg_virt_addr, in ql_free_mem_resources()
2943 qdev->shadow_reg_phy_addr); in ql_free_mem_resources()
2944 qdev->shadow_reg_virt_addr = NULL; in ql_free_mem_resources()
2948 static int ql_init_misc_registers(struct ql3_adapter *qdev) in ql_init_misc_registers() argument
2951 (void __iomem *)qdev->mem_map_registers; in ql_init_misc_registers()
2953 if (ql_sem_spinlock(qdev, QL_DDR_RAM_SEM_MASK, in ql_init_misc_registers()
2954 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * in ql_init_misc_registers()
2958 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2959 &local_ram->bufletSize, qdev->nvram_data.bufletSize); in ql_init_misc_registers()
2961 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2963 qdev->nvram_data.bufletCount); in ql_init_misc_registers()
2965 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2967 (qdev->nvram_data.tcpWindowThreshold25 << 16) | in ql_init_misc_registers()
2968 (qdev->nvram_data.tcpWindowThreshold0)); in ql_init_misc_registers()
2970 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2972 qdev->nvram_data.tcpWindowThreshold50); in ql_init_misc_registers()
2974 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2976 (qdev->nvram_data.ipHashTableBaseHi << 16) | in ql_init_misc_registers()
2977 qdev->nvram_data.ipHashTableBaseLo); in ql_init_misc_registers()
2978 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2980 qdev->nvram_data.ipHashTableSize); in ql_init_misc_registers()
2981 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2983 (qdev->nvram_data.tcpHashTableBaseHi << 16) | in ql_init_misc_registers()
2984 qdev->nvram_data.tcpHashTableBaseLo); in ql_init_misc_registers()
2985 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2987 qdev->nvram_data.tcpHashTableSize); in ql_init_misc_registers()
2988 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2990 (qdev->nvram_data.ncbTableBaseHi << 16) | in ql_init_misc_registers()
2991 qdev->nvram_data.ncbTableBaseLo); in ql_init_misc_registers()
2992 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2994 qdev->nvram_data.ncbTableSize); in ql_init_misc_registers()
2995 ql_write_page2_reg(qdev, in ql_init_misc_registers()
2997 (qdev->nvram_data.drbTableBaseHi << 16) | in ql_init_misc_registers()
2998 qdev->nvram_data.drbTableBaseLo); in ql_init_misc_registers()
2999 ql_write_page2_reg(qdev, in ql_init_misc_registers()
3001 qdev->nvram_data.drbTableSize); in ql_init_misc_registers()
3002 ql_sem_unlock(qdev, QL_DDR_RAM_SEM_MASK); in ql_init_misc_registers()
3006 static int ql_adapter_initialize(struct ql3_adapter *qdev) in ql_adapter_initialize() argument
3010 qdev->mem_map_registers; in ql_adapter_initialize()
3017 if (ql_mii_setup(qdev)) in ql_adapter_initialize()
3021 ql_write_common_reg(qdev, spir, in ql_adapter_initialize()
3026 qdev->port_link_state = LS_DOWN; in ql_adapter_initialize()
3027 netif_carrier_off(qdev->ndev); in ql_adapter_initialize()
3030 ql_write_common_reg(qdev, spir, in ql_adapter_initialize()
3035 *((u32 *)(qdev->preq_consumer_index)) = 0; in ql_adapter_initialize()
3036 atomic_set(&qdev->tx_count, NUM_REQ_Q_ENTRIES); in ql_adapter_initialize()
3037 qdev->req_producer_index = 0; in ql_adapter_initialize()
3039 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3041 qdev->req_consumer_index_phy_addr_high); in ql_adapter_initialize()
3042 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3044 qdev->req_consumer_index_phy_addr_low); in ql_adapter_initialize()
3046 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3048 MS_64BITS(qdev->req_q_phy_addr)); in ql_adapter_initialize()
3049 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3051 LS_64BITS(qdev->req_q_phy_addr)); in ql_adapter_initialize()
3052 ql_write_page1_reg(qdev, &hmem_regs->reqLength, NUM_REQ_Q_ENTRIES); in ql_adapter_initialize()
3055 *((__le16 *) (qdev->prsp_producer_index)) = 0; in ql_adapter_initialize()
3056 qdev->rsp_consumer_index = 0; in ql_adapter_initialize()
3057 qdev->rsp_current = qdev->rsp_q_virt_addr; in ql_adapter_initialize()
3059 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3061 qdev->rsp_producer_index_phy_addr_high); in ql_adapter_initialize()
3063 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3065 qdev->rsp_producer_index_phy_addr_low); in ql_adapter_initialize()
3067 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3069 MS_64BITS(qdev->rsp_q_phy_addr)); in ql_adapter_initialize()
3071 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3073 LS_64BITS(qdev->rsp_q_phy_addr)); in ql_adapter_initialize()
3075 ql_write_page1_reg(qdev, &hmem_regs->rspLength, NUM_RSP_Q_ENTRIES); in ql_adapter_initialize()
3078 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3080 MS_64BITS(qdev->lrg_buf_q_phy_addr)); in ql_adapter_initialize()
3082 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3084 LS_64BITS(qdev->lrg_buf_q_phy_addr)); in ql_adapter_initialize()
3086 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3088 qdev->num_lbufq_entries); in ql_adapter_initialize()
3090 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3092 qdev->lrg_buffer_len); in ql_adapter_initialize()
3095 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3097 MS_64BITS(qdev->small_buf_q_phy_addr)); in ql_adapter_initialize()
3099 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3101 LS_64BITS(qdev->small_buf_q_phy_addr)); in ql_adapter_initialize()
3103 ql_write_page1_reg(qdev, &hmem_regs->rxSmallQLength, NUM_SBUFQ_ENTRIES); in ql_adapter_initialize()
3104 ql_write_page1_reg(qdev, in ql_adapter_initialize()
3108 qdev->small_buf_q_producer_index = NUM_SBUFQ_ENTRIES - 1; in ql_adapter_initialize()
3109 qdev->small_buf_release_cnt = 8; in ql_adapter_initialize()
3110 qdev->lrg_buf_q_producer_index = qdev->num_lbufq_entries - 1; in ql_adapter_initialize()
3111 qdev->lrg_buf_release_cnt = 8; in ql_adapter_initialize()
3112 qdev->lrg_buf_next_free = qdev->lrg_buf_q_virt_addr; in ql_adapter_initialize()
3113 qdev->small_buf_index = 0; in ql_adapter_initialize()
3114 qdev->lrg_buf_index = 0; in ql_adapter_initialize()
3115 qdev->lrg_buf_free_count = 0; in ql_adapter_initialize()
3116 qdev->lrg_buf_free_head = NULL; in ql_adapter_initialize()
3117 qdev->lrg_buf_free_tail = NULL; in ql_adapter_initialize()
3119 ql_write_common_reg(qdev, in ql_adapter_initialize()
3122 qdev->small_buf_q_producer_index); in ql_adapter_initialize()
3123 ql_write_common_reg(qdev, in ql_adapter_initialize()
3126 qdev->lrg_buf_q_producer_index); in ql_adapter_initialize()
3132 clear_bit(QL_LINK_MASTER, &qdev->flags); in ql_adapter_initialize()
3133 value = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_adapter_initialize()
3137 if (ql_init_misc_registers(qdev)) { in ql_adapter_initialize()
3142 value = qdev->nvram_data.tcpMaxWindowSize; in ql_adapter_initialize()
3143 ql_write_page0_reg(qdev, &port_regs->tcpMaxWindow, value); in ql_adapter_initialize()
3145 value = (0xFFFF << 16) | qdev->nvram_data.extHwConfig; in ql_adapter_initialize()
3147 if (ql_sem_spinlock(qdev, QL_FLASH_SEM_MASK, in ql_adapter_initialize()
3148 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) in ql_adapter_initialize()
3153 ql_write_page0_reg(qdev, &port_regs->ExternalHWConfig, value); in ql_adapter_initialize()
3154 ql_write_page0_reg(qdev, &port_regs->InternalChipConfig, in ql_adapter_initialize()
3158 ql_sem_unlock(qdev, QL_FLASH_SEM_MASK); in ql_adapter_initialize()
3161 if (qdev->mac_index) in ql_adapter_initialize()
3162 ql_write_page0_reg(qdev, in ql_adapter_initialize()
3164 qdev->max_frame_size); in ql_adapter_initialize()
3166 ql_write_page0_reg(qdev, in ql_adapter_initialize()
3168 qdev->max_frame_size); in ql_adapter_initialize()
3170 if (ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, in ql_adapter_initialize()
3171 (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * in ql_adapter_initialize()
3177 PHY_Setup(qdev); in ql_adapter_initialize()
3178 ql_init_scan_mode(qdev); in ql_adapter_initialize()
3179 ql_get_phy_owner(qdev); in ql_adapter_initialize()
3184 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg, in ql_adapter_initialize()
3186 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg, in ql_adapter_initialize()
3187 ((qdev->ndev->dev_addr[2] << 24) in ql_adapter_initialize()
3188 | (qdev->ndev->dev_addr[3] << 16) in ql_adapter_initialize()
3189 | (qdev->ndev->dev_addr[4] << 8) in ql_adapter_initialize()
3190 | qdev->ndev->dev_addr[5])); in ql_adapter_initialize()
3193 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg, in ql_adapter_initialize()
3195 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg, in ql_adapter_initialize()
3196 ((qdev->ndev->dev_addr[0] << 8) in ql_adapter_initialize()
3197 | qdev->ndev->dev_addr[1])); in ql_adapter_initialize()
3200 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg, in ql_adapter_initialize()
3205 ql_write_page0_reg(qdev, &port_regs->ipAddrIndexReg, in ql_adapter_initialize()
3207 (qdev->mac_index << 2))); in ql_adapter_initialize()
3208 ql_write_page0_reg(qdev, &port_regs->ipAddrDataReg, 0); in ql_adapter_initialize()
3210 ql_write_page0_reg(qdev, &port_regs->ipAddrIndexReg, in ql_adapter_initialize()
3212 ((qdev->mac_index << 2) + 1))); in ql_adapter_initialize()
3213 ql_write_page0_reg(qdev, &port_regs->ipAddrDataReg, 0); in ql_adapter_initialize()
3215 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); in ql_adapter_initialize()
3218 ql_write_page0_reg(qdev, in ql_adapter_initialize()
3223 value = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_adapter_initialize()
3226 spin_unlock_irq(&qdev->hw_lock); in ql_adapter_initialize()
3228 spin_lock_irq(&qdev->hw_lock); in ql_adapter_initialize()
3232 netdev_err(qdev->ndev, "Hw Initialization timeout\n"); in ql_adapter_initialize()
3238 if (qdev->device_id == QL3032_DEVICE_ID) { in ql_adapter_initialize()
3243 ql_write_page0_reg(qdev, &port_regs->functionControl, in ql_adapter_initialize()
3249 ql_write_page0_reg(qdev, &port_regs->portControl, in ql_adapter_initialize()
3261 static int ql_adapter_reset(struct ql3_adapter *qdev) in ql_adapter_reset() argument
3264 qdev->mem_map_registers; in ql_adapter_reset()
3269 set_bit(QL_RESET_ACTIVE, &qdev->flags); in ql_adapter_reset()
3270 clear_bit(QL_RESET_DONE, &qdev->flags); in ql_adapter_reset()
3275 netdev_printk(KERN_DEBUG, qdev->ndev, "Issue soft reset to chip\n"); in ql_adapter_reset()
3276 ql_write_common_reg(qdev, in ql_adapter_reset()
3281 netdev_printk(KERN_DEBUG, qdev->ndev, in ql_adapter_reset()
3288 ql_read_common_reg(qdev, in ql_adapter_reset()
3301 ql_read_common_reg(qdev, &port_regs->CommonRegs.ispControlStatus); in ql_adapter_reset()
3303 netdev_printk(KERN_DEBUG, qdev->ndev, in ql_adapter_reset()
3305 ql_write_common_reg(qdev, in ql_adapter_reset()
3313 ql_write_common_reg(qdev, in ql_adapter_reset()
3324 value = ql_read_common_reg(qdev, in ql_adapter_reset()
3335 clear_bit(QL_RESET_ACTIVE, &qdev->flags); in ql_adapter_reset()
3336 set_bit(QL_RESET_DONE, &qdev->flags); in ql_adapter_reset()
3340 static void ql_set_mac_info(struct ql3_adapter *qdev) in ql_set_mac_info() argument
3343 qdev->mem_map_registers; in ql_set_mac_info()
3349 ql_read_common_reg_l(qdev, &port_regs->CommonRegs.ispControlStatus); in ql_set_mac_info()
3351 port_status = ql_read_page0_reg(qdev, &port_regs->portStatus); in ql_set_mac_info()
3354 qdev->mac_index = 0; in ql_set_mac_info()
3355 qdev->mac_ob_opcode = OUTBOUND_MAC_IOCB | func_number; in ql_set_mac_info()
3356 qdev->mb_bit_mask = FN0_MA_BITS_MASK; in ql_set_mac_info()
3357 qdev->PHYAddr = PORT0_PHY_ADDRESS; in ql_set_mac_info()
3359 set_bit(QL_LINK_OPTICAL, &qdev->flags); in ql_set_mac_info()
3361 clear_bit(QL_LINK_OPTICAL, &qdev->flags); in ql_set_mac_info()
3365 qdev->mac_index = 1; in ql_set_mac_info()
3366 qdev->mac_ob_opcode = OUTBOUND_MAC_IOCB | func_number; in ql_set_mac_info()
3367 qdev->mb_bit_mask = FN1_MA_BITS_MASK; in ql_set_mac_info()
3368 qdev->PHYAddr = PORT1_PHY_ADDRESS; in ql_set_mac_info()
3370 set_bit(QL_LINK_OPTICAL, &qdev->flags); in ql_set_mac_info()
3372 clear_bit(QL_LINK_OPTICAL, &qdev->flags); in ql_set_mac_info()
3378 netdev_printk(KERN_DEBUG, qdev->ndev, in ql_set_mac_info()
3383 qdev->numPorts = qdev->nvram_data.version_and_numPorts >> 8; in ql_set_mac_info()
3388 struct ql3_adapter *qdev = netdev_priv(ndev); in ql_display_dev_info() local
3389 struct pci_dev *pdev = qdev->pdev; in ql_display_dev_info()
3393 DRV_NAME, qdev->index, qdev->chip_rev_id, in ql_display_dev_info()
3394 qdev->device_id == QL3032_DEVICE_ID ? "QLA3032" : "QLA3022", in ql_display_dev_info()
3395 qdev->pci_slot); in ql_display_dev_info()
3397 test_bit(QL_LINK_OPTICAL, &qdev->flags) ? "OPTICAL" : "COPPER"); in ql_display_dev_info()
3403 ((qdev->pci_width == 64) ? "64-bit" : "32-bit"), in ql_display_dev_info()
3404 ((qdev->pci_x) ? "PCI-X" : "PCI")); in ql_display_dev_info()
3407 qdev->mem_map_registers); in ql_display_dev_info()
3410 netif_info(qdev, probe, ndev, "MAC address %pM\n", ndev->dev_addr); in ql_display_dev_info()
3413 static int ql_adapter_down(struct ql3_adapter *qdev, int do_reset) in ql_adapter_down() argument
3415 struct net_device *ndev = qdev->ndev; in ql_adapter_down()
3421 clear_bit(QL_ADAPTER_UP, &qdev->flags); in ql_adapter_down()
3422 clear_bit(QL_LINK_MASTER, &qdev->flags); in ql_adapter_down()
3424 ql_disable_interrupts(qdev); in ql_adapter_down()
3426 free_irq(qdev->pdev->irq, ndev); in ql_adapter_down()
3428 if (qdev->msi && test_bit(QL_MSI_ENABLED, &qdev->flags)) { in ql_adapter_down()
3429 netdev_info(qdev->ndev, "calling pci_disable_msi()\n"); in ql_adapter_down()
3430 clear_bit(QL_MSI_ENABLED, &qdev->flags); in ql_adapter_down()
3431 pci_disable_msi(qdev->pdev); in ql_adapter_down()
3434 del_timer_sync(&qdev->adapter_timer); in ql_adapter_down()
3436 napi_disable(&qdev->napi); in ql_adapter_down()
3442 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_adapter_down()
3443 if (ql_wait_for_drvr_lock(qdev)) { in ql_adapter_down()
3444 soft_reset = ql_adapter_reset(qdev); in ql_adapter_down()
3447 qdev->index); in ql_adapter_down()
3456 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_adapter_down()
3458 ql_free_mem_resources(qdev); in ql_adapter_down()
3462 static int ql_adapter_up(struct ql3_adapter *qdev) in ql_adapter_up() argument
3464 struct net_device *ndev = qdev->ndev; in ql_adapter_up()
3469 if (ql_alloc_mem_resources(qdev)) { in ql_adapter_up()
3474 if (qdev->msi) { in ql_adapter_up()
3475 if (pci_enable_msi(qdev->pdev)) { in ql_adapter_up()
3478 qdev->msi = 0; in ql_adapter_up()
3481 set_bit(QL_MSI_ENABLED, &qdev->flags); in ql_adapter_up()
3486 err = request_irq(qdev->pdev->irq, ql3xxx_isr, in ql_adapter_up()
3491 qdev->pdev->irq); in ql_adapter_up()
3495 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_adapter_up()
3497 err = ql_wait_for_drvr_lock(qdev); in ql_adapter_up()
3499 err = ql_adapter_initialize(qdev); in ql_adapter_up()
3505 ql_sem_unlock(qdev, QL_DRVR_SEM_MASK); in ql_adapter_up()
3511 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_adapter_up()
3513 set_bit(QL_ADAPTER_UP, &qdev->flags); in ql_adapter_up()
3515 mod_timer(&qdev->adapter_timer, jiffies + HZ * 1); in ql_adapter_up()
3517 napi_enable(&qdev->napi); in ql_adapter_up()
3518 ql_enable_interrupts(qdev); in ql_adapter_up()
3522 ql_sem_unlock(qdev, QL_DRVR_SEM_MASK); in ql_adapter_up()
3524 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_adapter_up()
3525 free_irq(qdev->pdev->irq, ndev); in ql_adapter_up()
3527 if (qdev->msi && test_bit(QL_MSI_ENABLED, &qdev->flags)) { in ql_adapter_up()
3529 clear_bit(QL_MSI_ENABLED, &qdev->flags); in ql_adapter_up()
3530 pci_disable_msi(qdev->pdev); in ql_adapter_up()
3535 static int ql_cycle_adapter(struct ql3_adapter *qdev, int reset) in ql_cycle_adapter() argument
3537 if (ql_adapter_down(qdev, reset) || ql_adapter_up(qdev)) { in ql_cycle_adapter()
3538 netdev_err(qdev->ndev, in ql_cycle_adapter()
3541 dev_close(qdev->ndev); in ql_cycle_adapter()
3550 struct ql3_adapter *qdev = netdev_priv(ndev); in ql3xxx_close() local
3556 while (!test_bit(QL_ADAPTER_UP, &qdev->flags)) in ql3xxx_close()
3559 ql_adapter_down(qdev, QL_DO_RESET); in ql3xxx_close()
3565 struct ql3_adapter *qdev = netdev_priv(ndev); in ql3xxx_open() local
3566 return ql_adapter_up(qdev); in ql3xxx_open()
3571 struct ql3_adapter *qdev = netdev_priv(ndev); in ql3xxx_set_mac_address() local
3573 qdev->mem_map_registers; in ql3xxx_set_mac_address()
3585 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql3xxx_set_mac_address()
3587 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg, in ql3xxx_set_mac_address()
3589 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg, in ql3xxx_set_mac_address()
3595 ql_write_page0_reg(qdev, &port_regs->macAddrIndirectPtrReg, in ql3xxx_set_mac_address()
3597 ql_write_page0_reg(qdev, &port_regs->macAddrDataReg, in ql3xxx_set_mac_address()
3599 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql3xxx_set_mac_address()
3606 struct ql3_adapter *qdev = netdev_priv(ndev); in ql3xxx_tx_timeout() local
3617 queue_delayed_work(qdev->workqueue, &qdev->tx_timeout_work, 0); in ql3xxx_tx_timeout()
3622 struct ql3_adapter *qdev = in ql_reset_work() local
3624 struct net_device *ndev = qdev->ndev; in ql_reset_work()
3629 qdev->mem_map_registers; in ql_reset_work()
3632 if (test_bit((QL_RESET_PER_SCSI | QL_RESET_START), &qdev->flags)) { in ql_reset_work()
3633 clear_bit(QL_LINK_MASTER, &qdev->flags); in ql_reset_work()
3640 tx_cb = &qdev->tx_buf[i]; in ql_reset_work()
3644 pci_unmap_single(qdev->pdev, in ql_reset_work()
3650 pci_unmap_page(qdev->pdev, in ql_reset_work()
3663 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_reset_work()
3664 ql_write_common_reg(qdev, in ql_reset_work()
3673 value = ql_read_common_reg(qdev, in ql_reset_work()
3686 ql_write_common_reg(qdev, in ql_reset_work()
3694 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_reset_work()
3696 spin_lock_irqsave(&qdev->hw_lock, hw_flags); in ql_reset_work()
3698 spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); in ql_reset_work()
3709 clear_bit(QL_RESET_PER_SCSI, &qdev->flags); in ql_reset_work()
3710 clear_bit(QL_RESET_START, &qdev->flags); in ql_reset_work()
3711 ql_cycle_adapter(qdev, QL_DO_RESET); in ql_reset_work()
3715 clear_bit(QL_RESET_ACTIVE, &qdev->flags); in ql_reset_work()
3716 clear_bit(QL_RESET_PER_SCSI, &qdev->flags); in ql_reset_work()
3717 clear_bit(QL_RESET_START, &qdev->flags); in ql_reset_work()
3718 ql_cycle_adapter(qdev, QL_NO_RESET); in ql_reset_work()
3724 struct ql3_adapter *qdev = in ql_tx_timeout_work() local
3727 ql_cycle_adapter(qdev, QL_DO_RESET); in ql_tx_timeout_work()
3730 static void ql_get_board_info(struct ql3_adapter *qdev) in ql_get_board_info() argument
3733 qdev->mem_map_registers; in ql_get_board_info()
3736 value = ql_read_page0_reg_l(qdev, &port_regs->portStatus); in ql_get_board_info()
3738 qdev->chip_rev_id = ((value & PORT_STATUS_REV_ID_MASK) >> 12); in ql_get_board_info()
3740 qdev->pci_width = 64; in ql_get_board_info()
3742 qdev->pci_width = 32; in ql_get_board_info()
3744 qdev->pci_x = 1; in ql_get_board_info()
3746 qdev->pci_x = 0; in ql_get_board_info()
3747 qdev->pci_slot = (u8) PCI_SLOT(qdev->pdev->devfn); in ql_get_board_info()
3752 struct ql3_adapter *qdev = (struct ql3_adapter *)ptr; in ql3xxx_timer() local
3753 queue_delayed_work(qdev->workqueue, &qdev->link_state_work, 0); in ql3xxx_timer()
3770 struct ql3_adapter *qdev = NULL; in ql3xxx_probe() local
3811 qdev = netdev_priv(ndev); in ql3xxx_probe()
3812 qdev->index = cards_found; in ql3xxx_probe()
3813 qdev->ndev = ndev; in ql3xxx_probe()
3814 qdev->pdev = pdev; in ql3xxx_probe()
3815 qdev->device_id = pci_entry->device; in ql3xxx_probe()
3816 qdev->port_link_state = LS_DOWN; in ql3xxx_probe()
3818 qdev->msi = 1; in ql3xxx_probe()
3820 qdev->msg_enable = netif_msg_init(debug, default_msg); in ql3xxx_probe()
3824 if (qdev->device_id == QL3032_DEVICE_ID) in ql3xxx_probe()
3827 qdev->mem_map_registers = pci_ioremap_bar(pdev, 1); in ql3xxx_probe()
3828 if (!qdev->mem_map_registers) { in ql3xxx_probe()
3834 spin_lock_init(&qdev->adapter_lock); in ql3xxx_probe()
3835 spin_lock_init(&qdev->hw_lock); in ql3xxx_probe()
3842 netif_napi_add(ndev, &qdev->napi, ql_poll, 64); in ql3xxx_probe()
3847 if (ql_get_nvram_params(qdev)) { in ql3xxx_probe()
3849 __func__, qdev->index); in ql3xxx_probe()
3854 ql_set_mac_info(qdev); in ql3xxx_probe()
3857 if (qdev->mac_index) { in ql3xxx_probe()
3858 ndev->mtu = qdev->nvram_data.macCfg_port1.etherMtu_mac ; in ql3xxx_probe()
3859 ql_set_mac_addr(ndev, qdev->nvram_data.funcCfg_fn2.macAddress); in ql3xxx_probe()
3861 ndev->mtu = qdev->nvram_data.macCfg_port0.etherMtu_mac ; in ql3xxx_probe()
3862 ql_set_mac_addr(ndev, qdev->nvram_data.funcCfg_fn0.macAddress); in ql3xxx_probe()
3868 ql_get_board_info(qdev); in ql3xxx_probe()
3874 if (qdev->pci_x) in ql3xxx_probe()
3888 qdev->workqueue = create_singlethread_workqueue(ndev->name); in ql3xxx_probe()
3889 INIT_DELAYED_WORK(&qdev->reset_work, ql_reset_work); in ql3xxx_probe()
3890 INIT_DELAYED_WORK(&qdev->tx_timeout_work, ql_tx_timeout_work); in ql3xxx_probe()
3891 INIT_DELAYED_WORK(&qdev->link_state_work, ql_link_state_machine_work); in ql3xxx_probe()
3893 init_timer(&qdev->adapter_timer); in ql3xxx_probe()
3894 qdev->adapter_timer.function = ql3xxx_timer; in ql3xxx_probe()
3895 qdev->adapter_timer.expires = jiffies + HZ * 2; /* two second delay */ in ql3xxx_probe()
3896 qdev->adapter_timer.data = (unsigned long)qdev; in ql3xxx_probe()
3909 iounmap(qdev->mem_map_registers); in ql3xxx_probe()
3923 struct ql3_adapter *qdev = netdev_priv(ndev); in ql3xxx_remove() local
3927 ql_disable_interrupts(qdev); in ql3xxx_remove()
3929 if (qdev->workqueue) { in ql3xxx_remove()
3930 cancel_delayed_work(&qdev->reset_work); in ql3xxx_remove()
3931 cancel_delayed_work(&qdev->tx_timeout_work); in ql3xxx_remove()
3932 destroy_workqueue(qdev->workqueue); in ql3xxx_remove()
3933 qdev->workqueue = NULL; in ql3xxx_remove()
3936 iounmap(qdev->mem_map_registers); in ql3xxx_remove()