105 #define RTL_R8(reg)		readb (ioaddr + (reg))  macro
1377 	return RTL_R8(IBISR0) & 0x02;  in DECLARE_RTL_COND()
1384 	RTL_W8(IBCR2, RTL_R8(IBCR2) & ~0x01);  in rtl8168ep_stop_cmac()
1386 	RTL_W8(IBISR0, RTL_R8(IBISR0) | 0x20);  in rtl8168ep_stop_cmac()
1387 	RTL_W8(IBCR0, RTL_R8(IBCR0) & ~0x01);  in rtl8168ep_stop_cmac()
1560 	RTL_R8(ChipCmd);  in rtl8169_irq_mask_and_ack()
1582 	return RTL_R8(PHYstatus) & LinkStatus;  in rtl8169_xmii_link_ok()
1610 		if (RTL_R8(PHYstatus) & _1000bpsF) {  in rtl_link_chg_patch()
1615 		} else if (RTL_R8(PHYstatus) & _100bps) {  in rtl_link_chg_patch()
1633 		if (RTL_R8(PHYstatus) & _1000bpsF) {  in rtl_link_chg_patch()
1645 		if (RTL_R8(PHYstatus) & _10bps) {  in rtl_link_chg_patch()
1692 	options = RTL_R8(Config1);  in __rtl8169_get_wol()
1696 	options = RTL_R8(Config3);  in __rtl8169_get_wol()
1726 	options = RTL_R8(Config5);  in __rtl8169_get_wol()
1809 		options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;  in __rtl8169_set_wol()
1817 		options = RTL_R8(Config1) & ~PMEnable;  in __rtl8169_set_wol()
1823 		options = RTL_R8(Config2) & ~PME_SIGNAL;  in __rtl8169_set_wol()
2202 	if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)  in rtl8169_update_counters()
4328 	    (RTL_R8(PHYstatus) & TBI_Enable);  in rtl_tbi_enabled()
4580 		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);  in r810x_pll_power_down()
4601 		RTL_W8(PMCH, RTL_R8(PMCH) | 0xc0);  in r810x_pll_power_up()
4604 		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);  in r810x_pll_power_up()
4711 		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);  in r8168_pll_power_down()
4718 		RTL_W8(PMCH, RTL_R8(PMCH) & ~0x80);  in r8168_pll_power_down()
4735 		RTL_W8(PMCH, RTL_R8(PMCH) | 0x80);  in r8168_pll_power_up()
4742 		RTL_W8(PMCH, RTL_R8(PMCH) | 0xc0);  in r8168_pll_power_up()
4747 		RTL_W8(PMCH, RTL_R8(PMCH) | 0xc0);  in r8168_pll_power_up()
4916 	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);  in r8168c_hw_jumbo_enable()
4917 	RTL_W8(Config4, RTL_R8(Config4) | Jumbo_En1);  in r8168c_hw_jumbo_enable()
4925 	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);  in r8168c_hw_jumbo_disable()
4926 	RTL_W8(Config4, RTL_R8(Config4) & ~Jumbo_En1);  in r8168c_hw_jumbo_disable()
4934 	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);  in r8168dp_hw_jumbo_enable()
4941 	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);  in r8168dp_hw_jumbo_disable()
4949 	RTL_W8(Config3, RTL_R8(Config3) | Jumbo_En0);  in r8168e_hw_jumbo_enable()
4950 	RTL_W8(Config4, RTL_R8(Config4) | 0x01);  in r8168e_hw_jumbo_enable()
4959 	RTL_W8(Config3, RTL_R8(Config3) & ~Jumbo_En0);  in r8168e_hw_jumbo_disable()
4960 	RTL_W8(Config4, RTL_R8(Config4) & ~0x01);  in r8168e_hw_jumbo_disable()
4982 	RTL_W8(Config4, RTL_R8(Config4) | (1 << 0));  in r8168b_1_hw_jumbo_enable()
4991 	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));  in r8168b_1_hw_jumbo_disable()
5060 	return RTL_R8(ChipCmd) & CmdReset;  in DECLARE_RTL_COND()
5127 	return RTL_R8(TxPoll) & NPQ;  in DECLARE_RTL_COND()
5167 		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);  in rtl8169_hw_reset()
5170 		RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);  in rtl8169_hw_reset()
5240 	clk = RTL_R8(Config2) & PCI_Clock_66MHz;  in rtl8169_set_magic_reg()
5364 	RTL_R8(IntrMask);  in rtl_hw_start_8169()
5554 	data = RTL_R8(Config3);  in rtl_pcie_state_l2l3_enable()
5580 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8168bb()
5598 	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));  in rtl_hw_start_8168bef()
5606 	RTL_W8(Config1, RTL_R8(Config1) | Speed_down);  in __rtl_hw_start_8168cp()
5608 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in __rtl_hw_start_8168cp()
5642 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8168cp_2()
5657 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8168cp_3()
5809 	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);  in rtl_hw_start_8168e_1()
5842 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_start_8168e_2()
5845 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168e_2()
5847 	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);  in rtl_hw_start_8168e_2()
5849 	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);  in rtl_hw_start_8168e_2()
5877 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_start_8168f()
5878 	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);  in rtl_hw_start_8168f()
5880 	RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);  in rtl_hw_start_8168f()
5900 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168f_1()
5947 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168g()
5968 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168g_1()
5969 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168g_1()
5986 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168g_2()
5987 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168g_2()
6005 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8411_2()
6006 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8411_2()
6026 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168h_1()
6027 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168h_1()
6057 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168h_1()
6059 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8168h_1()
6060 	RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);  in rtl_hw_start_8168h_1()
6062 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~TX_10M_PS_EN);  in rtl_hw_start_8168h_1()
6140 	RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);  in rtl_hw_start_8168ep()
6144 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~TX_10M_PS_EN);  in rtl_hw_start_8168ep()
6161 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168ep_1()
6162 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168ep_1()
6178 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168ep_2()
6179 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168ep_2()
6184 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8168ep_2()
6185 	RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);  in rtl_hw_start_8168ep_2()
6200 	RTL_W8(Config2, RTL_R8(Config2) & ~ClkReqEn);  in rtl_hw_start_8168ep_3()
6201 	RTL_W8(Config5, RTL_R8(Config5) & ~ASPM_en);  in rtl_hw_start_8168ep_3()
6206 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8168ep_3()
6207 	RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);  in rtl_hw_start_8168ep_3()
6250 	RTL_R8(IntrMask);  in rtl_hw_start_8168()
6400 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8102e_1()
6402 	cfg1 = RTL_R8(Config1);  in rtl_hw_start_8102e_1()
6419 	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);  in rtl_hw_start_8102e_2()
6449 	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);  in rtl_hw_start_8105e_1()
6450 	RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);  in rtl_hw_start_8105e_1()
6477 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_start_8402()
6502 	RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);  in rtl_hw_start_8106()
6503 	RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);  in rtl_hw_start_8106()
6579 	RTL_R8(IntrMask);  in rtl_hw_start_8101()
7835 		RTL_R8(ChipCmd);  in rtl_wol_shutdown_quirk()
7963 	cfg2 = RTL_R8(Config2) & ~MSIEnable;  in rtl_try_msi()
7981 	return RTL_R8(MCU) & LINK_LIST_RDY;  in DECLARE_RTL_COND()
7988 	return (RTL_R8(MCU) & RXTX_EMPTY) == RXTX_EMPTY;  in DECLARE_RTL_COND()
8006 	RTL_W8(ChipCmd, RTL_R8(ChipCmd) & ~(CmdTxEnb | CmdRxEnb));  in rtl_hw_init_8168g()
8008 	RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);  in rtl_hw_init_8168g()
8182 	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);  in rtl_init_one()
8183 	RTL_W8(Config5, RTL_R8(Config5) & (BWF | MWF | UWF | LanWake | PMEStatus));  in rtl_init_one()
8204 		if ((RTL_R8(Config3) & LinkUp) != 0)  in rtl_init_one()
8208 		if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0)  in rtl_init_one()
8212 	if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)  in rtl_init_one()
8263 		dev->dev_addr[i] = RTL_R8(MAC0 + i);  in rtl_init_one()