103 #define RTL_W16(reg, val16)	writew ((val16), ioaddr + (reg))  macro
1526 	RTL_W16(IntrStatus, bits);  in rtl_ack_events()
1534 	RTL_W16(IntrMask, 0);  in rtl_irq_disable()
1542 	RTL_W16(IntrMask, bits);  in rtl_irq_enable()
2054 	RTL_W16(CPlusCmd, tp->cp_cmd);  in __rtl8169_set_features()
5214 	RTL_W16(CPlusCmd, cmd);  in rtl_rw_cpluscmd()
5221 	RTL_W16(RxMaxSize, rx_buf_sz + 1);  in rtl_set_rx_max_size()
5309 		RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);  in rtl_hw_start_8169()
5341 	RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl_hw_start_8169()
5349 	RTL_W16(IntrMitigate, 0x0000);  in rtl_hw_start_8169()
5371 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);  in rtl_hw_start_8169()
5582 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168bb()
5615 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in __rtl_hw_start_8168cp()
5647 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168cp_2()
5667 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168cp_3()
5728 	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);  in rtl_hw_start_8168d()
6236 	RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl_hw_start_8168()
6238 	RTL_W16(IntrMitigate, 0x5151);  in rtl_hw_start_8168()
6362 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);  in rtl_hw_start_8168()
6529 	RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl_hw_start_8101()
6573 	RTL_W16(IntrMitigate, 0x0000);  in rtl_hw_start_8101()
6581 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);  in rtl_hw_start_8101()
7179 		RTL_W16(CPlusCmd, tp->cp_cmd);  in rtl8169_pcierr_interrupt()