Lines Matching refs:lp
54 #define SMC_IO_SHIFT (lp->io_shift)
185 #define SMC_IO_SHIFT (lp->io_shift)
273 smc_pxa_dma_insl(a, lp, r, dev->dma, p, l)
275 smc_pxa_dma_insl(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma, in smc_pxa_dma_insl() argument
278 u_long physaddr = lp->physaddr; in smc_pxa_dma_insl()
295 dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE); in smc_pxa_dma_insl()
305 dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE); in smc_pxa_dma_insl()
312 smc_pxa_dma_insw(a, lp, r, dev->dma, p, l)
314 smc_pxa_dma_insw(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma, in smc_pxa_dma_insw() argument
317 u_long physaddr = lp->physaddr; in smc_pxa_dma_insw()
334 dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE); in smc_pxa_dma_insw()
344 dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE); in smc_pxa_dma_insw()
450 #define TCR_REG(lp) SMC_REG(lp, 0x0000, 0) argument
469 #define EPH_STATUS_REG(lp) SMC_REG(lp, 0x0002, 0) argument
488 #define RCR_REG(lp) SMC_REG(lp, 0x0004, 0) argument
505 #define COUNTER_REG(lp) SMC_REG(lp, 0x0006, 0) argument
510 #define MIR_REG(lp) SMC_REG(lp, 0x0008, 0) argument
515 #define RPC_REG(lp) SMC_REG(lp, 0x000A, 0) argument
541 #define CONFIG_REG(lp) SMC_REG(lp, 0x0000, 1) argument
553 #define BASE_REG(lp) SMC_REG(lp, 0x0002, 1) argument
558 #define ADDR0_REG(lp) SMC_REG(lp, 0x0004, 1) argument
559 #define ADDR1_REG(lp) SMC_REG(lp, 0x0006, 1) argument
560 #define ADDR2_REG(lp) SMC_REG(lp, 0x0008, 1) argument
565 #define GP_REG(lp) SMC_REG(lp, 0x000A, 1) argument
570 #define CTL_REG(lp) SMC_REG(lp, 0x000C, 1) argument
583 #define MMU_CMD_REG(lp) SMC_REG(lp, 0x0000, 2) argument
597 #define PN_REG(lp) SMC_REG(lp, 0x0002, 2) argument
602 #define AR_REG(lp) SMC_REG(lp, 0x0003, 2) argument
608 #define TXFIFO_REG(lp) SMC_REG(lp, 0x0004, 2) argument
613 #define RXFIFO_REG(lp) SMC_REG(lp, 0x0005, 2) argument
616 #define FIFO_REG(lp) SMC_REG(lp, 0x0004, 2) argument
620 #define PTR_REG(lp) SMC_REG(lp, 0x0006, 2) argument
628 #define DATA_REG(lp) SMC_REG(lp, 0x0008, 2) argument
633 #define INT_REG(lp) SMC_REG(lp, 0x000C, 2) argument
638 #define IM_REG(lp) SMC_REG(lp, 0x000D, 2) argument
651 #define MCAST_REG1(lp) SMC_REG(lp, 0x0000, 3) argument
652 #define MCAST_REG2(lp) SMC_REG(lp, 0x0002, 3) argument
653 #define MCAST_REG3(lp) SMC_REG(lp, 0x0004, 3) argument
654 #define MCAST_REG4(lp) SMC_REG(lp, 0x0006, 3) argument
659 #define MII_REG(lp) SMC_REG(lp, 0x0008, 3) argument
670 #define REV_REG(lp) SMC_REG(lp, 0x000A, 3) argument
676 #define ERCV_REG(lp) SMC_REG(lp, 0x000C, 3) argument
683 #define EXT_REG(lp) SMC_REG(lp, 0x0000, 7) argument
807 #define SMC_REG(lp, reg, bank) \ argument
809 int __b = SMC_CURRENT_BANK(lp); \
818 #define SMC_REG(lp, reg, bank) (reg<<SMC_IO_SHIFT) argument
830 #define SMC_MUST_ALIGN_WRITE(lp) SMC_32BIT(lp) argument
832 #define SMC_GET_PN(lp) \ argument
833 (SMC_8BIT(lp) ? (SMC_inb(ioaddr, PN_REG(lp))) \
834 : (SMC_inw(ioaddr, PN_REG(lp)) & 0xFF))
836 #define SMC_SET_PN(lp, x) \ argument
838 if (SMC_MUST_ALIGN_WRITE(lp)) \
839 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 0, 2)); \
840 else if (SMC_8BIT(lp)) \
841 SMC_outb(x, ioaddr, PN_REG(lp)); \
843 SMC_outw(x, ioaddr, PN_REG(lp)); \
846 #define SMC_GET_AR(lp) \ argument
847 (SMC_8BIT(lp) ? (SMC_inb(ioaddr, AR_REG(lp))) \
848 : (SMC_inw(ioaddr, PN_REG(lp)) >> 8))
850 #define SMC_GET_TXFIFO(lp) \ argument
851 (SMC_8BIT(lp) ? (SMC_inb(ioaddr, TXFIFO_REG(lp))) \
852 : (SMC_inw(ioaddr, TXFIFO_REG(lp)) & 0xFF))
854 #define SMC_GET_RXFIFO(lp) \ argument
855 (SMC_8BIT(lp) ? (SMC_inb(ioaddr, RXFIFO_REG(lp))) \
856 : (SMC_inw(ioaddr, TXFIFO_REG(lp)) >> 8))
858 #define SMC_GET_INT(lp) \ argument
859 (SMC_8BIT(lp) ? (SMC_inb(ioaddr, INT_REG(lp))) \
860 : (SMC_inw(ioaddr, INT_REG(lp)) & 0xFF))
862 #define SMC_ACK_INT(lp, x) \ argument
864 if (SMC_8BIT(lp)) \
865 SMC_outb(x, ioaddr, INT_REG(lp)); \
870 __mask = SMC_inw(ioaddr, INT_REG(lp)) & ~0xff; \
871 SMC_outw(__mask | (x), ioaddr, INT_REG(lp)); \
876 #define SMC_GET_INT_MASK(lp) \ argument
877 (SMC_8BIT(lp) ? (SMC_inb(ioaddr, IM_REG(lp))) \
878 : (SMC_inw(ioaddr, INT_REG(lp)) >> 8))
880 #define SMC_SET_INT_MASK(lp, x) \ argument
882 if (SMC_8BIT(lp)) \
883 SMC_outb(x, ioaddr, IM_REG(lp)); \
885 SMC_outw((x) << 8, ioaddr, INT_REG(lp)); \
888 #define SMC_CURRENT_BANK(lp) SMC_inw(ioaddr, BANK_SELECT) argument
890 #define SMC_SELECT_BANK(lp, x) \ argument
892 if (SMC_MUST_ALIGN_WRITE(lp)) \
898 #define SMC_GET_BASE(lp) SMC_inw(ioaddr, BASE_REG(lp)) argument
900 #define SMC_SET_BASE(lp, x) SMC_outw(x, ioaddr, BASE_REG(lp)) argument
902 #define SMC_GET_CONFIG(lp) SMC_inw(ioaddr, CONFIG_REG(lp)) argument
904 #define SMC_SET_CONFIG(lp, x) SMC_outw(x, ioaddr, CONFIG_REG(lp)) argument
906 #define SMC_GET_COUNTER(lp) SMC_inw(ioaddr, COUNTER_REG(lp)) argument
908 #define SMC_GET_CTL(lp) SMC_inw(ioaddr, CTL_REG(lp)) argument
910 #define SMC_SET_CTL(lp, x) SMC_outw(x, ioaddr, CTL_REG(lp)) argument
912 #define SMC_GET_MII(lp) SMC_inw(ioaddr, MII_REG(lp)) argument
914 #define SMC_GET_GP(lp) SMC_inw(ioaddr, GP_REG(lp)) argument
916 #define SMC_SET_GP(lp, x) \ argument
918 if (SMC_MUST_ALIGN_WRITE(lp)) \
919 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 1)); \
921 SMC_outw(x, ioaddr, GP_REG(lp)); \
924 #define SMC_SET_MII(lp, x) SMC_outw(x, ioaddr, MII_REG(lp)) argument
926 #define SMC_GET_MIR(lp) SMC_inw(ioaddr, MIR_REG(lp)) argument
928 #define SMC_SET_MIR(lp, x) SMC_outw(x, ioaddr, MIR_REG(lp)) argument
930 #define SMC_GET_MMU_CMD(lp) SMC_inw(ioaddr, MMU_CMD_REG(lp)) argument
932 #define SMC_SET_MMU_CMD(lp, x) SMC_outw(x, ioaddr, MMU_CMD_REG(lp)) argument
934 #define SMC_GET_FIFO(lp) SMC_inw(ioaddr, FIFO_REG(lp)) argument
936 #define SMC_GET_PTR(lp) SMC_inw(ioaddr, PTR_REG(lp)) argument
938 #define SMC_SET_PTR(lp, x) \ argument
940 if (SMC_MUST_ALIGN_WRITE(lp)) \
941 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 4, 2)); \
943 SMC_outw(x, ioaddr, PTR_REG(lp)); \
946 #define SMC_GET_EPH_STATUS(lp) SMC_inw(ioaddr, EPH_STATUS_REG(lp)) argument
948 #define SMC_GET_RCR(lp) SMC_inw(ioaddr, RCR_REG(lp)) argument
950 #define SMC_SET_RCR(lp, x) SMC_outw(x, ioaddr, RCR_REG(lp)) argument
952 #define SMC_GET_REV(lp) SMC_inw(ioaddr, REV_REG(lp)) argument
954 #define SMC_GET_RPC(lp) SMC_inw(ioaddr, RPC_REG(lp)) argument
956 #define SMC_SET_RPC(lp, x) \ argument
958 if (SMC_MUST_ALIGN_WRITE(lp)) \
959 SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 0)); \
961 SMC_outw(x, ioaddr, RPC_REG(lp)); \
964 #define SMC_GET_TCR(lp) SMC_inw(ioaddr, TCR_REG(lp)) argument
966 #define SMC_SET_TCR(lp, x) SMC_outw(x, ioaddr, TCR_REG(lp)) argument
969 #define SMC_GET_MAC_ADDR(lp, addr) \ argument
972 __v = SMC_inw(ioaddr, ADDR0_REG(lp)); \
974 __v = SMC_inw(ioaddr, ADDR1_REG(lp)); \
976 __v = SMC_inw(ioaddr, ADDR2_REG(lp)); \
981 #define SMC_SET_MAC_ADDR(lp, addr) \ argument
983 SMC_outw(addr[0]|(addr[1] << 8), ioaddr, ADDR0_REG(lp)); \
984 SMC_outw(addr[2]|(addr[3] << 8), ioaddr, ADDR1_REG(lp)); \
985 SMC_outw(addr[4]|(addr[5] << 8), ioaddr, ADDR2_REG(lp)); \
988 #define SMC_SET_MCAST(lp, x) \ argument
991 SMC_outw(mt[0] | (mt[1] << 8), ioaddr, MCAST_REG1(lp)); \
992 SMC_outw(mt[2] | (mt[3] << 8), ioaddr, MCAST_REG2(lp)); \
993 SMC_outw(mt[4] | (mt[5] << 8), ioaddr, MCAST_REG3(lp)); \
994 SMC_outw(mt[6] | (mt[7] << 8), ioaddr, MCAST_REG4(lp)); \
997 #define SMC_PUT_PKT_HDR(lp, status, length) \ argument
999 if (SMC_32BIT(lp)) \
1001 DATA_REG(lp)); \
1003 SMC_outw(status, ioaddr, DATA_REG(lp)); \
1004 SMC_outw(length, ioaddr, DATA_REG(lp)); \
1008 #define SMC_GET_PKT_HDR(lp, status, length) \ argument
1010 if (SMC_32BIT(lp)) { \
1011 unsigned int __val = SMC_inl(ioaddr, DATA_REG(lp)); \
1015 (status) = SMC_inw(ioaddr, DATA_REG(lp)); \
1016 (length) = SMC_inw(ioaddr, DATA_REG(lp)); \
1020 #define SMC_PUSH_DATA(lp, p, l) \ argument
1022 if (SMC_32BIT(lp)) { \
1028 SMC_outsw(ioaddr, DATA_REG(lp), __ptr, 1); \
1031 if (SMC_CAN_USE_DATACS && lp->datacs) \
1032 __ioaddr = lp->datacs; \
1033 SMC_outsl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
1036 SMC_outsw(ioaddr, DATA_REG(lp), __ptr, 1); \
1038 } else if (SMC_16BIT(lp)) \
1039 SMC_outsw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
1040 else if (SMC_8BIT(lp)) \
1041 SMC_outsb(ioaddr, DATA_REG(lp), p, l); \
1044 #define SMC_PULL_DATA(lp, p, l) \ argument
1046 if (SMC_32BIT(lp)) { \
1066 SMC_SET_PTR(lp, \
1069 if (SMC_CAN_USE_DATACS && lp->datacs) \
1070 __ioaddr = lp->datacs; \
1072 SMC_insl(__ioaddr, DATA_REG(lp), __ptr, __len>>2); \
1073 } else if (SMC_16BIT(lp)) \
1074 SMC_insw(ioaddr, DATA_REG(lp), p, (l) >> 1); \
1075 else if (SMC_8BIT(lp)) \
1076 SMC_insb(ioaddr, DATA_REG(lp), p, l); \