Lines Matching refs:des01

35 	if (unlikely(p->des01.tx.error_summary)) {  in ndesc_get_tx_status()
36 if (unlikely(p->des01.tx.underflow_error)) { in ndesc_get_tx_status()
40 if (unlikely(p->des01.tx.no_carrier)) { in ndesc_get_tx_status()
44 if (unlikely(p->des01.tx.loss_carrier)) { in ndesc_get_tx_status()
48 if (unlikely((p->des01.tx.excessive_deferral) || in ndesc_get_tx_status()
49 (p->des01.tx.excessive_collisions) || in ndesc_get_tx_status()
50 (p->des01.tx.late_collision))) in ndesc_get_tx_status()
51 stats->collisions += p->des01.tx.collision_count; in ndesc_get_tx_status()
55 if (p->des01.etx.vlan_frame) in ndesc_get_tx_status()
58 if (unlikely(p->des01.tx.deferred)) in ndesc_get_tx_status()
66 return p->des01.tx.buffer1_size; in ndesc_get_tx_len()
79 if (unlikely(p->des01.rx.last_descriptor == 0)) { in ndesc_get_rx_status()
86 if (unlikely(p->des01.rx.error_summary)) { in ndesc_get_rx_status()
87 if (unlikely(p->des01.rx.descriptor_error)) in ndesc_get_rx_status()
89 if (unlikely(p->des01.rx.sa_filter_fail)) in ndesc_get_rx_status()
91 if (unlikely(p->des01.rx.overflow_error)) in ndesc_get_rx_status()
93 if (unlikely(p->des01.rx.ipc_csum_error)) in ndesc_get_rx_status()
95 if (unlikely(p->des01.rx.collision)) { in ndesc_get_rx_status()
99 if (unlikely(p->des01.rx.crc_error)) { in ndesc_get_rx_status()
105 if (unlikely(p->des01.rx.dribbling)) in ndesc_get_rx_status()
108 if (unlikely(p->des01.rx.length_error)) { in ndesc_get_rx_status()
112 if (unlikely(p->des01.rx.mii_error)) { in ndesc_get_rx_status()
117 if (p->des01.rx.vlan_tag) in ndesc_get_rx_status()
126 p->des01.all_flags = 0; in ndesc_init_rx_desc()
127 p->des01.rx.own = 1; in ndesc_init_rx_desc()
128 p->des01.rx.buffer1_size = BUF_SIZE_2KiB - 1; in ndesc_init_rx_desc()
136 p->des01.rx.disable_ic = 1; in ndesc_init_rx_desc()
141 p->des01.all_flags = 0; in ndesc_init_tx_desc()
150 return p->des01.tx.own; in ndesc_get_tx_owner()
155 return p->des01.rx.own; in ndesc_get_rx_owner()
160 p->des01.tx.own = 1; in ndesc_set_tx_owner()
165 p->des01.rx.own = 1; in ndesc_set_rx_owner()
170 return p->des01.tx.last_segment; in ndesc_get_tx_ls()
175 int ter = p->des01.tx.end_ring; in ndesc_release_tx_desc()
187 p->des01.tx.first_segment = is_fs; in ndesc_prepare_tx_desc()
194 p->des01.tx.checksum_insertion = cic_full; in ndesc_prepare_tx_desc()
199 p->des01.tx.interrupt = 0; in ndesc_clear_tx_ic()
204 p->des01.tx.last_segment = 1; in ndesc_close_tx_desc()
205 p->des01.tx.interrupt = 1; in ndesc_close_tx_desc()
216 return p->des01.rx.frame_length - 2; in ndesc_get_rx_frame_len()
218 return p->des01.rx.frame_length; in ndesc_get_rx_frame_len()
223 p->des01.tx.time_stamp_enable = 1; in ndesc_enable_tx_timestamp()
228 return p->des01.tx.time_stamp_status; in ndesc_get_tx_timestamp_status()