Lines Matching refs:iowrite32
491 #define DWORD_REG_BITS_ON(x, p) do { iowrite32((ioread32((p))|(x)), (p)); } while (0)
499 #define DWORD_REG_BITS_OFF(x, p) do { iowrite32(ioread32((p)) & (~(x)), (p)); } while (0)
503 #define DWORD_REG_BITS_SET(x, m, p) do { iowrite32((ioread32((p)) & (~(m)))|(x), (p)); } while (0)
800 iowrite32(0, ioaddr + RxMissed); in rhine_update_rx_crc_and_missed_errord()
1436 iowrite32(mask, ioaddr + CamMask); in rhine_set_cam_mask()
1455 iowrite32(mask, ioaddr + CamMask); in rhine_set_vlan_cam_mask()
1543 iowrite32(rp->rx_ring_dma, ioaddr + RxRingPtr); in init_registers()
1544 iowrite32(rp->tx_ring_dma, ioaddr + TxRingPtr); in init_registers()
2100 iowrite32(rp->tx_ring_dma + entry * sizeof(struct tx_desc), in rhine_restart_tx()
2186 iowrite32(0xffffffff, ioaddr + MulticastFilter0); in rhine_set_rx_mode()
2187 iowrite32(0xffffffff, ioaddr + MulticastFilter1); in rhine_set_rx_mode()
2191 iowrite32(0xffffffff, ioaddr + MulticastFilter0); in rhine_set_rx_mode()
2192 iowrite32(0xffffffff, ioaddr + MulticastFilter1); in rhine_set_rx_mode()
2211 iowrite32(mc_filter[0], ioaddr + MulticastFilter0); in rhine_set_rx_mode()
2212 iowrite32(mc_filter[1], ioaddr + MulticastFilter1); in rhine_set_rx_mode()